1 /* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #include <drivers/clk.h> 7 #include <s32cc-clk-drv.h> 8 #include <s32cc-clk-ids.h> 9 #include <s32cc-clk-utils.h> 10 11 #define S32CC_FXOSC_FREQ (40U * MHZ) 12 #define S32CC_ARM_PLL_VCO_FREQ (2U * GHZ) 13 #define S32CC_ARM_PLL_PHI0_FREQ (1U * GHZ) 14 15 int s32cc_init_early_clks(void) 16 { 17 int ret; 18 19 s32cc_clk_register_drv(); 20 21 ret = clk_set_parent(S32CC_CLK_ARM_PLL_MUX, S32CC_CLK_FXOSC); 22 if (ret != 0) { 23 return ret; 24 } 25 26 ret = clk_set_parent(S32CC_CLK_MC_CGM1_MUX0, S32CC_CLK_ARM_PLL_PHI0); 27 if (ret != 0) { 28 return ret; 29 } 30 31 ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL); 32 if (ret != 0) { 33 return ret; 34 } 35 36 ret = clk_set_rate(S32CC_CLK_ARM_PLL_VCO, S32CC_ARM_PLL_VCO_FREQ, NULL); 37 if (ret != 0) { 38 return ret; 39 } 40 41 ret = clk_set_rate(S32CC_CLK_ARM_PLL_PHI0, S32CC_ARM_PLL_PHI0_FREQ, NULL); 42 if (ret != 0) { 43 return ret; 44 } 45 46 ret = clk_enable(S32CC_CLK_FXOSC); 47 if (ret != 0) { 48 return ret; 49 } 50 51 return ret; 52 } 53