xref: /rk3399_ARM-atf/drivers/nxp/clk/s32cc/s32cc_clk_drv.c (revision 5d1006998032c0bb1e531683a794aaf355ef4749)
1 /*
2  * Copyright 2024 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #include <errno.h>
7 
8 #include <drivers/clk.h>
9 
10 static int s32cc_clk_enable(unsigned long id)
11 {
12 	return -ENOTSUP;
13 }
14 
15 static void s32cc_clk_disable(unsigned long id)
16 {
17 }
18 
19 static bool s32cc_clk_is_enabled(unsigned long id)
20 {
21 	return false;
22 }
23 
24 static unsigned long s32cc_clk_get_rate(unsigned long id)
25 {
26 	return 0;
27 }
28 
29 static int s32cc_clk_set_rate(unsigned long id, unsigned long rate,
30 			      unsigned long *orate)
31 {
32 	return -ENOTSUP;
33 }
34 
35 static int s32cc_clk_get_parent(unsigned long id)
36 {
37 	return -ENOTSUP;
38 }
39 
40 static int s32cc_clk_set_parent(unsigned long id, unsigned long parent_id)
41 {
42 	return -ENOTSUP;
43 }
44 
45 void s32cc_clk_register_drv(void)
46 {
47 	static const struct clk_ops s32cc_clk_ops = {
48 		.enable		= s32cc_clk_enable,
49 		.disable	= s32cc_clk_disable,
50 		.is_enabled	= s32cc_clk_is_enabled,
51 		.get_rate	= s32cc_clk_get_rate,
52 		.set_rate	= s32cc_clk_set_rate,
53 		.get_parent	= s32cc_clk_get_parent,
54 		.set_parent	= s32cc_clk_set_parent,
55 	};
56 
57 	clk_register(&s32cc_clk_ops);
58 }
59 
60