xref: /rk3399_ARM-atf/drivers/nxp/clk/s32cc/s32cc_clk_drv.c (revision 3a580e9e472a5506da82227e809e0bd472dea1b1)
1*3a580e9eSGhennadi Procopciuc /*
2*3a580e9eSGhennadi Procopciuc  * Copyright 2024 NXP
3*3a580e9eSGhennadi Procopciuc  *
4*3a580e9eSGhennadi Procopciuc  * SPDX-License-Identifier: BSD-3-Clause
5*3a580e9eSGhennadi Procopciuc  */
6*3a580e9eSGhennadi Procopciuc #include <errno.h>
7*3a580e9eSGhennadi Procopciuc 
8*3a580e9eSGhennadi Procopciuc #include <drivers/clk.h>
9*3a580e9eSGhennadi Procopciuc 
10*3a580e9eSGhennadi Procopciuc static int s32cc_clk_enable(unsigned long id)
11*3a580e9eSGhennadi Procopciuc {
12*3a580e9eSGhennadi Procopciuc 	return -ENOTSUP;
13*3a580e9eSGhennadi Procopciuc }
14*3a580e9eSGhennadi Procopciuc 
15*3a580e9eSGhennadi Procopciuc static void s32cc_clk_disable(unsigned long id)
16*3a580e9eSGhennadi Procopciuc {
17*3a580e9eSGhennadi Procopciuc }
18*3a580e9eSGhennadi Procopciuc 
19*3a580e9eSGhennadi Procopciuc static bool s32cc_clk_is_enabled(unsigned long id)
20*3a580e9eSGhennadi Procopciuc {
21*3a580e9eSGhennadi Procopciuc 	return false;
22*3a580e9eSGhennadi Procopciuc }
23*3a580e9eSGhennadi Procopciuc 
24*3a580e9eSGhennadi Procopciuc static unsigned long s32cc_clk_get_rate(unsigned long id)
25*3a580e9eSGhennadi Procopciuc {
26*3a580e9eSGhennadi Procopciuc 	return 0;
27*3a580e9eSGhennadi Procopciuc }
28*3a580e9eSGhennadi Procopciuc 
29*3a580e9eSGhennadi Procopciuc static int s32cc_clk_set_rate(unsigned long id, unsigned long rate,
30*3a580e9eSGhennadi Procopciuc 			      unsigned long *orate)
31*3a580e9eSGhennadi Procopciuc {
32*3a580e9eSGhennadi Procopciuc 	return -ENOTSUP;
33*3a580e9eSGhennadi Procopciuc }
34*3a580e9eSGhennadi Procopciuc 
35*3a580e9eSGhennadi Procopciuc static int s32cc_clk_get_parent(unsigned long id)
36*3a580e9eSGhennadi Procopciuc {
37*3a580e9eSGhennadi Procopciuc 	return -ENOTSUP;
38*3a580e9eSGhennadi Procopciuc }
39*3a580e9eSGhennadi Procopciuc 
40*3a580e9eSGhennadi Procopciuc static int s32cc_clk_set_parent(unsigned long id, unsigned long parent_id)
41*3a580e9eSGhennadi Procopciuc {
42*3a580e9eSGhennadi Procopciuc 	return -ENOTSUP;
43*3a580e9eSGhennadi Procopciuc }
44*3a580e9eSGhennadi Procopciuc 
45*3a580e9eSGhennadi Procopciuc void s32cc_clk_register_drv(void)
46*3a580e9eSGhennadi Procopciuc {
47*3a580e9eSGhennadi Procopciuc 	static const struct clk_ops s32cc_clk_ops = {
48*3a580e9eSGhennadi Procopciuc 		.enable		= s32cc_clk_enable,
49*3a580e9eSGhennadi Procopciuc 		.disable	= s32cc_clk_disable,
50*3a580e9eSGhennadi Procopciuc 		.is_enabled	= s32cc_clk_is_enabled,
51*3a580e9eSGhennadi Procopciuc 		.get_rate	= s32cc_clk_get_rate,
52*3a580e9eSGhennadi Procopciuc 		.set_rate	= s32cc_clk_set_rate,
53*3a580e9eSGhennadi Procopciuc 		.get_parent	= s32cc_clk_get_parent,
54*3a580e9eSGhennadi Procopciuc 		.set_parent	= s32cc_clk_set_parent,
55*3a580e9eSGhennadi Procopciuc 	};
56*3a580e9eSGhennadi Procopciuc 
57*3a580e9eSGhennadi Procopciuc 	clk_register(&s32cc_clk_ops);
58*3a580e9eSGhennadi Procopciuc }
59*3a580e9eSGhennadi Procopciuc 
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