1*b47d085aSGhennadi Procopciuc /* 2*b47d085aSGhennadi Procopciuc * Copyright 2023-2024 NXP 3*b47d085aSGhennadi Procopciuc * 4*b47d085aSGhennadi Procopciuc * SPDX-License-Identifier: BSD-3-Clause 5*b47d085aSGhennadi Procopciuc */ 6*b47d085aSGhennadi Procopciuc #include <lib/mmio.h> 7*b47d085aSGhennadi Procopciuc #include <lib/utils_def.h> 8*b47d085aSGhennadi Procopciuc #include <s32cc-mc-rgm.h> 9*b47d085aSGhennadi Procopciuc 10*b47d085aSGhennadi Procopciuc #define MC_RGM_PRST(MC_RGM, PER) ((MC_RGM) + 0x40UL + ((PER) * 0x8UL)) 11*b47d085aSGhennadi Procopciuc 12*b47d085aSGhennadi Procopciuc /* ERR051700 13*b47d085aSGhennadi Procopciuc * Releasing more than one Software Resettable Domain (SRD) 14*b47d085aSGhennadi Procopciuc * from reset simultaneously, by clearing the corresponding 15*b47d085aSGhennadi Procopciuc * peripheral MC_RGM_PRSTn[PERIPH_x_RST] reset control may 16*b47d085aSGhennadi Procopciuc * cause a false setting of the Fault Collection and 17*b47d085aSGhennadi Procopciuc * Control Unit (FCCU) Non-Critical Fault (NCF) flag 18*b47d085aSGhennadi Procopciuc * corresponding to a Memory-Test-Repair (MTR) Error 19*b47d085aSGhennadi Procopciuc */ 20*b47d085aSGhennadi Procopciuc #if (ERRATA_S32_051700 == 1) 21*b47d085aSGhennadi Procopciuc void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value) 22*b47d085aSGhennadi Procopciuc { 23*b47d085aSGhennadi Procopciuc uint32_t current_bit_checked, i; 24*b47d085aSGhennadi Procopciuc uint32_t current_regs, mask; 25*b47d085aSGhennadi Procopciuc int bit_index; 26*b47d085aSGhennadi Procopciuc 27*b47d085aSGhennadi Procopciuc current_regs = mmio_read_32(MC_RGM_PRST(rgm, part)); 28*b47d085aSGhennadi Procopciuc /* Create a mask with all changed bits */ 29*b47d085aSGhennadi Procopciuc mask = current_regs ^ value; 30*b47d085aSGhennadi Procopciuc 31*b47d085aSGhennadi Procopciuc while (mask != 0U) { 32*b47d085aSGhennadi Procopciuc bit_index = __builtin_ffs(mask); 33*b47d085aSGhennadi Procopciuc if (bit_index < 1) { 34*b47d085aSGhennadi Procopciuc break; 35*b47d085aSGhennadi Procopciuc } 36*b47d085aSGhennadi Procopciuc 37*b47d085aSGhennadi Procopciuc i = (uint32_t)bit_index - 1U; 38*b47d085aSGhennadi Procopciuc current_bit_checked = BIT_32(i); 39*b47d085aSGhennadi Procopciuc 40*b47d085aSGhennadi Procopciuc /* Check if we assert or de-assert. 41*b47d085aSGhennadi Procopciuc * Also wait for completion. 42*b47d085aSGhennadi Procopciuc */ 43*b47d085aSGhennadi Procopciuc if ((value & current_bit_checked) != 0U) { 44*b47d085aSGhennadi Procopciuc mmio_setbits_32(MC_RGM_PRST(rgm, part), 45*b47d085aSGhennadi Procopciuc current_bit_checked); 46*b47d085aSGhennadi Procopciuc while ((mmio_read_32(MC_RGM_PRST(rgm, part)) & 47*b47d085aSGhennadi Procopciuc current_bit_checked) == 0U) 48*b47d085aSGhennadi Procopciuc ; 49*b47d085aSGhennadi Procopciuc } else { 50*b47d085aSGhennadi Procopciuc mmio_clrbits_32(MC_RGM_PRST(rgm, part), 51*b47d085aSGhennadi Procopciuc current_bit_checked); 52*b47d085aSGhennadi Procopciuc while ((mmio_read_32(MC_RGM_PRST(rgm, part)) & 53*b47d085aSGhennadi Procopciuc current_bit_checked) != 0U) 54*b47d085aSGhennadi Procopciuc ; 55*b47d085aSGhennadi Procopciuc } 56*b47d085aSGhennadi Procopciuc 57*b47d085aSGhennadi Procopciuc mask &= ~current_bit_checked; 58*b47d085aSGhennadi Procopciuc } 59*b47d085aSGhennadi Procopciuc } 60*b47d085aSGhennadi Procopciuc #else /* ERRATA_S32_051700 */ 61*b47d085aSGhennadi Procopciuc void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value) 62*b47d085aSGhennadi Procopciuc { 63*b47d085aSGhennadi Procopciuc mmio_write_32(MC_RGM_PRST(rgm, part), value); 64*b47d085aSGhennadi Procopciuc } 65*b47d085aSGhennadi Procopciuc #endif /* ERRATA_S32_051700 */ 66