1STM32MP2 2======== 3 4STM32MP2 is a microprocessor designed by STMicroelectronics 5based on Arm Cortex-A35. 6 7More information can be found on `STM32MP2 Series`_ page. 8 9For TF-A common configuration of STM32 MPUs, please check 10:ref:`STM32 MPUs` page. 11 12STM32MP2 Versions 13----------------- 14 15Here are the variants for STM32MP2: 16- STM32MP21 17- STM32MP23 18- STM32MP25 19 20STM32MP21 Versions 21~~~~~~~~~~~~~~~~~~ 22The STM32MP21 series is available in 3 different lines which are pin-to-pin compatible: 23 24- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD - CSI - LTDC 25- STM32MP213: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD 26- STM32MP211: Single Cortex-A35 + Cortex-M33 - 1x Ethernet 27 28Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 29 30- A Basic + Cortex-A35 @ 1.2GHz 31- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 32- D Basic + Cortex-A35 @ 1.5GHz 33- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 34 35STM32MP23 Versions 36~~~~~~~~~~~~~~~~~~ 37The STM32MP23 series is available in 3 different lines which are pin-to-pin compatible: 38 39- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD - H264 - 3D GPU - AI / NN - LVDS / DSI 40- STM32MP233: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD 41- STM32MP231: Single Cortex-A35 + Cortex-M33 - 1x Ethernet 42 43Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 44 45- A Basic + Cortex-A35 @ 1.2GHz 46- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 47- D Basic + Cortex-A35 @ 1.5GHz 48- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 49 50STM32MP25 Versions 51~~~~~~~~~~~~~~~~~~ 52The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible: 53 54- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS 55- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS 56- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS 57- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet 58 59Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 60 61- A Basic + Cortex-A35 @ 1.2GHz 62- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 63- D Basic + Cortex-A35 @ 1.5GHz 64- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 65 66The `STM32MP2 part number codification`_ page gives more information about part numbers. 67 68Memory mapping 69-------------- 70 71:: 72 73 0x00000000 +-----------------+ 74 | | 75 | ... | 76 | | 77 0x0E000000 +-----------------+ \ 78 | BL31 | | 79 +-----------------+ | 80 | ... | | 81 0x0E012000 +-----------------+ | 82 | BL2 DTB | | Embedded SRAM 83 0x0E016000 +-----------------+ | 84 | BL2 | | 85 0x0E040000 +-----------------+ / 86 | | 87 | ... | 88 | | 89 0x40000000 +-----------------+ 90 | | 91 | | Devices 92 | | 93 0x80000000 +-----------------+ \ 94 | | | 95 | | | Non-secure RAM (DDR) 96 | | | 97 0xFFFFFFFF +-----------------+ / 98 99 100Build Instructions 101------------------ 102 103STM32MP2x specific flags 104~~~~~~~~~~~~~~~~~~~~~~~~ 105 106Dedicated STM32MP2 build flags: 107 108- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP. 109 | Default: 1 110- | ``STM32MP21``: to select STM32MP21 variant configuration. 111 | Default: 0 112- | ``STM32MP23``: to select STM32MP23 variant configuration. 113 | Default: 0 114- | ``STM32MP25``: to select STM32MP25 variant configuration. 115 | Default: 1 116 117To compile the correct DDR driver, one flag must be set among: 118 119- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT. 120 | Default: 0 121- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT. 122 | Default: 0 123- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT. 124 | Default: 0 125 126 127Boot with FIP 128~~~~~~~~~~~~~ 129You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) and retrieve 130DDR PHY firmware before building FIP binary. 131 132U-Boot 133______ 134 135.. code:: bash 136 137 cd <u-boot_directory> 138 make stm32mp25_defconfig 139 make DEVICE_TREE=stm32mp257f-ev1 all 140 141OP-TEE 142______ 143 144.. code:: bash 145 146 cd <optee_directory> 147 make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi- 148 ARCH=arm PLATFORM=stm32mp2 \ 149 CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts 150 151DDR PHY firmware 152________________ 153DDR PHY firmware files may not be delivered inside TF-A repository, especially 154if you build directly from trustedfirmware.org repository. It then needs to be 155retrieved from `STMicroelectronics DDR PHY github`_. 156 157You can either clone the repository to the default directory: 158 159.. code:: bash 160 161 git clone https://github.com/STMicroelectronics/stm32-ddr-phy-binary.git drivers/st/ddr/phy/firmware/bin 162 163Or clone it somewhere else, and add ``STM32MP_DDR_FW_PATH=`` in your make command 164line when building FIP. 165 166TF-A BL2 167________ 168To build TF-A BL2 with its STM32 header for SD-card boot: 169 170.. code:: bash 171 172 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 173 STM32MP_DDR4_TYPE=1 SPD=opteed \ 174 DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1 175 176For other boot devices, you have to replace STM32MP_SDMMC in the previous command 177with the desired device flag. 178 179 180FIP 181___ 182 183.. code:: bash 184 185 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 186 STM32MP_DDR4_TYPE=1 SPD=opteed \ 187 DTB_FILE_NAME=stm32mp257f-ev1.dtb \ 188 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 189 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 190 BL32=<optee_directory>/tee-header_v2.bin \ 191 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 192 fip 193 194.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html 195.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification 196.. _STMicroelectronics DDR PHY github: https://github.com/STMicroelectronics/stm32-ddr-phy-binary 197 198*Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved* 199