1STM32MP2 2======== 3 4STM32MP2 is a microprocessor designed by STMicroelectronics 5based on Arm Cortex-A35. 6 7More information can be found on `STM32MP2 Series`_ page. 8 9For TF-A common configuration of STM32 MPUs, please check 10:ref:`STM32 MPUs` page. 11 12STM32MP2 Versions 13----------------- 14 15The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible: 16 17- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS 18- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS 19- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS 20- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet 21 22Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 23 24- A Basic + Cortex-A35 @ 1.2GHz 25- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 26- D Basic + Cortex-A35 @ 1.5GHz 27- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 28 29The `STM32MP2 part number codification`_ page gives more information about part numbers. 30 31Memory mapping 32-------------- 33 34:: 35 36 0x00000000 +-----------------+ 37 | | 38 | ... | 39 | | 40 0x0E000000 +-----------------+ \ 41 | BL31 | | 42 +-----------------+ | 43 | ... | | 44 0x0E012000 +-----------------+ | 45 | BL2 DTB | | Embedded SRAM 46 0x0E016000 +-----------------+ | 47 | BL2 | | 48 0x0E040000 +-----------------+ / 49 | | 50 | ... | 51 | | 52 0x40000000 +-----------------+ 53 | | 54 | | Devices 55 | | 56 0x80000000 +-----------------+ \ 57 | | | 58 | | | Non-secure RAM (DDR) 59 | | | 60 0xFFFFFFFF +-----------------+ / 61 62 63Build Instructions 64------------------ 65 66STM32MP2x specific flags 67~~~~~~~~~~~~~~~~~~~~~~~~ 68 69Dedicated STM32MP2 build flags: 70 71- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP. 72 | Default: 1 73- | ``STM32MP25``: to select STM32MP25 variant configuration. 74 | Default: 1 75 76To compile the correct DDR driver, one flag must be set among: 77 78- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT. 79 | Default: 0 80- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT. 81 | Default: 0 82- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT. 83 | Default: 0 84 85 86Boot with FIP 87~~~~~~~~~~~~~ 88You need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) before building FIP binary. 89 90U-Boot 91______ 92 93.. code:: bash 94 95 cd <u-boot_directory> 96 make stm32mp25_defconfig 97 make DEVICE_TREE=stm32mp257f-ev1 all 98 99OP-TEE 100______ 101 102.. code:: bash 103 104 cd <optee_directory> 105 make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi- 106 ARCH=arm PLATFORM=stm32mp2 \ 107 CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts 108 109TF-A BL2 & BL31 110_______________ 111To build TF-A BL2 with its STM32 header and BL31 for SD-card boot: 112 113.. code:: bash 114 115 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 116 STM32MP_DDR4_TYPE=1 SPD=opteed \ 117 DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1 118 119For other boot devices, you have to replace STM32MP_SDMMC in the previous command 120with the desired device flag. 121 122 123FIP 124___ 125 126.. code:: bash 127 128 make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 129 STM32MP_DDR4_TYPE=1 SPD=opteed \ 130 DTB_FILE_NAME=stm32mp257f-ev1.dtb \ 131 BL33=<u-boot_directory>/u-boot-nodtb.bin \ 132 BL33_CFG=<u-boot_directory>/u-boot.dtb \ 133 BL32=<optee_directory>/tee-header_v2.bin \ 134 BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 135 fip 136 137.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html 138.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification 139 140*Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved* 141