1ee5076f9SYann GautierSTM32MP2 2ee5076f9SYann Gautier======== 3ee5076f9SYann Gautier 4ee5076f9SYann GautierSTM32MP2 is a microprocessor designed by STMicroelectronics 5ee5076f9SYann Gautierbased on Arm Cortex-A35. 6ee5076f9SYann Gautier 721b6260eSYann GautierMore information can be found on `STM32MP2 Series`_ page. 821b6260eSYann Gautier 9ee5076f9SYann GautierFor TF-A common configuration of STM32 MPUs, please check 10ee5076f9SYann Gautier:ref:`STM32 MPUs` page. 11ee5076f9SYann Gautier 12ee5076f9SYann GautierSTM32MP2 Versions 13ee5076f9SYann Gautier----------------- 14ee5076f9SYann Gautier 1507759f2bSYann GautierHere are the variants for STM32MP2: 1607759f2bSYann Gautier- STM32MP21 17*e577ca36SNicolas Le Bayon- STM32MP23 1807759f2bSYann Gautier- STM32MP25 1907759f2bSYann Gautier 2007759f2bSYann GautierSTM32MP21 Versions 2107759f2bSYann Gautier~~~~~~~~~~~~~~~~~~ 2207759f2bSYann GautierThe STM32MP21 series is available in 3 different lines which are pin-to-pin compatible: 2307759f2bSYann Gautier 2407759f2bSYann Gautier- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD - CSI - LTDC 2507759f2bSYann Gautier- STM32MP213: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD 2607759f2bSYann Gautier- STM32MP211: Single Cortex-A35 + Cortex-M33 - 1x Ethernet 2707759f2bSYann Gautier 2807759f2bSYann GautierEach line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 2907759f2bSYann Gautier 3007759f2bSYann Gautier- A Basic + Cortex-A35 @ 1.2GHz 3107759f2bSYann Gautier- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 3207759f2bSYann Gautier- D Basic + Cortex-A35 @ 1.5GHz 3307759f2bSYann Gautier- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 3407759f2bSYann Gautier 35*e577ca36SNicolas Le BayonSTM32MP23 Versions 36*e577ca36SNicolas Le Bayon~~~~~~~~~~~~~~~~~~ 37*e577ca36SNicolas Le BayonThe STM32MP23 series is available in 3 different lines which are pin-to-pin compatible: 38*e577ca36SNicolas Le Bayon 39*e577ca36SNicolas Le Bayon- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD - H264 - 3D GPU - AI / NN - LVDS / DSI 40*e577ca36SNicolas Le Bayon- STM32MP233: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD 41*e577ca36SNicolas Le Bayon- STM32MP231: Single Cortex-A35 + Cortex-M33 - 1x Ethernet 42*e577ca36SNicolas Le Bayon 43*e577ca36SNicolas Le BayonEach line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 44*e577ca36SNicolas Le Bayon 45*e577ca36SNicolas Le Bayon- A Basic + Cortex-A35 @ 1.2GHz 46*e577ca36SNicolas Le Bayon- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 47*e577ca36SNicolas Le Bayon- D Basic + Cortex-A35 @ 1.5GHz 48*e577ca36SNicolas Le Bayon- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 49*e577ca36SNicolas Le Bayon 5007759f2bSYann GautierSTM32MP25 Versions 5107759f2bSYann Gautier~~~~~~~~~~~~~~~~~~ 52ee5076f9SYann GautierThe STM32MP25 series is available in 4 different lines which are pin-to-pin compatible: 53ee5076f9SYann Gautier 54ee5076f9SYann Gautier- STM32MP257: Dual Cortex-A35 cores, Cortex-M33 core - 3x Ethernet (2+1 switch) - 3x CAN FD – H264 - 3D GPU – AI / NN - LVDS 55ee5076f9SYann Gautier- STM32MP255: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - H264 - 3D GPU – AI / NN - LVDS 56ee5076f9SYann Gautier- STM32MP253: Dual Cortex-A35 cores, Cortex-M33 core - 2x Ethernet – 3x CAN FD - LVDS 57ee5076f9SYann Gautier- STM32MP251: Single Cortex-A35 core, Cortex-M33 core - 1x Ethernet 58ee5076f9SYann Gautier 59ee5076f9SYann GautierEach line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: 60ee5076f9SYann Gautier 617b7d23cdSNicolas Le Bayon- A Basic + Cortex-A35 @ 1.2GHz 627b7d23cdSNicolas Le Bayon- C Secure Boot + HW Crypto + Cortex-A35 @ 1.2GHz 63ee5076f9SYann Gautier- D Basic + Cortex-A35 @ 1.5GHz 64ee5076f9SYann Gautier- F Secure Boot + HW Crypto + Cortex-A35 @ 1.5GHz 65ee5076f9SYann Gautier 6621b6260eSYann GautierThe `STM32MP2 part number codification`_ page gives more information about part numbers. 6721b6260eSYann Gautier 68ee5076f9SYann GautierMemory mapping 69ee5076f9SYann Gautier-------------- 70ee5076f9SYann Gautier 71ee5076f9SYann Gautier:: 72ee5076f9SYann Gautier 73ee5076f9SYann Gautier 0x00000000 +-----------------+ 74ee5076f9SYann Gautier | | 75ee5076f9SYann Gautier | ... | 76ee5076f9SYann Gautier | | 77ee5076f9SYann Gautier 0x0E000000 +-----------------+ \ 78ee5076f9SYann Gautier | BL31 | | 79ee5076f9SYann Gautier +-----------------+ | 80ee5076f9SYann Gautier | ... | | 81ee5076f9SYann Gautier 0x0E012000 +-----------------+ | 82ee5076f9SYann Gautier | BL2 DTB | | Embedded SRAM 83ee5076f9SYann Gautier 0x0E016000 +-----------------+ | 84ee5076f9SYann Gautier | BL2 | | 85ee5076f9SYann Gautier 0x0E040000 +-----------------+ / 86ee5076f9SYann Gautier | | 87ee5076f9SYann Gautier | ... | 88ee5076f9SYann Gautier | | 89ee5076f9SYann Gautier 0x40000000 +-----------------+ 90ee5076f9SYann Gautier | | 91ee5076f9SYann Gautier | | Devices 92ee5076f9SYann Gautier | | 93ee5076f9SYann Gautier 0x80000000 +-----------------+ \ 94ee5076f9SYann Gautier | | | 95ee5076f9SYann Gautier | | | Non-secure RAM (DDR) 96ee5076f9SYann Gautier | | | 97ee5076f9SYann Gautier 0xFFFFFFFF +-----------------+ / 98ee5076f9SYann Gautier 99ee5076f9SYann Gautier 100ee5076f9SYann GautierBuild Instructions 101ee5076f9SYann Gautier------------------ 102ee5076f9SYann Gautier 103ee5076f9SYann GautierSTM32MP2x specific flags 104ee5076f9SYann Gautier~~~~~~~~~~~~~~~~~~~~~~~~ 105ee5076f9SYann Gautier 106ee5076f9SYann GautierDedicated STM32MP2 build flags: 107ee5076f9SYann Gautier 108ee5076f9SYann Gautier- | ``STM32MP_DDR_FIP_IO_STORAGE``: to store DDR firmware in FIP. 109ee5076f9SYann Gautier | Default: 1 11007759f2bSYann Gautier- | ``STM32MP21``: to select STM32MP21 variant configuration. 11107759f2bSYann Gautier | Default: 0 112*e577ca36SNicolas Le Bayon- | ``STM32MP23``: to select STM32MP23 variant configuration. 113*e577ca36SNicolas Le Bayon | Default: 0 114ee5076f9SYann Gautier- | ``STM32MP25``: to select STM32MP25 variant configuration. 115ee5076f9SYann Gautier | Default: 1 116ee5076f9SYann Gautier 117ee5076f9SYann GautierTo compile the correct DDR driver, one flag must be set among: 118ee5076f9SYann Gautier 119ee5076f9SYann Gautier- | ``STM32MP_DDR3_TYPE``: to compile DDR3 driver and DT. 120ee5076f9SYann Gautier | Default: 0 121ee5076f9SYann Gautier- | ``STM32MP_DDR4_TYPE``: to compile DDR4 driver and DT. 122ee5076f9SYann Gautier | Default: 0 123ee5076f9SYann Gautier- | ``STM32MP_LPDDR4_TYPE``: to compile LpDDR4 driver and DT. 124ee5076f9SYann Gautier | Default: 0 125ee5076f9SYann Gautier 126ee5076f9SYann Gautier 127ee5076f9SYann GautierBoot with FIP 128ee5076f9SYann Gautier~~~~~~~~~~~~~ 129ae84525fSMaxime MéréYou need to build BL2, BL31, BL32 (OP-TEE) and BL33 (U-Boot) and retrieve 130ae84525fSMaxime MéréDDR PHY firmware before building FIP binary. 131ee5076f9SYann Gautier 132ee5076f9SYann GautierU-Boot 133ee5076f9SYann Gautier______ 134ee5076f9SYann Gautier 135ee5076f9SYann Gautier.. code:: bash 136ee5076f9SYann Gautier 137ee5076f9SYann Gautier cd <u-boot_directory> 138ee5076f9SYann Gautier make stm32mp25_defconfig 139ee5076f9SYann Gautier make DEVICE_TREE=stm32mp257f-ev1 all 140ee5076f9SYann Gautier 141ee5076f9SYann GautierOP-TEE 142ee5076f9SYann Gautier______ 143ee5076f9SYann Gautier 144ee5076f9SYann Gautier.. code:: bash 145ee5076f9SYann Gautier 146ee5076f9SYann Gautier cd <optee_directory> 147ee5076f9SYann Gautier make CROSS_COMPILE64=aarch64-none-elf- CROSS_COMPILE32=arm-none-eabi- 148ee5076f9SYann Gautier ARCH=arm PLATFORM=stm32mp2 \ 149ee5076f9SYann Gautier CFG_EMBED_DTB_SOURCE_FILE=stm32mp257f-ev1.dts 150ee5076f9SYann Gautier 151ae84525fSMaxime MéréDDR PHY firmware 152ae84525fSMaxime Méré________________ 153ae84525fSMaxime MéréDDR PHY firmware files may not be delivered inside TF-A repository, especially 154ae84525fSMaxime Méréif you build directly from trustedfirmware.org repository. It then needs to be 155ae84525fSMaxime Méréretrieved from `STMicroelectronics DDR PHY github`_. 156ae84525fSMaxime Méré 157ae84525fSMaxime MéréYou can either clone the repository to the default directory: 158ae84525fSMaxime Méré 159ae84525fSMaxime Méré.. code:: bash 160ae84525fSMaxime Méré 161ae84525fSMaxime Méré git clone https://github.com/STMicroelectronics/stm32-ddr-phy-binary.git drivers/st/ddr/phy/firmware/bin 162ae84525fSMaxime Méré 163ae84525fSMaxime MéréOr clone it somewhere else, and add ``STM32MP_DDR_FW_PATH=`` in your make command 164ae84525fSMaxime Méréline when building FIP. 165ae84525fSMaxime Méré 166ae84525fSMaxime MéréTF-A BL2 167ae84525fSMaxime Méré________ 168ae84525fSMaxime MéréTo build TF-A BL2 with its STM32 header for SD-card boot: 169ee5076f9SYann Gautier 170ee5076f9SYann Gautier.. code:: bash 171ee5076f9SYann Gautier 172ee5076f9SYann Gautier make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 173ee5076f9SYann Gautier STM32MP_DDR4_TYPE=1 SPD=opteed \ 174ee5076f9SYann Gautier DTB_FILE_NAME=stm32mp257f-ev1.dtb STM32MP_SDMMC=1 175ee5076f9SYann Gautier 176ee5076f9SYann GautierFor other boot devices, you have to replace STM32MP_SDMMC in the previous command 177ee5076f9SYann Gautierwith the desired device flag. 178ee5076f9SYann Gautier 179ee5076f9SYann Gautier 180ee5076f9SYann GautierFIP 181ee5076f9SYann Gautier___ 182ee5076f9SYann Gautier 183ee5076f9SYann Gautier.. code:: bash 184ee5076f9SYann Gautier 185ee5076f9SYann Gautier make CROSS_COMPILE=aarch64-none-elf- PLAT=stm32mp2 \ 186ee5076f9SYann Gautier STM32MP_DDR4_TYPE=1 SPD=opteed \ 187ee5076f9SYann Gautier DTB_FILE_NAME=stm32mp257f-ev1.dtb \ 188ee5076f9SYann Gautier BL33=<u-boot_directory>/u-boot-nodtb.bin \ 189ee5076f9SYann Gautier BL33_CFG=<u-boot_directory>/u-boot.dtb \ 190ee5076f9SYann Gautier BL32=<optee_directory>/tee-header_v2.bin \ 191ee5076f9SYann Gautier BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin 192ee5076f9SYann Gautier fip 193ee5076f9SYann Gautier 19421b6260eSYann Gautier.. _STM32MP2 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html 19521b6260eSYann Gautier.. _STM32MP2 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP25_microprocessor#Part_number_codification 196ae84525fSMaxime Méré.. _STMicroelectronics DDR PHY github: https://github.com/STMicroelectronics/stm32-ddr-phy-binary 19721b6260eSYann Gautier 19807759f2bSYann Gautier*Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved* 199