xref: /rk3399_ARM-atf/docs/plat/marvell/armada/build.rst (revision 0aa9f3c0f2f2ff675c3c12ae5ac6ceb475d6a16f)
1TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10    .. code:: shell
11
12        > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
13
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18    .. code:: shell
19
20        > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25    .. note::
26
27       *u-boot.bin* should be used and not *u-boot-spl.bin*
28
29Set MSS/SCP image path (mandatory only for Armada80x0)
30
31    .. code:: shell
32
33        > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40    .. code:: shell
41
42        > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46    .. code:: shell
47
48        > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
54- DEBUG
55
56        Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
57        Must be disabled when building UART recovery images due to current console driver
58        implementation that is not compatible with Xmodem protocol used for boot image download.
59
60- LOG_LEVEL
61
62        Defines the level of logging which will be purged to the default output port.
63
64        LOG_LEVEL_NONE		0
65        LOG_LEVEL_ERROR		10
66        LOG_LEVEL_NOTICE	20
67        LOG_LEVEL_WARNING	30
68        LOG_LEVEL_INFO		40
69        LOG_LEVEL_VERBOSE	50
70
71- USE_COHERENT_MEM
72
73        This flag determines whether to include the coherent memory region in the
74        BL memory map or not.
75
76- LLC_ENABLE
77
78        Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
79
80- LLC_SRAM
81
82        Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
83        by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
84        for SRAM address range at BL31 execution stage with window target set to DRAM-0.
85        When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
86        There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
87        Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
88
89- MARVELL_SECURE_BOOT
90
91        Build trusted(=1)/non trusted(=0) image, default is non trusted.
92
93- BLE_PATH
94
95        Points to BLE (Binary ROM extension) sources folder. Only required for A8K builds.
96        The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``.
97
98- MV_DDR_PATH
99
100        For A7/8K, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
101        it is used for ddr_tool build.
102
103        Usage example: MV_DDR_PATH=path/to/mv_ddr
104
105        The parameter is optional for A7/8K, when this parameter is not set, the mv_ddr
106        sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter
107        is necessary for A37x0.
108
109        For the mv_ddr source location, check the section "Tools and external components installation"
110
111- DDR_TOPOLOGY
112
113        For Armada37x0 only, the DDR topology map index/name, default is 0.
114
115        Supported Options:
116            - DDR3 1CS (0): DB-88F3720-DDR3-Modular (512MB); EspressoBIN (512MB)
117            - DDR4 1CS (1): DB-88F3720-DDR4-Modular (512MB)
118            - DDR3 2CS (2): EspressoBIN V3-V5 (1GB)
119            - DDR4 2CS (3): DB-88F3720-DDR4-Modular (4GB)
120            - DDR3 1CS (4): DB-88F3720-DDR3-Modular (1GB)
121            - DDR4 1CS (5): EspressoBin V7 (1GB)
122            - DDR4 2CS (6): EspressoBin V7 (2GB)
123            - CUSTOMER (CUST): Customer board, DDR3 1CS 512MB
124
125- CLOCKSPRESET
126
127        For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
128        default is CPU_800_DDR_800.
129
130            - CPU_600_DDR_600	-	CPU at 600 MHz, DDR at 600 MHz
131            - CPU_800_DDR_800	-	CPU at 800 MHz, DDR at 800 MHz
132            - CPU_1000_DDR_800	-	CPU at 1000 MHz, DDR at 800 MHz
133            - CPU_1200_DDR_750	-	CPU at 1200 MHz, DDR at 750 MHz
134
135- BOOTDEV
136
137        For Armada37x0 only, the flash boot device, default is ``SPINOR``.
138
139        Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
140
141            - SPINOR - SPI NOR flash boot
142            - SPINAND - SPI NAND flash boot
143            - EMMCNORM - eMMC Download Mode
144
145                Download boot loader or program code from eMMC flash into CM3 or CA53
146                Requires full initialization and command sequence
147
148            - SATA - SATA device boot
149
150- PARTNUM
151
152        For Armada37x0 only, the boot partition number, default is 0.
153
154        To boot from eMMC, the value should be aligned with the parameter in
155        U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
156        1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
157        build instructions.
158
159- WTMI_IMG
160
161        For Armada37x0 only, the path of the WTMI image can point to an image which
162        does nothing, an image which supports EFUSE or a customized CM3 firmware
163        binary. The default image is wtmi.bin that built from sources in WTP
164        folder, which is the next option. If the default image is OK, then this
165        option should be skipped.
166
167- WTP
168
169    For Armada37x0 only, use this parameter to point to wtptools source code
170    directory, which can be found as a3700_utils.zip in the release. Usage
171    example: ``WTP=/path/to/a3700_utils``
172
173    For example, in order to build the image in debug mode with log level up to 'notice' level run
174
175    .. code:: shell
176
177        > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> all fip
178
179    And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
180    the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
181    the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
182    line is as following
183
184    .. code:: shell
185
186        > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
187            MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 all fip
188
189    Supported MARVELL_PLATFORM are:
190        - a3700 (for both A3720 DB and EspressoBin)
191        - a70x0
192        - a70x0_amc (for AMC board)
193        - a80x0
194        - a80x0_mcbin (for MacciatoBin)
195
196Special Build Flags
197--------------------
198
199- PLAT_RECOVERY_IMAGE_ENABLE
200    When set this option to enable secondary recovery function when build atf.
201    In order to build UART recovery image this operation should be disabled for
202    a70x0 and a80x0 because of hardware limitation (boot from secondary image
203    can interrupt UART recovery process). This MACRO definition is set in
204    ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
205
206- DDR32
207    In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
208    this flag should be set to 1.
209
210For more information about build options, please refer to the
211:ref:`Build Options` document.
212
213
214Build output
215------------
216Marvell's TF-A compilation generates 7 files:
217
218    - ble.bin		- BLe image
219    - bl1.bin		- BL1 image
220    - bl2.bin		- BL2 image
221    - bl31.bin		- BL31 image
222    - fip.bin		- FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
223    - boot-image.bin	- TF-A image (contains BL1 and FIP images)
224    - flash-image.bin	- Image which contains boot-image.bin and SPL image.
225      Should be placed on the boot flash/device.
226
227
228Tools and external components installation
229------------------------------------------
230
231Armada37x0 Builds require installation of 3 components
232~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
233
234(1) ARM cross compiler capable of building images for the service CPU (CM3).
235    This component is usually included in the Linux host packages.
236    On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
237    using the following command
238
239    .. code:: shell
240
241        > sudo apt-get install gcc-arm-linux-gnueabi
242
243    Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
244    overwritten using the environment variable ``CROSS_CM3``.
245    Example for BASH shell
246
247    .. code:: shell
248
249        > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
250
251(2) DDR initialization library sources (mv_ddr) available at the following repository
252    (use the "mv_ddr-armada-atf-mainline" branch):
253
254    https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
255
256(3) Armada3700 tools available at the following repository (use the latest release branch):
257
258    https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
259
260Armada70x0 and Armada80x0 Builds require installation of an additional component
261~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
262
263(1) DDR initialization library sources (mv_ddr) available at the following repository
264    (use the "mv_ddr-armada-atf-mainline" branch):
265
266    https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
267