1a2847172SGrzegorz JaszczykTF-A Build Instructions for Marvell Platforms 2a2847172SGrzegorz Jaszczyk============================================= 3a2847172SGrzegorz Jaszczyk 4a2847172SGrzegorz JaszczykThis section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5a2847172SGrzegorz Jaszczyk 6a2847172SGrzegorz JaszczykBuild Instructions 7a2847172SGrzegorz Jaszczyk------------------ 8a2847172SGrzegorz Jaszczyk(1) Set the cross compiler 9a2847172SGrzegorz Jaszczyk 10a2847172SGrzegorz Jaszczyk .. code:: shell 11a2847172SGrzegorz Jaszczyk 12a2847172SGrzegorz Jaszczyk > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13a2847172SGrzegorz Jaszczyk 14a2847172SGrzegorz Jaszczyk(2) Set path for FIP images: 15a2847172SGrzegorz Jaszczyk 16a2847172SGrzegorz JaszczykSet U-Boot image path (relatively to TF-A root or absolute path) 17a2847172SGrzegorz Jaszczyk 18a2847172SGrzegorz Jaszczyk .. code:: shell 19a2847172SGrzegorz Jaszczyk 20a2847172SGrzegorz Jaszczyk > export BL33=path/to/u-boot.bin 21a2847172SGrzegorz Jaszczyk 22a2847172SGrzegorz JaszczykFor example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23a2847172SGrzegorz JaszczykBL33 should be ``~/project/u-boot/u-boot.bin`` 24a2847172SGrzegorz Jaszczyk 25a2847172SGrzegorz Jaszczyk .. note:: 26a2847172SGrzegorz Jaszczyk 27a2847172SGrzegorz Jaszczyk *u-boot.bin* should be used and not *u-boot-spl.bin* 28a2847172SGrzegorz Jaszczyk 29718dbcacSKonstantin PorotchkinSet MSS/SCP image path (mandatory only for A7K/8K/CN913x when MSS_SUPPORT=1) 30a2847172SGrzegorz Jaszczyk 31a2847172SGrzegorz Jaszczyk .. code:: shell 32a2847172SGrzegorz Jaszczyk 33a2847172SGrzegorz Jaszczyk > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34a2847172SGrzegorz Jaszczyk 35a2847172SGrzegorz Jaszczyk(3) Armada-37x0 build requires WTP tools installation. 36a2847172SGrzegorz Jaszczyk 37a2847172SGrzegorz JaszczykSee below in the section "Tools and external components installation". 38a2847172SGrzegorz JaszczykInstall ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39a2847172SGrzegorz Jaszczyk 40a2847172SGrzegorz Jaszczyk .. code:: shell 41a2847172SGrzegorz Jaszczyk 42a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 43a2847172SGrzegorz Jaszczyk 44a2847172SGrzegorz Jaszczyk(4) Clean previous build residuals (if any) 45a2847172SGrzegorz Jaszczyk 46a2847172SGrzegorz Jaszczyk .. code:: shell 47a2847172SGrzegorz Jaszczyk 48a2847172SGrzegorz Jaszczyk > make distclean 49a2847172SGrzegorz Jaszczyk 50a2847172SGrzegorz Jaszczyk(5) Build TF-A 51a2847172SGrzegorz Jaszczyk 52a2847172SGrzegorz JaszczykThere are several build options: 53a2847172SGrzegorz Jaszczyk 5424e6e10bSPali Rohár- PLAT 5524e6e10bSPali Rohár 5624e6e10bSPali Rohár Supported Marvell platforms are: 5724e6e10bSPali Rohár 5824e6e10bSPali Rohár - a3700 - A3720 DB, EspressoBin and Turris MOX 5924e6e10bSPali Rohár - a70x0 6024e6e10bSPali Rohár - a70x0_amc - AMC board 6124e6e10bSPali Rohár - a80x0 6224e6e10bSPali Rohár - a80x0_mcbin - MacchiatoBin 6324e6e10bSPali Rohár - a80x0_puzzle - IEI Puzzle-M801 6424e6e10bSPali Rohár - t9130 - CN913x 6524e6e10bSPali Rohár 66a2847172SGrzegorz Jaszczyk- DEBUG 67a2847172SGrzegorz Jaszczyk 68a2847172SGrzegorz Jaszczyk Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 69a2847172SGrzegorz Jaszczyk Must be disabled when building UART recovery images due to current console driver 70a2847172SGrzegorz Jaszczyk implementation that is not compatible with Xmodem protocol used for boot image download. 71a2847172SGrzegorz Jaszczyk 72a2847172SGrzegorz Jaszczyk- LOG_LEVEL 73a2847172SGrzegorz Jaszczyk 74a2847172SGrzegorz Jaszczyk Defines the level of logging which will be purged to the default output port. 75a2847172SGrzegorz Jaszczyk 76f20cb7e5SPali Rohár - 0 - LOG_LEVEL_NONE 77f20cb7e5SPali Rohár - 10 - LOG_LEVEL_ERROR 78f20cb7e5SPali Rohár - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 79f20cb7e5SPali Rohár - 30 - LOG_LEVEL_WARNING 80f20cb7e5SPali Rohár - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 81f20cb7e5SPali Rohár - 50 - LOG_LEVEL_VERBOSE 82a2847172SGrzegorz Jaszczyk 83a2847172SGrzegorz Jaszczyk- USE_COHERENT_MEM 84a2847172SGrzegorz Jaszczyk 85a2847172SGrzegorz Jaszczyk This flag determines whether to include the coherent memory region in the 86f20cb7e5SPali Rohár BL memory map or not. Enabled by default. 87a2847172SGrzegorz Jaszczyk 88a2847172SGrzegorz Jaszczyk- LLC_ENABLE 89a2847172SGrzegorz Jaszczyk 90a2847172SGrzegorz Jaszczyk Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 91a2847172SGrzegorz Jaszczyk 925a40d70fSKonstantin Porotchkin- LLC_SRAM 935a40d70fSKonstantin Porotchkin 940a977b9bSKonstantin Porotchkin Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 950a977b9bSKonstantin Porotchkin by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 960a977b9bSKonstantin Porotchkin for SRAM address range at BL31 execution stage with window target set to DRAM-0. 970a977b9bSKonstantin Porotchkin When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 980a977b9bSKonstantin Porotchkin There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 990a977b9bSKonstantin Porotchkin Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 1005a40d70fSKonstantin Porotchkin 101d9243f26SMarek Behún- CM3_SYSTEM_RESET 102d9243f26SMarek Behún 103d9243f26SMarek Behún For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will 104d9243f26SMarek Behún be used for system reset. 105d9243f26SMarek Behún TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 106d9243f26SMarek Behún Cortex-M3 secure coprocessor. 107d9243f26SMarek Behún The firmware running in the coprocessor must either implement this functionality or 108d9243f26SMarek Behún ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 109d9243f26SMarek Behún repository). If this option is enabled but the firmware does not support this command, 110d9243f26SMarek Behún an error message will be printed prior trying to reboot via the usual way. 111d9243f26SMarek Behún 112d9243f26SMarek Behún This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 113d9243f26SMarek Behún sometime hang the board. 114d9243f26SMarek Behún 115f2800a47SPali Rohár- A3720_DB_PM_WAKEUP_SRC 116f2800a47SPali Rohár 117f2800a47SPali Rohár For Armada 3720 Develpment Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``, 118f2800a47SPali Rohár TF-A will setup PM wake up src configuration. This option is disabled by default. 119f2800a47SPali Rohár 120a2847172SGrzegorz Jaszczyk- MARVELL_SECURE_BOOT 121a2847172SGrzegorz Jaszczyk 122a2847172SGrzegorz Jaszczyk Build trusted(=1)/non trusted(=0) image, default is non trusted. 123a2847172SGrzegorz Jaszczyk 124a2847172SGrzegorz Jaszczyk- BLE_PATH 125a2847172SGrzegorz Jaszczyk 126eed02440SKonstantin Porotchkin Points to BLE (Binary ROM extension) sources folder. 127eed02440SKonstantin Porotchkin Only required for A7K/8K/CN913x builds. 128a2847172SGrzegorz Jaszczyk The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``. 129a2847172SGrzegorz Jaszczyk 130a2847172SGrzegorz Jaszczyk- MV_DDR_PATH 131a2847172SGrzegorz Jaszczyk 132528dafc3SPali Rohár This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets. 133*2baf5038SPali Rohár For A7K/8K/CN913x it is used for BLE build and for Armada37x0 it used 134*2baf5038SPali Rohár for ddr_tool build. 135528dafc3SPali Rohár 136*2baf5038SPali Rohár Specify path to the full checkout of Marvell mv-ddr-marvell git 137*2baf5038SPali Rohár repository. Checkout must contain also .git subdirectory because 138*2baf5038SPali Rohár mv-ddr build process calls git commands. 139a2847172SGrzegorz Jaszczyk 140*2baf5038SPali Rohár Do not remove any parts of git checkout becuase build process and other 141*2baf5038SPali Rohár applications need them for correct building and version determination. 142494be3eeSPali Rohár 143eed02440SKonstantin Porotchkin- CP_NUM 144eed02440SKonstantin Porotchkin 145eed02440SKonstantin Porotchkin Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 146eed02440SKonstantin Porotchkin the build uses the default number of CPs, which is a number of embedded CPs inside the 147eed02440SKonstantin Porotchkin package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 148eed02440SKonstantin Porotchkin family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 149eed02440SKonstantin Porotchkin values with CP_NUM are in a range of 1 to 3. 150eed02440SKonstantin Porotchkin 151a2847172SGrzegorz Jaszczyk- DDR_TOPOLOGY 152a2847172SGrzegorz Jaszczyk 153a2847172SGrzegorz Jaszczyk For Armada37x0 only, the DDR topology map index/name, default is 0. 154a2847172SGrzegorz Jaszczyk 155a2847172SGrzegorz Jaszczyk Supported Options: 1569c3fffdcSPali Rohár - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 1579c3fffdcSPali Rohár - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular) 1589c3fffdcSPali Rohár - 2 - DDR3 2CS 1GB (EspressoBin V3-V5) 1599c3fffdcSPali Rohár - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular) 1609c3fffdcSPali Rohár - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 1619c3fffdcSPali Rohár - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra) 1629c3fffdcSPali Rohár - 6 - DDR4 2CS 2GB (EspressoBin V7) 1639c3fffdcSPali Rohár - 7 - DDR3 2CS 2GB (EspressoBin V3-V5) 1649c3fffdcSPali Rohár - CUST - CUSTOMER BOARD (Customer board settings) 165a2847172SGrzegorz Jaszczyk 166a2847172SGrzegorz Jaszczyk- CLOCKSPRESET 167a2847172SGrzegorz Jaszczyk 168a2847172SGrzegorz Jaszczyk For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency, 169a2847172SGrzegorz Jaszczyk default is CPU_800_DDR_800. 170a2847172SGrzegorz Jaszczyk 171a2847172SGrzegorz Jaszczyk - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 172a2847172SGrzegorz Jaszczyk - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 173a2847172SGrzegorz Jaszczyk - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 174a2847172SGrzegorz Jaszczyk - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 175a2847172SGrzegorz Jaszczyk 17623abf07cSPali Rohár Look at Armada37x0 chip package marking on board to identify correct CPU frequency. 17723abf07cSPali Rohár The last line on package marking (next line after the 88F37x0 line) should contain: 17823abf07cSPali Rohár 17923abf07cSPali Rohár - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800`` 18023abf07cSPali Rohár - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800`` 18123abf07cSPali Rohár - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750`` 18223abf07cSPali Rohár 183a2847172SGrzegorz Jaszczyk- BOOTDEV 184a2847172SGrzegorz Jaszczyk 185a2847172SGrzegorz Jaszczyk For Armada37x0 only, the flash boot device, default is ``SPINOR``. 186a2847172SGrzegorz Jaszczyk 187a2847172SGrzegorz Jaszczyk Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 188a2847172SGrzegorz Jaszczyk 189a2847172SGrzegorz Jaszczyk - SPINOR - SPI NOR flash boot 190a2847172SGrzegorz Jaszczyk - SPINAND - SPI NAND flash boot 191a2847172SGrzegorz Jaszczyk - EMMCNORM - eMMC Download Mode 192a2847172SGrzegorz Jaszczyk 193a2847172SGrzegorz Jaszczyk Download boot loader or program code from eMMC flash into CM3 or CA53 194a2847172SGrzegorz Jaszczyk Requires full initialization and command sequence 195a2847172SGrzegorz Jaszczyk 196a2847172SGrzegorz Jaszczyk - SATA - SATA device boot 197a2847172SGrzegorz Jaszczyk 19833af2937SPali Rohár Image needs to be stored at disk LBA 0 or at disk partition with 19933af2937SPali Rohár MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with 20033af2937SPali Rohár GPT name ``MARVELL BOOT PARTITION``. 20133af2937SPali Rohár 202a2847172SGrzegorz Jaszczyk- PARTNUM 203a2847172SGrzegorz Jaszczyk 204a2847172SGrzegorz Jaszczyk For Armada37x0 only, the boot partition number, default is 0. 205a2847172SGrzegorz Jaszczyk 206a2847172SGrzegorz Jaszczyk To boot from eMMC, the value should be aligned with the parameter in 207a2847172SGrzegorz Jaszczyk U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 208a2847172SGrzegorz Jaszczyk 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 209a2847172SGrzegorz Jaszczyk build instructions. 210a2847172SGrzegorz Jaszczyk 211a2847172SGrzegorz Jaszczyk- WTMI_IMG 212a2847172SGrzegorz Jaszczyk 213711a6bb7SPali Rohár For Armada37x0 only, the path of the binary can point to an image which 214a2847172SGrzegorz Jaszczyk does nothing, an image which supports EFUSE or a customized CM3 firmware 215711a6bb7SPali Rohár binary. The default image is ``fuse.bin`` that built from sources in WTP 216a2847172SGrzegorz Jaszczyk folder, which is the next option. If the default image is OK, then this 217a2847172SGrzegorz Jaszczyk option should be skipped. 218a2847172SGrzegorz Jaszczyk 219711a6bb7SPali Rohár Please note that this is not a full WTMI image, just a main loop without 220711a6bb7SPali Rohár hardware initialization code. Final WTMI image is built from this WTMI_IMG 221711a6bb7SPali Rohár binary and sys-init code from the WTP directory which sets DDR and CPU 222711a6bb7SPali Rohár clocks according to DDR_TOPOLOGY and CLOCKSPRESET options. 223711a6bb7SPali Rohár 2244fe571b8SPali Rohár CZ.NIC as part of Turris project released free and open source WTMI 2254fe571b8SPali Rohár application firmware ``wtmi_app.bin`` for all Armada 3720 devices. 2264fe571b8SPali Rohár This firmware includes additional features like access to Hardware 2274fe571b8SPali Rohár Random Number Generator of Armada 3720 SoC which original Marvell's 2284fe571b8SPali Rohár ``fuse.bin`` image does not have. 2294fe571b8SPali Rohár 2304fe571b8SPali Rohár CZ.NIC's Armada 3720 Secure Firmware is available at website: 2314fe571b8SPali Rohár 2324fe571b8SPali Rohár https://gitlab.nic.cz/turris/mox-boot-builder/ 2334fe571b8SPali Rohár 234a2847172SGrzegorz Jaszczyk- WTP 235a2847172SGrzegorz Jaszczyk 236*2baf5038SPali Rohár For Armada37x0 only. 237a2847172SGrzegorz Jaszczyk 238*2baf5038SPali Rohár Specify path to the full checkout of Marvell A3700-utils-marvell git 239*2baf5038SPali Rohár repository. Checkout must contain also .git subdirectory because WTP 240*2baf5038SPali Rohár build process calls git commands. 241*2baf5038SPali Rohár 242*2baf5038SPali Rohár WTP build process uses also Marvell mv-ddr-marvell git repository 243*2baf5038SPali Rohár specified in MV_DDR_PATH option. 244*2baf5038SPali Rohár 245*2baf5038SPali Rohár Do not remove any parts of git checkout becuase build process and other 246*2baf5038SPali Rohár applications need them for correct building and version determination. 247494be3eeSPali Rohár 248f20cb7e5SPali Rohár- CRYPTOPP_PATH 249f20cb7e5SPali Rohár 2508708a884SPali Rohár For Armada37x0 only, use this parameter to point to Crypto++ source code 2518708a884SPali Rohár directory. If this option is specified then Crypto++ source code in 2528708a884SPali Rohár CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library 2538708a884SPali Rohár is required for building WTP image tool. Either CRYPTOPP_PATH or 2548708a884SPali Rohár CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0. 2558708a884SPali Rohár 2568708a884SPali Rohár- CRYPTOPP_LIBDIR 2578708a884SPali Rohár 2588708a884SPali Rohár For Armada37x0 only, use this parameter to point to the directory with 2598708a884SPali Rohár compiled Crypto++ library. By default it points to the CRYPTOPP_PATH. 2608708a884SPali Rohár 2618708a884SPali Rohár- CRYPTOPP_INCDIR 2628708a884SPali Rohár 2638708a884SPali Rohár For Armada37x0 only, use this parameter to point to the directory with 2648708a884SPali Rohár header files of Crypto++ library. By default it points to the CRYPTOPP_PATH. 265f20cb7e5SPali Rohár 266f20cb7e5SPali Rohár 267a2847172SGrzegorz JaszczykFor example, in order to build the image in debug mode with log level up to 'notice' level run 268a2847172SGrzegorz Jaszczyk 269a2847172SGrzegorz Jaszczyk.. code:: shell 270a2847172SGrzegorz Jaszczyk 271f20cb7e5SPali Rohár > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 272a2847172SGrzegorz Jaszczyk 273a2847172SGrzegorz JaszczykAnd if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 274a2847172SGrzegorz Jaszczykthe image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 275a2847172SGrzegorz Jaszczykthe image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 276a2847172SGrzegorz Jaszczykline is as following 277a2847172SGrzegorz Jaszczyk 278a2847172SGrzegorz Jaszczyk.. code:: shell 279a2847172SGrzegorz Jaszczyk 280a2847172SGrzegorz Jaszczyk > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 281f20cb7e5SPali Rohár MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 282f20cb7e5SPali Rohár MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 283f20cb7e5SPali Rohár CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 2848b920973SPali Rohár all fip mrvl_bootimage mrvl_flash mrvl_uart 285f20cb7e5SPali Rohár 286f20cb7e5SPali RohárTo build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 287f20cb7e5SPali Rohár 288f20cb7e5SPali Rohár.. code:: shell 289f20cb7e5SPali Rohár 290d9243f26SMarek Behún > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 291d9243f26SMarek Behún CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 292a2847172SGrzegorz Jaszczyk 293ff46a41dSPali RohárHere is full example how to build production release of Marvell firmware image (concatenated 2944fe571b8SPali Rohárbinary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for 2954fe571b8SPali RohárEspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and 2964fe571b8SPali Rohár1GB DDR4 RAM (DDR_TOPOLOGY=5): 297d0b367b7SLuka Kovacic 298d0b367b7SLuka Kovacic.. code:: shell 299d0b367b7SLuka Kovacic 3004fe571b8SPali Rohár > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git 3014fe571b8SPali Rohár > git clone https://source.denx.de/u-boot/u-boot.git 302ff46a41dSPali Rohár > git clone https://github.com/weidai11/cryptopp.git 3034fe571b8SPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 3044fe571b8SPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 3054fe571b8SPali Rohár > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git 306ff46a41dSPali Rohár > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin 3074fe571b8SPali Rohár > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin 308ff46a41dSPali Rohár > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \ 309ff46a41dSPali Rohár USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \ 3104fe571b8SPali Rohár MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \ 3114fe571b8SPali Rohár CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \ 3124fe571b8SPali Rohár WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash 313d0b367b7SLuka Kovacic 314ff46a41dSPali RohárProduced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin`` 315a2847172SGrzegorz Jaszczyk 316a2847172SGrzegorz JaszczykSpecial Build Flags 317a2847172SGrzegorz Jaszczyk-------------------- 318a2847172SGrzegorz Jaszczyk 319a2847172SGrzegorz Jaszczyk- PLAT_RECOVERY_IMAGE_ENABLE 320a2847172SGrzegorz Jaszczyk When set this option to enable secondary recovery function when build atf. 321a2847172SGrzegorz Jaszczyk In order to build UART recovery image this operation should be disabled for 322eed02440SKonstantin Porotchkin A7K/8K/CN913x because of hardware limitation (boot from secondary image 323a2847172SGrzegorz Jaszczyk can interrupt UART recovery process). This MACRO definition is set in 324a2847172SGrzegorz Jaszczyk ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 325a2847172SGrzegorz Jaszczyk 32657adbf37SAlex Leibovich- DDR32 32757adbf37SAlex Leibovich In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 32857adbf37SAlex Leibovich this flag should be set to 1. 32957adbf37SAlex Leibovich 330a2847172SGrzegorz JaszczykFor more information about build options, please refer to the 331a2847172SGrzegorz Jaszczyk:ref:`Build Options` document. 332a2847172SGrzegorz Jaszczyk 333a2847172SGrzegorz Jaszczyk 334a2847172SGrzegorz JaszczykBuild output 335a2847172SGrzegorz Jaszczyk------------ 336f20cb7e5SPali RohárMarvell's TF-A compilation generates 8 files: 337a2847172SGrzegorz Jaszczyk 338f60f1e84SPali Rohár - ble.bin - BLe image (not available for Armada37x0) 339a2847172SGrzegorz Jaszczyk - bl1.bin - BL1 image 340a2847172SGrzegorz Jaszczyk - bl2.bin - BL2 image 341a2847172SGrzegorz Jaszczyk - bl31.bin - BL31 image 342a2847172SGrzegorz Jaszczyk - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 343a2847172SGrzegorz Jaszczyk - boot-image.bin - TF-A image (contains BL1 and FIP images) 344f60f1e84SPali Rohár - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it 345f60f1e84SPali Rohár contains TIM, WTMI and boot-image.bin images. For other platforms it contains 346f60f1e84SPali Rohár BLe and boot-image.bin images. Should be placed on the boot flash/device. 347f20cb7e5SPali Rohár - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 348f20cb7e5SPali Rohár for booting via UART. Could be loaded via Marvell's WtpDownload tool from 349f20cb7e5SPali Rohár A3700-utils-marvell repository. 350f20cb7e5SPali Rohár 3518b920973SPali RohárAdditional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target 3528b920973SPali Rohár``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart`` 3538b920973SPali Rohárproduce ``uart-images.tgz.bin`` file. 354a2847172SGrzegorz Jaszczyk 355a2847172SGrzegorz Jaszczyk 356a2847172SGrzegorz JaszczykTools and external components installation 357a2847172SGrzegorz Jaszczyk------------------------------------------ 358a2847172SGrzegorz Jaszczyk 359a2847172SGrzegorz JaszczykArmada37x0 Builds require installation of 3 components 360a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 361a2847172SGrzegorz Jaszczyk 362a2847172SGrzegorz Jaszczyk(1) ARM cross compiler capable of building images for the service CPU (CM3). 363a2847172SGrzegorz Jaszczyk This component is usually included in the Linux host packages. 364a2847172SGrzegorz Jaszczyk On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 365a2847172SGrzegorz Jaszczyk using the following command 366a2847172SGrzegorz Jaszczyk 367a2847172SGrzegorz Jaszczyk .. code:: shell 368a2847172SGrzegorz Jaszczyk 369a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 370a2847172SGrzegorz Jaszczyk 371a2847172SGrzegorz Jaszczyk Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 372a2847172SGrzegorz Jaszczyk overwritten using the environment variable ``CROSS_CM3``. 373a2847172SGrzegorz Jaszczyk Example for BASH shell 374a2847172SGrzegorz Jaszczyk 375a2847172SGrzegorz Jaszczyk .. code:: shell 376a2847172SGrzegorz Jaszczyk 377a2847172SGrzegorz Jaszczyk > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 378a2847172SGrzegorz Jaszczyk 379a2847172SGrzegorz Jaszczyk(2) DDR initialization library sources (mv_ddr) available at the following repository 3801cea0213SPali Rohár (use the "master" branch): 381a2847172SGrzegorz Jaszczyk 382a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 383a2847172SGrzegorz Jaszczyk 384583079aeSPali Rohár(3) Armada3700 tools available at the following repository 3851cea0213SPali Rohár (use the "master" branch): 386a2847172SGrzegorz Jaszczyk 387a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 388a2847172SGrzegorz Jaszczyk 389f20cb7e5SPali Rohár(4) Crypto++ library available at the following repository: 390f20cb7e5SPali Rohár 391f20cb7e5SPali Rohár https://github.com/weidai11/cryptopp.git 392f20cb7e5SPali Rohár 393a2847172SGrzegorz JaszczykArmada70x0 and Armada80x0 Builds require installation of an additional component 394a2847172SGrzegorz Jaszczyk~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 395a2847172SGrzegorz Jaszczyk 396a2847172SGrzegorz Jaszczyk(1) DDR initialization library sources (mv_ddr) available at the following repository 3971cea0213SPali Rohár (use the "master" branch): 398a2847172SGrzegorz Jaszczyk 399a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 400