1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <bl32.h> 32 #include <tsp.h> 33 #include <arch_helpers.h> 34 #include <stdio.h> 35 #include <platform.h> 36 #include <debug.h> 37 #include <spinlock.h> 38 39 /******************************************************************************* 40 * Lock to control access to the console 41 ******************************************************************************/ 42 spinlock_t console_lock; 43 44 /******************************************************************************* 45 * Per cpu data structure to populate parameters for an SMC in C code and use 46 * a pointer to this structure in assembler code to populate x0-x7 47 ******************************************************************************/ 48 static tsp_args_t tsp_smc_args[PLATFORM_CORE_COUNT]; 49 50 /******************************************************************************* 51 * Per cpu data structure to keep track of TSP activity 52 ******************************************************************************/ 53 static work_statistics_t tsp_stats[PLATFORM_CORE_COUNT]; 54 55 /******************************************************************************* 56 * Single reference to the various entry points exported by the test secure 57 * payload. A single copy should suffice for all cpus as they are not expected 58 * to change. 59 ******************************************************************************/ 60 static const entry_info_t tsp_entry_info = { 61 tsp_fast_smc_entry, 62 tsp_cpu_on_entry, 63 tsp_cpu_off_entry, 64 tsp_cpu_resume_entry, 65 tsp_cpu_suspend_entry, 66 }; 67 68 static tsp_args_t *set_smc_args(uint64_t arg0, 69 uint64_t arg1, 70 uint64_t arg2, 71 uint64_t arg3, 72 uint64_t arg4, 73 uint64_t arg5, 74 uint64_t arg6, 75 uint64_t arg7) 76 { 77 uint64_t mpidr = read_mpidr(); 78 uint32_t linear_id; 79 tsp_args_t *pcpu_smc_args; 80 81 /* 82 * Return to Secure Monitor by raising an SMC. The results of the 83 * service are passed as an arguments to the SMC 84 */ 85 linear_id = platform_get_core_pos(mpidr); 86 pcpu_smc_args = &tsp_smc_args[linear_id]; 87 write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0); 88 write_sp_arg(pcpu_smc_args, TSP_ARG1, arg1); 89 write_sp_arg(pcpu_smc_args, TSP_ARG2, arg2); 90 write_sp_arg(pcpu_smc_args, TSP_ARG3, arg3); 91 write_sp_arg(pcpu_smc_args, TSP_ARG4, arg4); 92 write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5); 93 write_sp_arg(pcpu_smc_args, TSP_ARG6, arg6); 94 write_sp_arg(pcpu_smc_args, TSP_ARG7, arg7); 95 96 return pcpu_smc_args; 97 } 98 99 /******************************************************************************* 100 * TSP main entry point where it gets the opportunity to initialize its secure 101 * state/applications. Once the state is initialized, it must return to the 102 * SPD with a pointer to the 'tsp_entry_info' structure. 103 ******************************************************************************/ 104 uint64_t tsp_main(void) 105 { 106 uint64_t mpidr = read_mpidr(); 107 uint32_t linear_id = platform_get_core_pos(mpidr); 108 109 #if DEBUG 110 meminfo_t *mem_layout = bl32_plat_sec_mem_layout(); 111 #endif 112 113 /* Initialize the platform */ 114 bl32_platform_setup(); 115 116 /* Initialize secure/applications state here */ 117 118 /* Update this cpu's statistics */ 119 tsp_stats[linear_id].smc_count++; 120 tsp_stats[linear_id].eret_count++; 121 tsp_stats[linear_id].cpu_on_count++; 122 123 spin_lock(&console_lock); 124 printf("TSP %s\n\r", build_message); 125 INFO("Total memory base : 0x%x\n", mem_layout->total_base); 126 INFO("Total memory size : 0x%x bytes\n", mem_layout->total_size); 127 INFO("Free memory base : 0x%x\n", mem_layout->free_base); 128 INFO("Free memory size : 0x%x bytes\n", mem_layout->free_size); 129 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr, 130 tsp_stats[linear_id].smc_count, 131 tsp_stats[linear_id].eret_count, 132 tsp_stats[linear_id].cpu_on_count); 133 spin_unlock(&console_lock); 134 135 /* 136 * TODO: There is a massive assumption that the SPD and SP can see each 137 * other's memory without issues so it is safe to pass pointers to 138 * internal memory. Replace this with a shared communication buffer. 139 */ 140 return (uint64_t) &tsp_entry_info; 141 } 142 143 /******************************************************************************* 144 * This function performs any remaining book keeping in the test secure payload 145 * after this cpu's architectural state has been setup in response to an earlier 146 * psci cpu_on request. 147 ******************************************************************************/ 148 tsp_args_t *tsp_cpu_on_main(void) 149 { 150 uint64_t mpidr = read_mpidr(); 151 uint32_t linear_id = platform_get_core_pos(mpidr); 152 153 /* Update this cpu's statistics */ 154 tsp_stats[linear_id].smc_count++; 155 tsp_stats[linear_id].eret_count++; 156 tsp_stats[linear_id].cpu_on_count++; 157 158 spin_lock(&console_lock); 159 printf("SP: cpu 0x%x turned on\n\r", mpidr); 160 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr, 161 tsp_stats[linear_id].smc_count, 162 tsp_stats[linear_id].eret_count, 163 tsp_stats[linear_id].cpu_on_count); 164 spin_unlock(&console_lock); 165 166 /* Indicate to the SPD that we have completed turned ourselves on */ 167 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0); 168 } 169 170 /******************************************************************************* 171 * This function performs any remaining book keeping in the test secure payload 172 * before this cpu is turned off in response to a psci cpu_off request. 173 ******************************************************************************/ 174 tsp_args_t *tsp_cpu_off_main(uint64_t arg0, 175 uint64_t arg1, 176 uint64_t arg2, 177 uint64_t arg3, 178 uint64_t arg4, 179 uint64_t arg5, 180 uint64_t arg6, 181 uint64_t arg7) 182 { 183 uint64_t mpidr = read_mpidr(); 184 uint32_t linear_id = platform_get_core_pos(mpidr); 185 186 /* Update this cpu's statistics */ 187 tsp_stats[linear_id].smc_count++; 188 tsp_stats[linear_id].eret_count++; 189 tsp_stats[linear_id].cpu_off_count++; 190 191 spin_lock(&console_lock); 192 printf("SP: cpu 0x%x off request\n\r", mpidr); 193 INFO("cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr, 194 tsp_stats[linear_id].smc_count, 195 tsp_stats[linear_id].eret_count, 196 tsp_stats[linear_id].cpu_off_count); 197 spin_unlock(&console_lock); 198 199 200 /* Indicate to the SPD that we have completed this request */ 201 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0); 202 } 203 204 /******************************************************************************* 205 * This function performs any book keeping in the test secure payload before 206 * this cpu's architectural state is saved in response to an earlier psci 207 * cpu_suspend request. 208 ******************************************************************************/ 209 tsp_args_t *tsp_cpu_suspend_main(uint64_t power_state, 210 uint64_t arg1, 211 uint64_t arg2, 212 uint64_t arg3, 213 uint64_t arg4, 214 uint64_t arg5, 215 uint64_t arg6, 216 uint64_t arg7) 217 { 218 uint64_t mpidr = read_mpidr(); 219 uint32_t linear_id = platform_get_core_pos(mpidr); 220 221 /* Update this cpu's statistics */ 222 tsp_stats[linear_id].smc_count++; 223 tsp_stats[linear_id].eret_count++; 224 tsp_stats[linear_id].cpu_suspend_count++; 225 226 spin_lock(&console_lock); 227 printf("SP: cpu 0x%x suspend request. power state: 0x%x\n\r", 228 mpidr, power_state); 229 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr, 230 tsp_stats[linear_id].smc_count, 231 tsp_stats[linear_id].eret_count, 232 tsp_stats[linear_id].cpu_suspend_count); 233 spin_unlock(&console_lock); 234 235 /* Indicate to the SPD that we have completed this request */ 236 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0); 237 } 238 239 /******************************************************************************* 240 * This function performs any book keeping in the test secure payload after this 241 * cpu's architectural state has been restored after wakeup from an earlier psci 242 * cpu_suspend request. 243 ******************************************************************************/ 244 tsp_args_t *tsp_cpu_resume_main(uint64_t suspend_level, 245 uint64_t arg1, 246 uint64_t arg2, 247 uint64_t arg3, 248 uint64_t arg4, 249 uint64_t arg5, 250 uint64_t arg6, 251 uint64_t arg7) 252 { 253 uint64_t mpidr = read_mpidr(); 254 uint32_t linear_id = platform_get_core_pos(mpidr); 255 256 /* Update this cpu's statistics */ 257 tsp_stats[linear_id].smc_count++; 258 tsp_stats[linear_id].eret_count++; 259 tsp_stats[linear_id].cpu_resume_count++; 260 261 spin_lock(&console_lock); 262 printf("SP: cpu 0x%x resumed. suspend level %d \n\r", 263 mpidr, suspend_level); 264 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr, 265 tsp_stats[linear_id].smc_count, 266 tsp_stats[linear_id].eret_count, 267 tsp_stats[linear_id].cpu_suspend_count); 268 spin_unlock(&console_lock); 269 270 /* Indicate to the SPD that we have completed this request */ 271 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0); 272 } 273 274 /******************************************************************************* 275 * TSP fast smc handler. The secure monitor jumps to this function by 276 * doing the ERET after populating X0-X7 registers. The arguments are received 277 * in the function arguments in order. Once the service is rendered, this 278 * function returns to Secure Monitor by raising SMC 279 ******************************************************************************/ 280 tsp_args_t *tsp_fast_smc_handler(uint64_t func, 281 uint64_t arg1, 282 uint64_t arg2, 283 uint64_t arg3, 284 uint64_t arg4, 285 uint64_t arg5, 286 uint64_t arg6, 287 uint64_t arg7) 288 { 289 uint64_t results[2]; 290 uint64_t service_args[2]; 291 uint64_t mpidr = read_mpidr(); 292 uint32_t linear_id = platform_get_core_pos(mpidr); 293 294 /* Update this cpu's statistics */ 295 tsp_stats[linear_id].smc_count++; 296 tsp_stats[linear_id].eret_count++; 297 298 printf("SP: cpu 0x%x received fast smc 0x%x\n", read_mpidr(), func); 299 INFO("cpu 0x%x: %d smcs, %d erets\n", mpidr, 300 tsp_stats[linear_id].smc_count, 301 tsp_stats[linear_id].eret_count); 302 303 /* Render secure services and obtain results here */ 304 305 results[0] = arg1; 306 results[1] = arg2; 307 308 /* 309 * Request a service back from dispatcher/secure monitor. This call 310 * return and thereafter resume exectuion 311 */ 312 tsp_get_magic(service_args); 313 314 /* Determine the function to perform based on the function ID */ 315 switch (func) { 316 case TSP_FID_ADD: 317 results[0] += service_args[0]; 318 results[1] += service_args[1]; 319 break; 320 case TSP_FID_SUB: 321 results[0] -= service_args[0]; 322 results[1] -= service_args[1]; 323 break; 324 case TSP_FID_MUL: 325 results[0] *= service_args[0]; 326 results[1] *= service_args[1]; 327 break; 328 case TSP_FID_DIV: 329 results[0] /= service_args[0] ? service_args[0] : 1; 330 results[1] /= service_args[1] ? service_args[1] : 1; 331 break; 332 default: 333 break; 334 } 335 336 return set_smc_args(func, 337 results[0], 338 results[1], 339 0, 0, 0, 0, 0); 340 } 341 342