1 /* 2 * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <inttypes.h> 9 #include <stdint.h> 10 11 #include <arch_features.h> 12 #include <arch_helpers.h> 13 #include <bl32/tsp/tsp.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <lib/spinlock.h> 17 #include <plat/common/platform.h> 18 #include <platform_tsp.h> 19 #include "tsp_private.h" 20 21 #include <platform_def.h> 22 23 /******************************************************************************* 24 * TSP main entry point where it gets the opportunity to initialize its secure 25 * state/applications. Once the state is initialized, it must return to the 26 * SPD with a pointer to the 'tsp_vector_table' jump table. 27 ******************************************************************************/ 28 uint64_t tsp_main(void) 29 { 30 NOTICE("TSP: %s\n", version_string); 31 NOTICE("TSP: %s\n", build_message); 32 INFO("TSP: Total memory base : 0x%lx\n", (unsigned long) BL32_BASE); 33 INFO("TSP: Total memory size : 0x%lx bytes\n", BL32_TOTAL_SIZE); 34 35 uint32_t linear_id = plat_my_core_pos(); 36 37 /* Initialize the platform */ 38 tsp_platform_setup(); 39 40 /* Initialize secure/applications state here */ 41 tsp_generic_timer_start(); 42 43 /* Update this cpu's statistics */ 44 tsp_stats[linear_id].smc_count++; 45 tsp_stats[linear_id].eret_count++; 46 tsp_stats[linear_id].cpu_on_count++; 47 48 #if LOG_LEVEL >= LOG_LEVEL_INFO 49 spin_lock(&console_lock); 50 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n", 51 read_mpidr(), 52 tsp_stats[linear_id].smc_count, 53 tsp_stats[linear_id].eret_count, 54 tsp_stats[linear_id].cpu_on_count); 55 spin_unlock(&console_lock); 56 #endif 57 return (uint64_t) &tsp_vector_table; 58 } 59 60 /******************************************************************************* 61 * This function performs any remaining book keeping in the test secure payload 62 * after this cpu's architectural state has been setup in response to an earlier 63 * psci cpu_on request. 64 ******************************************************************************/ 65 smc_args_t *tsp_cpu_on_main(void) 66 { 67 uint32_t linear_id = plat_my_core_pos(); 68 69 /* Initialize secure/applications state here */ 70 tsp_generic_timer_start(); 71 72 /* Update this cpu's statistics */ 73 tsp_stats[linear_id].smc_count++; 74 tsp_stats[linear_id].eret_count++; 75 tsp_stats[linear_id].cpu_on_count++; 76 77 #if LOG_LEVEL >= LOG_LEVEL_INFO 78 spin_lock(&console_lock); 79 INFO("TSP: cpu 0x%lx turned on\n", read_mpidr()); 80 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu on requests\n", 81 read_mpidr(), 82 tsp_stats[linear_id].smc_count, 83 tsp_stats[linear_id].eret_count, 84 tsp_stats[linear_id].cpu_on_count); 85 spin_unlock(&console_lock); 86 #endif 87 /* Indicate to the SPD that we have completed turned ourselves on */ 88 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0); 89 } 90 91 /******************************************************************************* 92 * This function performs any remaining book keeping in the test secure payload 93 * before this cpu is turned off in response to a psci cpu_off request. 94 ******************************************************************************/ 95 smc_args_t *tsp_cpu_off_main(uint64_t arg0, 96 uint64_t arg1, 97 uint64_t arg2, 98 uint64_t arg3, 99 uint64_t arg4, 100 uint64_t arg5, 101 uint64_t arg6, 102 uint64_t arg7) 103 { 104 uint32_t linear_id = plat_my_core_pos(); 105 106 /* 107 * This cpu is being turned off, so disable the timer to prevent the 108 * secure timer interrupt from interfering with power down. A pending 109 * interrupt will be lost but we do not care as we are turning off. 110 */ 111 tsp_generic_timer_stop(); 112 113 /* Update this cpu's statistics */ 114 tsp_stats[linear_id].smc_count++; 115 tsp_stats[linear_id].eret_count++; 116 tsp_stats[linear_id].cpu_off_count++; 117 118 #if LOG_LEVEL >= LOG_LEVEL_INFO 119 spin_lock(&console_lock); 120 INFO("TSP: cpu 0x%lx off request\n", read_mpidr()); 121 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu off requests\n", 122 read_mpidr(), 123 tsp_stats[linear_id].smc_count, 124 tsp_stats[linear_id].eret_count, 125 tsp_stats[linear_id].cpu_off_count); 126 spin_unlock(&console_lock); 127 #endif 128 129 /* Indicate to the SPD that we have completed this request */ 130 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0); 131 } 132 133 /******************************************************************************* 134 * This function performs any book keeping in the test secure payload before 135 * this cpu's architectural state is saved in response to an earlier psci 136 * cpu_suspend request. 137 ******************************************************************************/ 138 smc_args_t *tsp_cpu_suspend_main(uint64_t arg0, 139 uint64_t arg1, 140 uint64_t arg2, 141 uint64_t arg3, 142 uint64_t arg4, 143 uint64_t arg5, 144 uint64_t arg6, 145 uint64_t arg7) 146 { 147 uint32_t linear_id = plat_my_core_pos(); 148 149 /* 150 * Save the time context and disable it to prevent the secure timer 151 * interrupt from interfering with wakeup from the suspend state. 152 */ 153 tsp_generic_timer_save(); 154 tsp_generic_timer_stop(); 155 156 /* Update this cpu's statistics */ 157 tsp_stats[linear_id].smc_count++; 158 tsp_stats[linear_id].eret_count++; 159 tsp_stats[linear_id].cpu_suspend_count++; 160 161 #if LOG_LEVEL >= LOG_LEVEL_INFO 162 spin_lock(&console_lock); 163 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n", 164 read_mpidr(), 165 tsp_stats[linear_id].smc_count, 166 tsp_stats[linear_id].eret_count, 167 tsp_stats[linear_id].cpu_suspend_count); 168 spin_unlock(&console_lock); 169 #endif 170 171 /* Indicate to the SPD that we have completed this request */ 172 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0); 173 } 174 175 /******************************************************************************* 176 * This function performs any book keeping in the test secure payload after this 177 * cpu's architectural state has been restored after wakeup from an earlier psci 178 * cpu_suspend request. 179 ******************************************************************************/ 180 smc_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl, 181 uint64_t arg1, 182 uint64_t arg2, 183 uint64_t arg3, 184 uint64_t arg4, 185 uint64_t arg5, 186 uint64_t arg6, 187 uint64_t arg7) 188 { 189 uint32_t linear_id = plat_my_core_pos(); 190 191 /* Restore the generic timer context */ 192 tsp_generic_timer_restore(); 193 194 /* Update this cpu's statistics */ 195 tsp_stats[linear_id].smc_count++; 196 tsp_stats[linear_id].eret_count++; 197 tsp_stats[linear_id].cpu_resume_count++; 198 199 #if LOG_LEVEL >= LOG_LEVEL_INFO 200 spin_lock(&console_lock); 201 INFO("TSP: cpu 0x%lx resumed. maximum off power level %" PRId64 "\n", 202 read_mpidr(), max_off_pwrlvl); 203 INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu resume requests\n", 204 read_mpidr(), 205 tsp_stats[linear_id].smc_count, 206 tsp_stats[linear_id].eret_count, 207 tsp_stats[linear_id].cpu_resume_count); 208 spin_unlock(&console_lock); 209 #endif 210 /* Indicate to the SPD that we have completed this request */ 211 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0); 212 } 213 214 /******************************************************************************* 215 * TSP fast smc handler. The secure monitor jumps to this function by 216 * doing the ERET after populating X0-X7 registers. The arguments are received 217 * in the function arguments in order. Once the service is rendered, this 218 * function returns to Secure Monitor by raising SMC. 219 ******************************************************************************/ 220 smc_args_t *tsp_smc_handler(uint64_t func, 221 uint64_t arg1, 222 uint64_t arg2, 223 uint64_t arg3, 224 uint64_t arg4, 225 uint64_t arg5, 226 uint64_t arg6, 227 uint64_t arg7) 228 { 229 uint128_t service_args; 230 uint64_t service_arg0; 231 uint64_t service_arg1; 232 uint64_t results[2]; 233 uint32_t linear_id = plat_my_core_pos(); 234 u_register_t dit; 235 236 /* Update this cpu's statistics */ 237 tsp_stats[linear_id].smc_count++; 238 tsp_stats[linear_id].eret_count++; 239 240 #if LOG_LEVEL >= LOG_LEVEL_INFO 241 spin_lock(&console_lock); 242 INFO("TSP: cpu 0x%lx received %s smc 0x%" PRIx64 "\n", read_mpidr(), 243 ((func >> 31) & 1) == 1 ? "fast" : "yielding", 244 func); 245 INFO("TSP: cpu 0x%lx: %d smcs, %d erets\n", read_mpidr(), 246 tsp_stats[linear_id].smc_count, 247 tsp_stats[linear_id].eret_count); 248 spin_unlock(&console_lock); 249 #endif 250 251 /* Render secure services and obtain results here */ 252 results[0] = arg1; 253 results[1] = arg2; 254 255 /* 256 * Request a service back from dispatcher/secure monitor. 257 * This call returns and thereafter resumes execution. 258 */ 259 service_args = tsp_get_magic(); 260 service_arg0 = (uint64_t)service_args; 261 service_arg1 = (uint64_t)(service_args >> 64U); 262 263 #if CTX_INCLUDE_MTE_REGS 264 /* 265 * Write a dummy value to an MTE register, to simulate usage in the 266 * secure world 267 */ 268 write_gcr_el1(0x99); 269 #endif 270 271 /* Determine the function to perform based on the function ID */ 272 switch (TSP_BARE_FID(func)) { 273 case TSP_ADD: 274 results[0] += service_arg0; 275 results[1] += service_arg1; 276 break; 277 case TSP_SUB: 278 results[0] -= service_arg0; 279 results[1] -= service_arg1; 280 break; 281 case TSP_MUL: 282 results[0] *= service_arg0; 283 results[1] *= service_arg1; 284 break; 285 case TSP_DIV: 286 results[0] /= service_arg0 ? service_arg0 : 1; 287 results[1] /= service_arg1 ? service_arg1 : 1; 288 break; 289 case TSP_CHECK_DIT: 290 if (!is_armv8_4_dit_present()) { 291 #if LOG_LEVEL >= LOG_LEVEL_ERROR 292 spin_lock(&console_lock); 293 ERROR("DIT not supported\n"); 294 spin_unlock(&console_lock); 295 #endif 296 results[0] = 0; 297 results[1] = 0xffff; 298 break; 299 } 300 dit = read_dit(); 301 results[0] = dit == service_arg0; 302 results[1] = dit; 303 /* Toggle the dit bit */ 304 write_dit(service_arg0 != 0U ? 0 : DIT_BIT); 305 break; 306 default: 307 break; 308 } 309 310 return set_smc_args(func, 0, 311 results[0], 312 results[1], 313 0, 0, 0, 0); 314 } 315