1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <bl32.h> 32 #include <tsp.h> 33 #include <arch_helpers.h> 34 #include <stdio.h> 35 #include <platform.h> 36 #include <debug.h> 37 #include <spinlock.h> 38 39 /******************************************************************************* 40 * Lock to control access to the console 41 ******************************************************************************/ 42 spinlock_t console_lock; 43 44 /******************************************************************************* 45 * Per cpu data structure to populate parameters for an SMC in C code and use 46 * a pointer to this structure in assembler code to populate x0-x7 47 ******************************************************************************/ 48 static tsp_args tsp_smc_args[PLATFORM_CORE_COUNT]; 49 50 /******************************************************************************* 51 * Per cpu data structure to keep track of TSP activity 52 ******************************************************************************/ 53 static work_statistics tsp_stats[PLATFORM_CORE_COUNT]; 54 55 /******************************************************************************* 56 * Single reference to the various entry points exported by the test secure 57 * payload. A single copy should suffice for all cpus as they are not expected 58 * to change. 59 ******************************************************************************/ 60 static const entry_info tsp_entry_info = { 61 tsp_fast_smc_entry, 62 tsp_cpu_on_entry, 63 tsp_cpu_off_entry, 64 tsp_cpu_resume_entry, 65 tsp_cpu_suspend_entry, 66 }; 67 68 static tsp_args *set_smc_args(uint64_t arg0, 69 uint64_t arg1, 70 uint64_t arg2, 71 uint64_t arg3, 72 uint64_t arg4, 73 uint64_t arg5, 74 uint64_t arg6, 75 uint64_t arg7) 76 { 77 uint64_t mpidr = read_mpidr(); 78 uint32_t linear_id; 79 tsp_args *pcpu_smc_args; 80 81 /* 82 * Return to Secure Monitor by raising an SMC. The results of the 83 * service are passed as an arguments to the SMC 84 */ 85 linear_id = platform_get_core_pos(mpidr); 86 pcpu_smc_args = &tsp_smc_args[linear_id]; 87 write_sp_arg(pcpu_smc_args, TSP_ARG0, arg0); 88 write_sp_arg(pcpu_smc_args, TSP_ARG1, arg1); 89 write_sp_arg(pcpu_smc_args, TSP_ARG2, arg2); 90 write_sp_arg(pcpu_smc_args, TSP_ARG3, arg3); 91 write_sp_arg(pcpu_smc_args, TSP_ARG4, arg4); 92 write_sp_arg(pcpu_smc_args, TSP_ARG5, arg5); 93 write_sp_arg(pcpu_smc_args, TSP_ARG6, arg6); 94 write_sp_arg(pcpu_smc_args, TSP_ARG7, arg7); 95 96 return pcpu_smc_args; 97 } 98 99 /******************************************************************************* 100 * TSP main entry point where it gets the opportunity to initialize its secure 101 * state/applications. Once the state is initialized, it must return to the 102 * SPD with a pointer to the 'tsp_entry_info' structure. 103 ******************************************************************************/ 104 uint64_t tsp_main(void) 105 { 106 uint64_t mpidr = read_mpidr(); 107 uint32_t linear_id = platform_get_core_pos(mpidr); 108 109 #if DEBUG 110 meminfo *mem_layout = bl32_plat_sec_mem_layout(); 111 #endif 112 113 /* Initialize the platform */ 114 bl32_platform_setup(); 115 116 /* Initialize secure/applications state here */ 117 118 /* Update this cpu's statistics */ 119 tsp_stats[linear_id].smc_count++; 120 tsp_stats[linear_id].eret_count++; 121 tsp_stats[linear_id].cpu_on_count++; 122 123 spin_lock(&console_lock); 124 #if defined (__GNUC__) 125 printf("TSP Built : %s, %s\n\r", __TIME__, __DATE__); 126 #endif 127 INFO("Total memory base : 0x%x\n", mem_layout->total_base); 128 INFO("Total memory size : 0x%x bytes\n", mem_layout->total_size); 129 INFO("Free memory base : 0x%x\n", mem_layout->free_base); 130 INFO("Free memory size : 0x%x bytes\n", mem_layout->free_size); 131 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr, 132 tsp_stats[linear_id].smc_count, 133 tsp_stats[linear_id].eret_count, 134 tsp_stats[linear_id].cpu_on_count); 135 spin_unlock(&console_lock); 136 137 /* 138 * TODO: There is a massive assumption that the SPD and SP can see each 139 * other's memory without issues so it is safe to pass pointers to 140 * internal memory. Replace this with a shared communication buffer. 141 */ 142 return (uint64_t) &tsp_entry_info; 143 } 144 145 /******************************************************************************* 146 * This function performs any remaining book keeping in the test secure payload 147 * after this cpu's architectural state has been setup in response to an earlier 148 * psci cpu_on request. 149 ******************************************************************************/ 150 tsp_args *tsp_cpu_on_main(void) 151 { 152 uint64_t mpidr = read_mpidr(); 153 uint32_t linear_id = platform_get_core_pos(mpidr); 154 155 /* Update this cpu's statistics */ 156 tsp_stats[linear_id].smc_count++; 157 tsp_stats[linear_id].eret_count++; 158 tsp_stats[linear_id].cpu_on_count++; 159 160 spin_lock(&console_lock); 161 printf("SP: cpu 0x%x turned on\n\r", mpidr); 162 INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr, 163 tsp_stats[linear_id].smc_count, 164 tsp_stats[linear_id].eret_count, 165 tsp_stats[linear_id].cpu_on_count); 166 spin_unlock(&console_lock); 167 168 /* Indicate to the SPD that we have completed turned ourselves on */ 169 return set_smc_args(TSP_ON_DONE, 0, 0, 0, 0, 0, 0, 0); 170 } 171 172 /******************************************************************************* 173 * This function performs any remaining book keeping in the test secure payload 174 * before this cpu is turned off in response to a psci cpu_off request. 175 ******************************************************************************/ 176 tsp_args *tsp_cpu_off_main(uint64_t arg0, 177 uint64_t arg1, 178 uint64_t arg2, 179 uint64_t arg3, 180 uint64_t arg4, 181 uint64_t arg5, 182 uint64_t arg6, 183 uint64_t arg7) 184 { 185 uint64_t mpidr = read_mpidr(); 186 uint32_t linear_id = platform_get_core_pos(mpidr); 187 188 /* Update this cpu's statistics */ 189 tsp_stats[linear_id].smc_count++; 190 tsp_stats[linear_id].eret_count++; 191 tsp_stats[linear_id].cpu_off_count++; 192 193 spin_lock(&console_lock); 194 printf("SP: cpu 0x%x off request\n\r", mpidr); 195 INFO("cpu 0x%x: %d smcs, %d erets %d cpu off requests\n", mpidr, 196 tsp_stats[linear_id].smc_count, 197 tsp_stats[linear_id].eret_count, 198 tsp_stats[linear_id].cpu_off_count); 199 spin_unlock(&console_lock); 200 201 202 /* 203 * Indicate to the SPD that we have completed 204 * this initialisation request. 205 */ 206 return set_smc_args(TSP_OFF_DONE, 0, 0, 0, 0, 0, 0, 0); 207 } 208 209 /******************************************************************************* 210 * This function performs any book keeping in the test secure payload before 211 * this cpu's architectural state is saved in response to an earlier psci 212 * cpu_suspend request. 213 ******************************************************************************/ 214 tsp_args *tsp_cpu_suspend_main(uint64_t power_state, 215 uint64_t arg1, 216 uint64_t arg2, 217 uint64_t arg3, 218 uint64_t arg4, 219 uint64_t arg5, 220 uint64_t arg6, 221 uint64_t arg7) 222 { 223 uint64_t mpidr = read_mpidr(); 224 uint32_t linear_id = platform_get_core_pos(mpidr); 225 226 /* Update this cpu's statistics */ 227 tsp_stats[linear_id].smc_count++; 228 tsp_stats[linear_id].eret_count++; 229 tsp_stats[linear_id].cpu_suspend_count++; 230 231 spin_lock(&console_lock); 232 printf("SP: cpu 0x%x suspend request. power state: 0x%x\n\r", 233 mpidr, power_state); 234 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr, 235 tsp_stats[linear_id].smc_count, 236 tsp_stats[linear_id].eret_count, 237 tsp_stats[linear_id].cpu_suspend_count); 238 spin_unlock(&console_lock); 239 240 /* 241 * Indicate to the SPD that we have completed 242 * this initialisation request. 243 */ 244 return set_smc_args(TSP_SUSPEND_DONE, 0, 0, 0, 0, 0, 0, 0); 245 } 246 247 /******************************************************************************* 248 * This function performs any book keeping in the test secure payload after this 249 * cpu's architectural state has been restored after wakeup from an earlier psci 250 * cpu_suspend request. 251 ******************************************************************************/ 252 tsp_args *tsp_cpu_resume_main(uint64_t suspend_level, 253 uint64_t arg1, 254 uint64_t arg2, 255 uint64_t arg3, 256 uint64_t arg4, 257 uint64_t arg5, 258 uint64_t arg6, 259 uint64_t arg7) 260 { 261 uint64_t mpidr = read_mpidr(); 262 uint32_t linear_id = platform_get_core_pos(mpidr); 263 264 /* Update this cpu's statistics */ 265 tsp_stats[linear_id].smc_count++; 266 tsp_stats[linear_id].eret_count++; 267 tsp_stats[linear_id].cpu_resume_count++; 268 269 spin_lock(&console_lock); 270 printf("SP: cpu 0x%x resumed. suspend level %d \n\r", 271 mpidr, suspend_level); 272 INFO("cpu 0x%x: %d smcs, %d erets %d cpu suspend requests\n", mpidr, 273 tsp_stats[linear_id].smc_count, 274 tsp_stats[linear_id].eret_count, 275 tsp_stats[linear_id].cpu_suspend_count); 276 spin_unlock(&console_lock); 277 278 /* 279 * Indicate to the SPD that we have completed 280 * this initialisation request. 281 */ 282 return set_smc_args(TSP_RESUME_DONE, 0, 0, 0, 0, 0, 0, 0); 283 } 284 285 /******************************************************************************* 286 * TSP fast smc handler. The secure monitor jumps to this function by 287 * doing the ERET after populating X0-X7 registers. The arguments are received 288 * in the function arguments in order. Once the service is rendered, this 289 * function returns to Secure Monitor by raising SMC 290 ******************************************************************************/ 291 tsp_args *tsp_fast_smc_handler(uint64_t func, 292 uint64_t arg1, 293 uint64_t arg2, 294 uint64_t arg3, 295 uint64_t arg4, 296 uint64_t arg5, 297 uint64_t arg6, 298 uint64_t arg7) 299 { 300 uint64_t results[4]; 301 uint64_t service_args[4]; 302 303 INFO("Received fast smc 0x%x on cpu 0x%x\n", func, read_mpidr()); 304 305 /* Render sercure services and obtain results here */ 306 307 results[0] = arg1; 308 results[1] = arg2; 309 results[2] = arg3; 310 results[3] = arg4; 311 312 /* 313 * Request a service back from dispatcher/secure monitor. This call 314 * return and thereafter resume exectuion 315 */ 316 tsp_get_magic(service_args); 317 318 /* Determine the function to perform based on the function ID */ 319 switch (func) { 320 case TSP_FID_ADD: 321 results[0] += service_args[0]; 322 results[1] += service_args[1]; 323 results[2] += service_args[2]; 324 results[3] += service_args[3]; 325 break; 326 case TSP_FID_SUB: 327 results[0] -= service_args[0]; 328 results[1] -= service_args[1]; 329 results[2] -= service_args[2]; 330 results[3] -= service_args[3]; 331 break; 332 case TSP_FID_MUL: 333 results[0] *= service_args[0]; 334 results[1] *= service_args[1]; 335 results[2] *= service_args[2]; 336 results[3] *= service_args[3]; 337 break; 338 case TSP_FID_DIV: 339 results[0] /= service_args[0] ? service_args[0] : 1; 340 results[1] /= service_args[1] ? service_args[1] : 1; 341 results[2] /= service_args[2] ? service_args[2] : 1; 342 results[3] /= service_args[3] ? service_args[3] : 1; 343 break; 344 default: 345 break; 346 } 347 348 return set_smc_args(TSP_WORK_DONE, 349 results[0], 350 results[1], 351 results[2], 352 results[3], 353 0, 0, 0); 354 } 355 356