1 /* 2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch_helpers.h> 32 #include <assert.h> 33 #include <debug.h> 34 #include <gic_v2.h> 35 #include <tsp.h> 36 #include <platform.h> 37 #include <platform_def.h> 38 39 /******************************************************************************* 40 * This function updates the TSP statistics for FIQs handled synchronously i.e 41 * the ones that have been handed over by the TSPD. It also keeps count of the 42 * number of times control was passed back to the TSPD after handling an FIQ. 43 * In the future it will be possible that the TSPD hands over an FIQ to the TSP 44 * but does not expect it to return execution. This statistic will be useful to 45 * distinguish between these two models of synchronous FIQ handling. 46 * The 'elr_el3' parameter contains the address of the instruction in normal 47 * world where this FIQ was generated. 48 ******************************************************************************/ 49 void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3) 50 { 51 uint64_t mpidr = read_mpidr(); 52 uint32_t linear_id = platform_get_core_pos(mpidr); 53 54 tsp_stats[linear_id].sync_fiq_count++; 55 if (type == TSP_HANDLE_FIQ_AND_RETURN) 56 tsp_stats[linear_id].sync_fiq_ret_count++; 57 58 spin_lock(&console_lock); 59 tf_printf("TSP: cpu 0x%x sync fiq request from 0x%llx \n\r", 60 mpidr, elr_el3); 61 INFO("cpu 0x%x: %d sync fiq requests, %d sync fiq returns\n", 62 mpidr, 63 tsp_stats[linear_id].sync_fiq_count, 64 tsp_stats[linear_id].sync_fiq_ret_count); 65 spin_unlock(&console_lock); 66 } 67 68 /******************************************************************************* 69 * TSP FIQ handler called as a part of both synchronous and asynchronous 70 * handling of FIQ interrupts. It returns 0 upon successfully handling a S-EL1 71 * FIQ and treats all other FIQs as EL3 interrupts. It assumes that the GIC 72 * architecture version in v2.0 and the secure physical timer interrupt is the 73 * only S-EL1 interrupt that it needs to handle. 74 ******************************************************************************/ 75 int32_t tsp_fiq_handler(void) 76 { 77 uint64_t mpidr = read_mpidr(); 78 uint32_t linear_id = platform_get_core_pos(mpidr), id; 79 80 /* 81 * Get the highest priority pending interrupt id and see if it is the 82 * secure physical generic timer interrupt in which case, handle it. 83 * Otherwise throw this interrupt at the EL3 firmware. 84 */ 85 id = plat_ic_get_pending_interrupt_id(); 86 87 /* TSP can only handle the secure physical timer interrupt */ 88 if (id != IRQ_SEC_PHY_TIMER) 89 return TSP_EL3_FIQ; 90 91 /* 92 * Handle the interrupt. Also sanity check if it has been preempted by 93 * another secure interrupt through an assertion. 94 */ 95 id = plat_ic_acknowledge_interrupt(); 96 assert(id == IRQ_SEC_PHY_TIMER); 97 tsp_generic_timer_handler(); 98 plat_ic_end_of_interrupt(id); 99 100 /* Update the statistics and print some messages */ 101 tsp_stats[linear_id].fiq_count++; 102 spin_lock(&console_lock); 103 tf_printf("TSP: cpu 0x%x handled fiq %d \n\r", 104 mpidr, id); 105 INFO("cpu 0x%x: %d fiq requests \n", 106 mpidr, tsp_stats[linear_id].fiq_count); 107 spin_unlock(&console_lock); 108 109 return 0; 110 } 111 112 int32_t tsp_irq_received(void) 113 { 114 uint64_t mpidr = read_mpidr(); 115 uint32_t linear_id = platform_get_core_pos(mpidr); 116 117 tsp_stats[linear_id].irq_count++; 118 spin_lock(&console_lock); 119 tf_printf("TSP: cpu 0x%x received irq\n\r", mpidr); 120 INFO("cpu 0x%x: %d irq requests \n", 121 mpidr, tsp_stats[linear_id].irq_count); 122 spin_unlock(&console_lock); 123 124 return TSP_PREEMPTED; 125 } 126