17c88f3f6SAchin Gupta# 27c88f3f6SAchin Gupta# Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 37c88f3f6SAchin Gupta# 47c88f3f6SAchin Gupta# Redistribution and use in source and binary forms, with or without 57c88f3f6SAchin Gupta# modification, are permitted provided that the following conditions are met: 67c88f3f6SAchin Gupta# 77c88f3f6SAchin Gupta# Redistributions of source code must retain the above copyright notice, this 87c88f3f6SAchin Gupta# list of conditions and the following disclaimer. 97c88f3f6SAchin Gupta# 107c88f3f6SAchin Gupta# Redistributions in binary form must reproduce the above copyright notice, 117c88f3f6SAchin Gupta# this list of conditions and the following disclaimer in the documentation 127c88f3f6SAchin Gupta# and/or other materials provided with the distribution. 137c88f3f6SAchin Gupta# 147c88f3f6SAchin Gupta# Neither the name of ARM nor the names of its contributors may be used 157c88f3f6SAchin Gupta# to endorse or promote products derived from this software without specific 167c88f3f6SAchin Gupta# prior written permission. 177c88f3f6SAchin Gupta# 187c88f3f6SAchin Gupta# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 197c88f3f6SAchin Gupta# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 207c88f3f6SAchin Gupta# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 217c88f3f6SAchin Gupta# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 227c88f3f6SAchin Gupta# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 237c88f3f6SAchin Gupta# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 247c88f3f6SAchin Gupta# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 257c88f3f6SAchin Gupta# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 267c88f3f6SAchin Gupta# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 277c88f3f6SAchin Gupta# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 287c88f3f6SAchin Gupta# POSSIBILITY OF SUCH DAMAGE. 297c88f3f6SAchin Gupta# 307c88f3f6SAchin Gupta 31*5a06bb7eSDan HandleyINCLUDES += -Iinclude/bl32/tsp 32*5a06bb7eSDan Handley 33bee82417SDan HandleyBL32_SOURCES += bl32/tsp/tsp_main.c \ 34bee82417SDan Handley bl32/tsp/aarch64/tsp_entrypoint.S \ 3557356e90SAchin Gupta bl32/tsp/aarch64/tsp_exceptions.S \ 36bee82417SDan Handley bl32/tsp/aarch64/tsp_request.S \ 376cf89021SAchin Gupta bl32/tsp/tsp_interrupt.c \ 386cf89021SAchin Gupta bl32/tsp/tsp_timer.c \ 39bee82417SDan Handley common/aarch64/early_exceptions.S \ 406cf89021SAchin Gupta lib/locks/exclusive/spinlock.S 417c88f3f6SAchin Gupta 42bee82417SDan HandleyBL32_LINKERFILE := bl32/tsp/tsp.ld.S 437c88f3f6SAchin Gupta 44faaa2e76SVikram Kanigiri# This flag determines if the TSPD initializes BL3-2 in tspd_init() (synchronous 45faaa2e76SVikram Kanigiri# method) or configures BL3-1 to pass control to BL3-2 instead of BL3-3 46faaa2e76SVikram Kanigiri# (asynchronous method). 47faaa2e76SVikram KanigiriTSP_INIT_ASYNC := 0 48faaa2e76SVikram Kanigiri 49faaa2e76SVikram Kanigiri$(eval $(call assert_boolean,TSP_INIT_ASYNC)) 50faaa2e76SVikram Kanigiri$(eval $(call add_define,TSP_INIT_ASYNC)) 51faaa2e76SVikram Kanigiri 52d1466a2eSSandrine Bailleux# Include the platform-specific TSP Makefile 53d1466a2eSSandrine Bailleux# If no platform-specific TSP Makefile exists, it means TSP is not supported 54d1466a2eSSandrine Bailleux# on this platform. 55*5a06bb7eSDan HandleyTSP_PLAT_MAKEFILE := plat/${PLAT}/tsp/tsp-${PLAT}.mk 56d1466a2eSSandrine Bailleuxifeq (,$(wildcard ${TSP_PLAT_MAKEFILE})) 57d1466a2eSSandrine Bailleux $(error TSP is not supported on platform ${PLAT}) 58d1466a2eSSandrine Bailleuxelse 59d1466a2eSSandrine Bailleux include ${TSP_PLAT_MAKEFILE} 60d1466a2eSSandrine Bailleuxendif 61