1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <stdio.h> 32 #include <string.h> 33 #include <assert.h> 34 #include <arch_helpers.h> 35 #include <console.h> 36 #include <platform.h> 37 #include <semihosting.h> 38 #include <bl_common.h> 39 #include <bl31.h> 40 #include <runtime_svc.h> 41 #include <context_mgmt.h> 42 43 /******************************************************************************* 44 * Variable to indicate whether next image to execute after BL31 is BL33 45 * (non-secure & default) or BL32 (secure). 46 ******************************************************************************/ 47 static uint32_t next_image_type = NON_SECURE; 48 49 /******************************************************************************* 50 * Simple function to initialise all BL31 helper libraries. 51 ******************************************************************************/ 52 void bl31_lib_init() 53 { 54 cm_init(); 55 } 56 57 /******************************************************************************* 58 * BL31 is responsible for setting up the runtime services for the primary cpu 59 * before passing control to the bootloader or an Operating System. This 60 * function calls runtime_svc_init() which initializes all registered runtime 61 * services. The run time services would setup enough context for the core to 62 * swtich to the next exception level. When this function returns, the core will 63 * switch to the programmed exception level via. an ERET. 64 ******************************************************************************/ 65 void bl31_main(void) 66 { 67 #if DEBUG 68 unsigned long mpidr = read_mpidr(); 69 #endif 70 71 /* Perform remaining generic architectural setup from EL3 */ 72 bl31_arch_setup(); 73 74 /* Perform platform setup in BL1 */ 75 bl31_platform_setup(); 76 77 #if defined (__GNUC__) 78 printf("BL31 Built : %s, %s\n\r", __TIME__, __DATE__); 79 #endif 80 /* Initialise helper libraries */ 81 bl31_lib_init(); 82 83 /* Initialize the runtime services e.g. psci */ 84 runtime_svc_init(); 85 86 /* Clean caches before re-entering normal world */ 87 dcsw_op_all(DCCSW); 88 89 /* 90 * Use the more complex exception vectors now that context 91 * management is setup. SP_EL3 should point to a 'cpu_context' 92 * structure which has an exception stack allocated. The PSCI 93 * service should have set the context. 94 */ 95 assert(cm_get_context(mpidr, NON_SECURE)); 96 cm_set_next_eret_context(NON_SECURE); 97 write_vbar_el3((uint64_t) runtime_exceptions); 98 99 /* 100 * All the cold boot actions on the primary cpu are done. We 101 * now need to decide which is the next image (BL32 or BL33) 102 * and how to execute it. If the SPD runtime service is 103 * present, it would want to pass control to BL32 first in 104 * S-EL1. It will export the bl32_init() routine where it takes 105 * responsibility of entering S-EL1 and returning control back 106 * to bl31_main. Once this is done we can prepare entry into 107 * BL33 as normal. 108 */ 109 110 /* Tell BL32 about it memory extents as well */ 111 if (bl32_init) 112 bl32_init(bl31_plat_get_bl32_mem_layout()); 113 114 /* 115 * We are ready to enter the next EL. Prepare entry into the image 116 * corresponding to the desired security state after the next ERET. 117 */ 118 bl31_prepare_next_image_entry(); 119 } 120 121 /******************************************************************************* 122 * Accessor functions to help runtime services decide which image should be 123 * executed after BL31. This is BL33 or the non-secure bootloader image by 124 * default but the Secure payload dispatcher could override this by requesting 125 * an entry into BL32 (Secure payload) first. If it does so then it should use 126 * the same API to program an entry into BL33 once BL32 initialisation is 127 * complete. 128 ******************************************************************************/ 129 void bl31_set_next_image_type(uint32_t security_state) 130 { 131 assert(security_state == NON_SECURE || security_state == SECURE); 132 next_image_type = security_state; 133 } 134 135 uint32_t bl31_get_next_image_type(void) 136 { 137 return next_image_type; 138 } 139 140 /******************************************************************************* 141 * This function programs EL3 registers and performs other setup to enable entry 142 * into the next image after BL31 at the next ERET. 143 ******************************************************************************/ 144 void bl31_prepare_next_image_entry() 145 { 146 el_change_info *next_image_info; 147 uint32_t scr, image_type; 148 149 /* Determine which image to execute next */ 150 image_type = bl31_get_next_image_type(); 151 152 /* 153 * Setup minimal architectural state of the next highest EL to 154 * allow execution in it immediately upon entering it. 155 */ 156 bl31_next_el_arch_setup(image_type); 157 158 /* Program EL3 registers to enable entry into the next EL */ 159 next_image_info = bl31_get_next_image_info(image_type); 160 assert(next_image_info); 161 162 scr = read_scr(); 163 if (image_type == NON_SECURE) 164 scr |= SCR_NS_BIT; 165 166 /* 167 * Tell the context mgmt. library to ensure that SP_EL3 points to 168 * the right context to exit from EL3 correctly. 169 */ 170 cm_set_el3_eret_context(next_image_info->security_state, 171 next_image_info->entrypoint, 172 next_image_info->spsr, 173 scr); 174 175 /* Finally set the next context */ 176 cm_set_next_eret_context(next_image_info->security_state); 177 } 178