xref: /rk3399_ARM-atf/bl31/bl31_main.c (revision c948f77136c42a92d0bb660543a3600c36dcf7f1)
1 /*
2  * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <string.h>
9 
10 #include <arch.h>
11 #include <arch_helpers.h>
12 #include <bl31/bl31.h>
13 #include <bl31/ehf.h>
14 #include <common/bl_common.h>
15 #include <common/debug.h>
16 #include <common/runtime_svc.h>
17 #include <drivers/console.h>
18 #include <lib/el3_runtime/context_mgmt.h>
19 #include <lib/pmf/pmf.h>
20 #include <lib/runtime_instr.h>
21 #include <plat/common/platform.h>
22 #include <services/std_svc.h>
23 
24 #if ENABLE_RUNTIME_INSTRUMENTATION
25 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
26 	RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
27 #endif
28 
29 /*******************************************************************************
30  * This function pointer is used to initialise the BL32 image. It's initialized
31  * by SPD calling bl31_register_bl32_init after setting up all things necessary
32  * for SP execution. In cases where both SPD and SP are absent, or when SPD
33  * finds it impossible to execute SP, this pointer is left as NULL
34  ******************************************************************************/
35 static int32_t (*bl32_init)(void);
36 
37 /*******************************************************************************
38  * Variable to indicate whether next image to execute after BL31 is BL33
39  * (non-secure & default) or BL32 (secure).
40  ******************************************************************************/
41 static uint32_t next_image_type = NON_SECURE;
42 
43 /*
44  * Implement the ARM Standard Service function to get arguments for a
45  * particular service.
46  */
47 uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
48 {
49 	/* Setup the arguments for PSCI Library */
50 	DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
51 
52 	/* PSCI is the only ARM Standard Service implemented */
53 	assert(svc_mask == PSCI_FID_MASK);
54 
55 	return (uintptr_t)&psci_args;
56 }
57 
58 /*******************************************************************************
59  * Simple function to initialise all BL31 helper libraries.
60  ******************************************************************************/
61 void __init bl31_lib_init(void)
62 {
63 	cm_init();
64 }
65 
66 /*******************************************************************************
67  * BL31 is responsible for setting up the runtime services for the primary cpu
68  * before passing control to the bootloader or an Operating System. This
69  * function calls runtime_svc_init() which initializes all registered runtime
70  * services. The run time services would setup enough context for the core to
71  * switch to the next exception level. When this function returns, the core will
72  * switch to the programmed exception level via. an ERET.
73  ******************************************************************************/
74 void bl31_main(void)
75 {
76 	NOTICE("BL31: %s\n", version_string);
77 	NOTICE("BL31: %s\n", build_message);
78 
79 	/* Perform platform setup in BL31 */
80 	bl31_platform_setup();
81 
82 	/* Initialise helper libraries */
83 	bl31_lib_init();
84 
85 #if EL3_EXCEPTION_HANDLING
86 	INFO("BL31: Initialising Exception Handling Framework\n");
87 	ehf_init();
88 #endif
89 
90 	/* Initialize the runtime services e.g. psci. */
91 	INFO("BL31: Initializing runtime services\n");
92 	runtime_svc_init();
93 
94 	/*
95 	 * All the cold boot actions on the primary cpu are done. We now need to
96 	 * decide which is the next image (BL32 or BL33) and how to execute it.
97 	 * If the SPD runtime service is present, it would want to pass control
98 	 * to BL32 first in S-EL1. In that case, SPD would have registered a
99 	 * function to initialize bl32 where it takes responsibility of entering
100 	 * S-EL1 and returning control back to bl31_main. Once this is done we
101 	 * can prepare entry into BL33 as normal.
102 	 */
103 
104 	/*
105 	 * If SPD had registered an init hook, invoke it.
106 	 */
107 	if (bl32_init != NULL) {
108 		INFO("BL31: Initializing BL32\n");
109 
110 		int32_t rc = (*bl32_init)();
111 
112 		if (rc == 0)
113 			WARN("BL31: BL32 initialization failed\n");
114 	}
115 	/*
116 	 * We are ready to enter the next EL. Prepare entry into the image
117 	 * corresponding to the desired security state after the next ERET.
118 	 */
119 	bl31_prepare_next_image_entry();
120 
121 	console_flush();
122 
123 	/*
124 	 * Perform any platform specific runtime setup prior to cold boot exit
125 	 * from BL31
126 	 */
127 	bl31_plat_runtime_setup();
128 }
129 
130 /*******************************************************************************
131  * Accessor functions to help runtime services decide which image should be
132  * executed after BL31. This is BL33 or the non-secure bootloader image by
133  * default but the Secure payload dispatcher could override this by requesting
134  * an entry into BL32 (Secure payload) first. If it does so then it should use
135  * the same API to program an entry into BL33 once BL32 initialisation is
136  * complete.
137  ******************************************************************************/
138 void bl31_set_next_image_type(uint32_t security_state)
139 {
140 	assert(sec_state_is_valid(security_state));
141 	next_image_type = security_state;
142 }
143 
144 uint32_t bl31_get_next_image_type(void)
145 {
146 	return next_image_type;
147 }
148 
149 /*******************************************************************************
150  * This function programs EL3 registers and performs other setup to enable entry
151  * into the next image after BL31 at the next ERET.
152  ******************************************************************************/
153 void __init bl31_prepare_next_image_entry(void)
154 {
155 	entry_point_info_t *next_image_info;
156 	uint32_t image_type;
157 
158 #if CTX_INCLUDE_AARCH32_REGS
159 	/*
160 	 * Ensure that the build flag to save AArch32 system registers in CPU
161 	 * context is not set for AArch64-only platforms.
162 	 */
163 	if (el_implemented(1) == EL_IMPL_A64ONLY) {
164 		ERROR("EL1 supports AArch64-only. Please set build flag "
165 				"CTX_INCLUDE_AARCH32_REGS = 0\n");
166 		panic();
167 	}
168 #endif
169 
170 	/* Determine which image to execute next */
171 	image_type = bl31_get_next_image_type();
172 
173 	/* Program EL3 registers to enable entry into the next EL */
174 	next_image_info = bl31_plat_get_next_image_ep_info(image_type);
175 	assert(next_image_info != NULL);
176 	assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
177 
178 	INFO("BL31: Preparing for EL3 exit to %s world\n",
179 		(image_type == SECURE) ? "secure" : "normal");
180 	print_entry_point_info(next_image_info);
181 	cm_init_my_context(next_image_info);
182 	cm_prepare_el3_exit(image_type);
183 }
184 
185 /*******************************************************************************
186  * This function initializes the pointer to BL32 init function. This is expected
187  * to be called by the SPD after it finishes all its initialization
188  ******************************************************************************/
189 void bl31_register_bl32_init(int32_t (*func)(void))
190 {
191 	bl32_init = func;
192 }
193