1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <bl_common.h> 35 #include <bl31.h> 36 #include <context_mgmt.h> 37 #include <debug.h> 38 #include <platform.h> 39 #include <runtime_svc.h> 40 #include <string.h> 41 42 /******************************************************************************* 43 * This function pointer is used to initialise the BL32 image. It's initialized 44 * by SPD calling bl31_register_bl32_init after setting up all things necessary 45 * for SP execution. In cases where both SPD and SP are absent, or when SPD 46 * finds it impossible to execute SP, this pointer is left as NULL 47 ******************************************************************************/ 48 static int32_t (*bl32_init)(void); 49 50 /******************************************************************************* 51 * Variable to indicate whether next image to execute after BL31 is BL33 52 * (non-secure & default) or BL32 (secure). 53 ******************************************************************************/ 54 static uint32_t next_image_type = NON_SECURE; 55 56 /* 57 * Implement the ARM Standard Service function to get arguments for a 58 * particular service. 59 */ 60 uintptr_t get_arm_std_svc_args(unsigned int svc_mask) 61 { 62 /* Setup the arguments for PSCI Library */ 63 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint); 64 65 /* PSCI is the only ARM Standard Service implemented */ 66 assert(svc_mask == PSCI_FID_MASK); 67 68 return (uintptr_t)&psci_args; 69 } 70 71 /******************************************************************************* 72 * Simple function to initialise all BL31 helper libraries. 73 ******************************************************************************/ 74 void bl31_lib_init(void) 75 { 76 cm_init(); 77 } 78 79 /******************************************************************************* 80 * BL31 is responsible for setting up the runtime services for the primary cpu 81 * before passing control to the bootloader or an Operating System. This 82 * function calls runtime_svc_init() which initializes all registered runtime 83 * services. The run time services would setup enough context for the core to 84 * swtich to the next exception level. When this function returns, the core will 85 * switch to the programmed exception level via. an ERET. 86 ******************************************************************************/ 87 void bl31_main(void) 88 { 89 NOTICE("BL31: %s\n", version_string); 90 NOTICE("BL31: %s\n", build_message); 91 92 /* Perform platform setup in BL31 */ 93 bl31_platform_setup(); 94 95 /* Initialise helper libraries */ 96 bl31_lib_init(); 97 98 /* Initialize the runtime services e.g. psci. */ 99 INFO("BL31: Initializing runtime services\n"); 100 runtime_svc_init(); 101 102 /* 103 * All the cold boot actions on the primary cpu are done. We now need to 104 * decide which is the next image (BL32 or BL33) and how to execute it. 105 * If the SPD runtime service is present, it would want to pass control 106 * to BL32 first in S-EL1. In that case, SPD would have registered a 107 * function to intialize bl32 where it takes responsibility of entering 108 * S-EL1 and returning control back to bl31_main. Once this is done we 109 * can prepare entry into BL33 as normal. 110 */ 111 112 /* 113 * If SPD had registerd an init hook, invoke it. 114 */ 115 if (bl32_init) { 116 INFO("BL31: Initializing BL32\n"); 117 (*bl32_init)(); 118 } 119 /* 120 * We are ready to enter the next EL. Prepare entry into the image 121 * corresponding to the desired security state after the next ERET. 122 */ 123 bl31_prepare_next_image_entry(); 124 125 /* 126 * Perform any platform specific runtime setup prior to cold boot exit 127 * from BL31 128 */ 129 bl31_plat_runtime_setup(); 130 } 131 132 /******************************************************************************* 133 * Accessor functions to help runtime services decide which image should be 134 * executed after BL31. This is BL33 or the non-secure bootloader image by 135 * default but the Secure payload dispatcher could override this by requesting 136 * an entry into BL32 (Secure payload) first. If it does so then it should use 137 * the same API to program an entry into BL33 once BL32 initialisation is 138 * complete. 139 ******************************************************************************/ 140 void bl31_set_next_image_type(uint32_t security_state) 141 { 142 assert(sec_state_is_valid(security_state)); 143 next_image_type = security_state; 144 } 145 146 uint32_t bl31_get_next_image_type(void) 147 { 148 return next_image_type; 149 } 150 151 /******************************************************************************* 152 * This function programs EL3 registers and performs other setup to enable entry 153 * into the next image after BL31 at the next ERET. 154 ******************************************************************************/ 155 void bl31_prepare_next_image_entry(void) 156 { 157 entry_point_info_t *next_image_info; 158 uint32_t image_type; 159 160 #if CTX_INCLUDE_AARCH32_REGS 161 /* 162 * Ensure that the build flag to save AArch32 system registers in CPU 163 * context is not set for AArch64-only platforms. 164 */ 165 if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT) 166 & ID_AA64PFR0_ELX_MASK) == 0x1) { 167 ERROR("EL1 supports AArch64-only. Please set build flag " 168 "CTX_INCLUDE_AARCH32_REGS = 0"); 169 panic(); 170 } 171 #endif 172 173 /* Determine which image to execute next */ 174 image_type = bl31_get_next_image_type(); 175 176 /* Program EL3 registers to enable entry into the next EL */ 177 next_image_info = bl31_plat_get_next_image_ep_info(image_type); 178 assert(next_image_info); 179 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr)); 180 181 INFO("BL31: Preparing for EL3 exit to %s world\n", 182 (image_type == SECURE) ? "secure" : "normal"); 183 print_entry_point_info(next_image_info); 184 cm_init_my_context(next_image_info); 185 cm_prepare_el3_exit(image_type); 186 } 187 188 /******************************************************************************* 189 * This function initializes the pointer to BL32 init function. This is expected 190 * to be called by the SPD after it finishes all its initialization 191 ******************************************************************************/ 192 void bl31_register_bl32_init(int32_t (*func)(void)) 193 { 194 bl32_init = func; 195 } 196