xref: /rk3399_ARM-atf/bl31/bl31_main.c (revision 0b32628eddfef95b51909816f625e6f37cd21cb8)
1 /*
2  * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <arch.h>
32 #include <arch_helpers.h>
33 #include <assert.h>
34 #include <bl_common.h>
35 #include <bl31.h>
36 #include <console.h>
37 #include <context_mgmt.h>
38 #include <debug.h>
39 #include <platform.h>
40 #include <pmf.h>
41 #include <runtime_instr.h>
42 #include <runtime_svc.h>
43 #include <string.h>
44 
45 #if ENABLE_RUNTIME_INSTRUMENTATION
46 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
47 	RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
48 #endif
49 
50 /*******************************************************************************
51  * This function pointer is used to initialise the BL32 image. It's initialized
52  * by SPD calling bl31_register_bl32_init after setting up all things necessary
53  * for SP execution. In cases where both SPD and SP are absent, or when SPD
54  * finds it impossible to execute SP, this pointer is left as NULL
55  ******************************************************************************/
56 static int32_t (*bl32_init)(void);
57 
58 /*******************************************************************************
59  * Variable to indicate whether next image to execute after BL31 is BL33
60  * (non-secure & default) or BL32 (secure).
61  ******************************************************************************/
62 static uint32_t next_image_type = NON_SECURE;
63 
64 /*
65  * Implement the ARM Standard Service function to get arguments for a
66  * particular service.
67  */
68 uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
69 {
70 	/* Setup the arguments for PSCI Library */
71 	DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
72 
73 	/* PSCI is the only ARM Standard Service implemented */
74 	assert(svc_mask == PSCI_FID_MASK);
75 
76 	return (uintptr_t)&psci_args;
77 }
78 
79 /*******************************************************************************
80  * Simple function to initialise all BL31 helper libraries.
81  ******************************************************************************/
82 void bl31_lib_init(void)
83 {
84 	cm_init();
85 }
86 
87 /*******************************************************************************
88  * BL31 is responsible for setting up the runtime services for the primary cpu
89  * before passing control to the bootloader or an Operating System. This
90  * function calls runtime_svc_init() which initializes all registered runtime
91  * services. The run time services would setup enough context for the core to
92  * swtich to the next exception level. When this function returns, the core will
93  * switch to the programmed exception level via. an ERET.
94  ******************************************************************************/
95 void bl31_main(void)
96 {
97 	NOTICE("BL31: %s\n", version_string);
98 	NOTICE("BL31: %s\n", build_message);
99 
100 	/* Perform platform setup in BL31 */
101 	bl31_platform_setup();
102 
103 	/* Initialise helper libraries */
104 	bl31_lib_init();
105 
106 	/* Initialize the runtime services e.g. psci. */
107 	INFO("BL31: Initializing runtime services\n");
108 	runtime_svc_init();
109 
110 	/*
111 	 * All the cold boot actions on the primary cpu are done. We now need to
112 	 * decide which is the next image (BL32 or BL33) and how to execute it.
113 	 * If the SPD runtime service is present, it would want to pass control
114 	 * to BL32 first in S-EL1. In that case, SPD would have registered a
115 	 * function to intialize bl32 where it takes responsibility of entering
116 	 * S-EL1 and returning control back to bl31_main. Once this is done we
117 	 * can prepare entry into BL33 as normal.
118 	 */
119 
120 	/*
121 	 * If SPD had registerd an init hook, invoke it.
122 	 */
123 	if (bl32_init) {
124 		INFO("BL31: Initializing BL32\n");
125 		(*bl32_init)();
126 	}
127 	/*
128 	 * We are ready to enter the next EL. Prepare entry into the image
129 	 * corresponding to the desired security state after the next ERET.
130 	 */
131 	bl31_prepare_next_image_entry();
132 
133 	console_flush();
134 
135 	/*
136 	 * Perform any platform specific runtime setup prior to cold boot exit
137 	 * from BL31
138 	 */
139 	bl31_plat_runtime_setup();
140 }
141 
142 /*******************************************************************************
143  * Accessor functions to help runtime services decide which image should be
144  * executed after BL31. This is BL33 or the non-secure bootloader image by
145  * default but the Secure payload dispatcher could override this by requesting
146  * an entry into BL32 (Secure payload) first. If it does so then it should use
147  * the same API to program an entry into BL33 once BL32 initialisation is
148  * complete.
149  ******************************************************************************/
150 void bl31_set_next_image_type(uint32_t security_state)
151 {
152 	assert(sec_state_is_valid(security_state));
153 	next_image_type = security_state;
154 }
155 
156 uint32_t bl31_get_next_image_type(void)
157 {
158 	return next_image_type;
159 }
160 
161 /*******************************************************************************
162  * This function programs EL3 registers and performs other setup to enable entry
163  * into the next image after BL31 at the next ERET.
164  ******************************************************************************/
165 void bl31_prepare_next_image_entry(void)
166 {
167 	entry_point_info_t *next_image_info;
168 	uint32_t image_type;
169 
170 #if CTX_INCLUDE_AARCH32_REGS
171 	/*
172 	 * Ensure that the build flag to save AArch32 system registers in CPU
173 	 * context is not set for AArch64-only platforms.
174 	 */
175 	if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT)
176 			& ID_AA64PFR0_ELX_MASK) == 0x1) {
177 		ERROR("EL1 supports AArch64-only. Please set build flag "
178 				"CTX_INCLUDE_AARCH32_REGS = 0");
179 		panic();
180 	}
181 #endif
182 
183 	/* Determine which image to execute next */
184 	image_type = bl31_get_next_image_type();
185 
186 	/* Program EL3 registers to enable entry into the next EL */
187 	next_image_info = bl31_plat_get_next_image_ep_info(image_type);
188 	assert(next_image_info);
189 	assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
190 
191 	INFO("BL31: Preparing for EL3 exit to %s world\n",
192 		(image_type == SECURE) ? "secure" : "normal");
193 	print_entry_point_info(next_image_info);
194 	cm_init_my_context(next_image_info);
195 	cm_prepare_el3_exit(image_type);
196 }
197 
198 /*******************************************************************************
199  * This function initializes the pointer to BL32 init function. This is expected
200  * to be called by the SPD after it finishes all its initialization
201  ******************************************************************************/
202 void bl31_register_bl32_init(int32_t (*func)(void))
203 {
204 	bl32_init = func;
205 }
206