1 /* 2 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch.h> 11 #include <arch_features.h> 12 #include <arch_helpers.h> 13 #include <bl31/bl31.h> 14 #include <bl31/ehf.h> 15 #include <common/bl_common.h> 16 #include <common/debug.h> 17 #include <common/feat_detect.h> 18 #include <common/runtime_svc.h> 19 #include <drivers/console.h> 20 #include <lib/el3_runtime/context_mgmt.h> 21 #include <lib/pmf/pmf.h> 22 #include <lib/runtime_instr.h> 23 #include <plat/common/platform.h> 24 #include <services/std_svc.h> 25 26 #if ENABLE_RUNTIME_INSTRUMENTATION 27 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID, 28 RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE) 29 #endif 30 31 /******************************************************************************* 32 * This function pointer is used to initialise the BL32 image. It's initialized 33 * by SPD calling bl31_register_bl32_init after setting up all things necessary 34 * for SP execution. In cases where both SPD and SP are absent, or when SPD 35 * finds it impossible to execute SP, this pointer is left as NULL 36 ******************************************************************************/ 37 static int32_t (*bl32_init)(void); 38 39 /***************************************************************************** 40 * Function used to initialise RMM if RME is enabled 41 *****************************************************************************/ 42 #if ENABLE_RME 43 static int32_t (*rmm_init)(void); 44 #endif 45 46 /******************************************************************************* 47 * Variable to indicate whether next image to execute after BL31 is BL33 48 * (non-secure & default) or BL32 (secure). 49 ******************************************************************************/ 50 static uint32_t next_image_type = NON_SECURE; 51 52 #ifdef SUPPORT_UNKNOWN_MPID 53 /* 54 * Flag to know whether an unsupported MPID has been detected. To avoid having it 55 * landing on the .bss section, it is initialized to a non-zero value, this way 56 * we avoid potential WAW hazards during system bring up. 57 * */ 58 volatile uint32_t unsupported_mpid_flag = 1; 59 #endif 60 61 /* 62 * Implement the ARM Standard Service function to get arguments for a 63 * particular service. 64 */ 65 uintptr_t get_arm_std_svc_args(unsigned int svc_mask) 66 { 67 /* Setup the arguments for PSCI Library */ 68 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint); 69 70 /* PSCI is the only ARM Standard Service implemented */ 71 assert(svc_mask == PSCI_FID_MASK); 72 73 return (uintptr_t)&psci_args; 74 } 75 76 /******************************************************************************* 77 * Simple function to initialise all BL31 helper libraries. 78 ******************************************************************************/ 79 void __init bl31_lib_init(void) 80 { 81 cm_init(); 82 } 83 84 /******************************************************************************* 85 * Setup function for BL31. 86 ******************************************************************************/ 87 void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2, 88 u_register_t arg3) 89 { 90 /* Perform early platform-specific setup */ 91 bl31_early_platform_setup2(arg0, arg1, arg2, arg3); 92 93 /* Perform late platform-specific setup */ 94 bl31_plat_arch_setup(); 95 96 #if CTX_INCLUDE_PAUTH_REGS 97 /* 98 * Assert that the ARMv8.3-PAuth registers are present or an access 99 * fault will be triggered when they are being saved or restored. 100 */ 101 assert(is_armv8_3_pauth_present()); 102 #endif /* CTX_INCLUDE_PAUTH_REGS */ 103 } 104 105 /******************************************************************************* 106 * BL31 is responsible for setting up the runtime services for the primary cpu 107 * before passing control to the bootloader or an Operating System. This 108 * function calls runtime_svc_init() which initializes all registered runtime 109 * services. The run time services would setup enough context for the core to 110 * switch to the next exception level. When this function returns, the core will 111 * switch to the programmed exception level via an ERET. 112 ******************************************************************************/ 113 void bl31_main(void) 114 { 115 NOTICE("BL31: %s\n", version_string); 116 NOTICE("BL31: %s\n", build_message); 117 118 #if FEATURE_DETECTION 119 /* Detect if features enabled during compilation are supported by PE. */ 120 detect_arch_features(); 121 #endif /* FEATURE_DETECTION */ 122 123 #ifdef SUPPORT_UNKNOWN_MPID 124 if (unsupported_mpid_flag == 0) { 125 NOTICE("Unsupported MPID detected!\n"); 126 } 127 #endif 128 129 /* Perform platform setup in BL31 */ 130 bl31_platform_setup(); 131 132 /* Initialise helper libraries */ 133 bl31_lib_init(); 134 135 #if EL3_EXCEPTION_HANDLING 136 INFO("BL31: Initialising Exception Handling Framework\n"); 137 ehf_init(); 138 #endif 139 140 /* Initialize the runtime services e.g. psci. */ 141 INFO("BL31: Initializing runtime services\n"); 142 runtime_svc_init(); 143 144 /* 145 * All the cold boot actions on the primary cpu are done. We now need to 146 * decide which is the next image and how to execute it. 147 * If the SPD runtime service is present, it would want to pass control 148 * to BL32 first in S-EL1. In that case, SPD would have registered a 149 * function to initialize bl32 where it takes responsibility of entering 150 * S-EL1 and returning control back to bl31_main. Similarly, if RME is 151 * enabled and a function is registered to initialize RMM, control is 152 * transferred to RMM in R-EL2. After RMM initialization, control is 153 * returned back to bl31_main. Once this is done we can prepare entry 154 * into BL33 as normal. 155 */ 156 157 /* 158 * If SPD had registered an init hook, invoke it. 159 */ 160 if (bl32_init != NULL) { 161 INFO("BL31: Initializing BL32\n"); 162 163 int32_t rc = (*bl32_init)(); 164 165 if (rc == 0) { 166 WARN("BL31: BL32 initialization failed\n"); 167 } 168 } 169 170 /* 171 * If RME is enabled and init hook is registered, initialize RMM 172 * in R-EL2. 173 */ 174 #if ENABLE_RME 175 if (rmm_init != NULL) { 176 INFO("BL31: Initializing RMM\n"); 177 178 int32_t rc = (*rmm_init)(); 179 180 if (rc == 0) { 181 WARN("BL31: RMM initialization failed\n"); 182 } 183 } 184 #endif 185 186 /* 187 * We are ready to enter the next EL. Prepare entry into the image 188 * corresponding to the desired security state after the next ERET. 189 */ 190 bl31_prepare_next_image_entry(); 191 192 console_flush(); 193 194 /* 195 * Perform any platform specific runtime setup prior to cold boot exit 196 * from BL31 197 */ 198 bl31_plat_runtime_setup(); 199 } 200 201 /******************************************************************************* 202 * Accessor functions to help runtime services decide which image should be 203 * executed after BL31. This is BL33 or the non-secure bootloader image by 204 * default but the Secure payload dispatcher could override this by requesting 205 * an entry into BL32 (Secure payload) first. If it does so then it should use 206 * the same API to program an entry into BL33 once BL32 initialisation is 207 * complete. 208 ******************************************************************************/ 209 void bl31_set_next_image_type(uint32_t security_state) 210 { 211 assert(sec_state_is_valid(security_state)); 212 next_image_type = security_state; 213 } 214 215 uint32_t bl31_get_next_image_type(void) 216 { 217 return next_image_type; 218 } 219 220 /******************************************************************************* 221 * This function programs EL3 registers and performs other setup to enable entry 222 * into the next image after BL31 at the next ERET. 223 ******************************************************************************/ 224 void __init bl31_prepare_next_image_entry(void) 225 { 226 entry_point_info_t *next_image_info; 227 uint32_t image_type; 228 229 #if CTX_INCLUDE_AARCH32_REGS 230 /* 231 * Ensure that the build flag to save AArch32 system registers in CPU 232 * context is not set for AArch64-only platforms. 233 */ 234 if (el_implemented(1) == EL_IMPL_A64ONLY) { 235 ERROR("EL1 supports AArch64-only. Please set build flag " 236 "CTX_INCLUDE_AARCH32_REGS = 0\n"); 237 panic(); 238 } 239 #endif 240 241 /* Determine which image to execute next */ 242 image_type = bl31_get_next_image_type(); 243 244 /* Program EL3 registers to enable entry into the next EL */ 245 next_image_info = bl31_plat_get_next_image_ep_info(image_type); 246 assert(next_image_info != NULL); 247 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr)); 248 249 INFO("BL31: Preparing for EL3 exit to %s world\n", 250 (image_type == SECURE) ? "secure" : "normal"); 251 print_entry_point_info(next_image_info); 252 cm_init_my_context(next_image_info); 253 254 /* 255 * If we are entering the Non-secure world, use 256 * 'cm_prepare_el3_exit_ns' to exit. 257 */ 258 if (image_type == NON_SECURE) { 259 cm_prepare_el3_exit_ns(); 260 } else { 261 cm_prepare_el3_exit(image_type); 262 } 263 } 264 265 /******************************************************************************* 266 * This function initializes the pointer to BL32 init function. This is expected 267 * to be called by the SPD after it finishes all its initialization 268 ******************************************************************************/ 269 void bl31_register_bl32_init(int32_t (*func)(void)) 270 { 271 bl32_init = func; 272 } 273 274 #if ENABLE_RME 275 /******************************************************************************* 276 * This function initializes the pointer to RMM init function. This is expected 277 * to be called by the RMMD after it finishes all its initialization 278 ******************************************************************************/ 279 void bl31_register_rmm_init(int32_t (*func)(void)) 280 { 281 rmm_init = func; 282 } 283 #endif 284