xref: /rk3399_ARM-atf/bl2/aarch64/bl2_entrypoint.S (revision 8cec598ba3b689b86d9dfc58bca5610bdc48f55a)
1/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
32#include <asm_macros.S>
33#include <bl_common.h>
34
35
36	.globl	bl2_entrypoint
37
38
39
40func bl2_entrypoint
41	/*---------------------------------------------
42	 * Store the extents of the tzram available to
43	 * BL2 for future use. Use the opcode param to
44	 * allow implement other functions if needed.
45	 * ---------------------------------------------
46	 */
47	mov	x20, x0
48	mov	x21, x1
49	mov	x22, x2
50
51	/* ---------------------------------------------
52	 * This is BL2 which is expected to be executed
53	 * only by the primary cpu (at least for now).
54	 * So, make sure no secondary has lost its way.
55	 * ---------------------------------------------
56	 */
57	bl	read_mpidr
58	mov	x19, x0
59	bl	platform_is_primary_cpu
60	cbz	x0, _panic
61
62	/* ---------------------------------------------
63	 * Set the exception vector to something sane.
64	 * ---------------------------------------------
65	 */
66	adr	x0, early_exceptions
67	msr	vbar_el1, x0
68
69	/* ---------------------------------------------
70	 * Enable the instruction cache.
71	 * ---------------------------------------------
72	 */
73	mrs	x0, sctlr_el1
74	orr	x0, x0, #SCTLR_I_BIT
75	msr	sctlr_el1, x0
76	isb
77
78	/* ---------------------------------------------
79	 * Check the opcodes out of paranoia.
80	 * ---------------------------------------------
81	 */
82	mov	x0, #RUN_IMAGE
83	cmp	x0, x20
84	b.ne	_panic
85
86	/* ---------------------------------------------
87	 * Zero out NOBITS sections. There are 2 of them:
88	 *   - the .bss section;
89	 *   - the coherent memory section.
90	 * ---------------------------------------------
91	 */
92	ldr	x0, =__BSS_START__
93	ldr	x1, =__BSS_SIZE__
94	bl	zeromem16
95
96	ldr	x0, =__COHERENT_RAM_START__
97	ldr	x1, =__COHERENT_RAM_UNALIGNED_SIZE__
98	bl	zeromem16
99
100	/* --------------------------------------------
101	 * Give ourselves a small coherent stack to
102	 * ease the pain of initializing the MMU
103	 * --------------------------------------------
104	 */
105	mov	x0, x19
106	bl	platform_set_coherent_stack
107
108	/* ---------------------------------------------
109	 * Perform early platform setup & platform
110	 * specific early arch. setup e.g. mmu setup
111	 * ---------------------------------------------
112	 */
113	mov	x0, x21
114	mov	x1, x22
115	bl	bl2_early_platform_setup
116	bl	bl2_plat_arch_setup
117
118	/* ---------------------------------------------
119	 * Give ourselves a stack allocated in Normal
120	 * -IS-WBWA memory
121	 * ---------------------------------------------
122	 */
123	mov	x0, x19
124	bl	platform_set_stack
125
126	/* ---------------------------------------------
127	 * Jump to main function.
128	 * ---------------------------------------------
129	 */
130	bl	bl2_main
131_panic:
132	b	_panic
133