1/* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <arch.h> 32#include <asm_macros.S> 33#include <bl_common.h> 34 35 36 .globl bl2_entrypoint 37 38 39 40func bl2_entrypoint 41 /*--------------------------------------------- 42 * Save from x1 the extents of the tzram 43 * available to BL2 for future use. 44 * x0 is not currently used. 45 * --------------------------------------------- 46 */ 47 mov x20, x1 48 49 /* --------------------------------------------- 50 * Set the exception vector to something sane. 51 * --------------------------------------------- 52 */ 53 adr x0, early_exceptions 54 msr vbar_el1, x0 55 isb 56 57 /* --------------------------------------------- 58 * Enable the SError interrupt now that the 59 * exception vectors have been setup. 60 * --------------------------------------------- 61 */ 62 msr daifclr, #DAIF_ABT_BIT 63 64 /* --------------------------------------------- 65 * Enable the instruction cache, stack pointer 66 * and data access alignment checks 67 * --------------------------------------------- 68 */ 69 mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT) 70 mrs x0, sctlr_el1 71 orr x0, x0, x1 72 msr sctlr_el1, x0 73 isb 74 75 /* --------------------------------------------- 76 * Invalidate the RW memory used by the BL2 77 * image. This includes the data and NOBITS 78 * sections. This is done to safeguard against 79 * possible corruption of this memory by dirty 80 * cache lines in a system cache as a result of 81 * use by an earlier boot loader stage. 82 * --------------------------------------------- 83 */ 84 adr x0, __RW_START__ 85 adr x1, __RW_END__ 86 sub x1, x1, x0 87 bl inv_dcache_range 88 89 /* --------------------------------------------- 90 * Zero out NOBITS sections. There are 2 of them: 91 * - the .bss section; 92 * - the coherent memory section. 93 * --------------------------------------------- 94 */ 95 ldr x0, =__BSS_START__ 96 ldr x1, =__BSS_SIZE__ 97 bl zeromem 98 99#if USE_COHERENT_MEM 100 ldr x0, =__COHERENT_RAM_START__ 101 ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ 102 bl zeromem 103#endif 104 105 /* -------------------------------------------- 106 * Allocate a stack whose memory will be marked 107 * as Normal-IS-WBWA when the MMU is enabled. 108 * There is no risk of reading stale stack 109 * memory after enabling the MMU as only the 110 * primary cpu is running at the moment. 111 * -------------------------------------------- 112 */ 113 bl plat_set_my_stack 114 115 /* --------------------------------------------- 116 * Initialize the stack protector canary before 117 * any C code is called. 118 * --------------------------------------------- 119 */ 120#if STACK_PROTECTOR_ENABLED 121 bl update_stack_protector_canary 122#endif 123 124 /* --------------------------------------------- 125 * Perform early platform setup & platform 126 * specific early arch. setup e.g. mmu setup 127 * --------------------------------------------- 128 */ 129 mov x0, x20 130 bl bl2_early_platform_setup 131 bl bl2_plat_arch_setup 132 133 /* --------------------------------------------- 134 * Jump to main function. 135 * --------------------------------------------- 136 */ 137 bl bl2_main 138 139 /* --------------------------------------------- 140 * Should never reach this point. 141 * --------------------------------------------- 142 */ 143 no_ret plat_panic_handler 144 145endfunc bl2_entrypoint 146