xref: /rk3399_ARM-atf/bl2/aarch64/bl2_entrypoint.S (revision 4f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a56)
1/*
2 * Copyright (c) 2013, ARM Limited. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <bl_common.h>
32
33
34	.globl	bl2_entrypoint
35
36
37	.section	entry_code, "ax"; .align 3
38
39
40bl2_entrypoint:; .type bl2_entrypoint, %function
41	/*---------------------------------------------
42	 * Store the extents of the tzram available to
43	 * BL2 for future use. Use the opcode param to
44	 * allow implement other functions if needed.
45	 * ---------------------------------------------
46	 */
47	mov	x20, x0
48	mov	x21, x1
49	mov	x22, x2
50
51	/* ---------------------------------------------
52	 * This is BL2 which is expected to be executed
53	 * only by the primary cpu (at least for now).
54	 * So, make sure no secondary has lost its way.
55	 * ---------------------------------------------
56	 */
57	bl	read_mpidr
58	mov	x19, x0
59	bl	platform_is_primary_cpu
60	cbz	x0, _panic
61
62	/* --------------------------------------------
63	 * Give ourselves a small coherent stack to
64	 * ease the pain of initializing the MMU
65	 * --------------------------------------------
66	 */
67	mov	x0, x19
68	bl	platform_set_coherent_stack
69
70	/* ---------------------------------------------
71	 * Perform early platform setup & platform
72	 * specific early arch. setup e.g. mmu setup
73	 * ---------------------------------------------
74	 */
75	mov	x0, x21
76	mov	x1, x22
77	bl	bl2_early_platform_setup
78	bl	bl2_plat_arch_setup
79
80	/* ---------------------------------------------
81	 * Give ourselves a stack allocated in Normal
82	 * -IS-WBWA memory
83	 * ---------------------------------------------
84	 */
85	mov	x0, x19
86	bl	platform_set_stack
87
88	/* ---------------------------------------------
89	 * Jump to main function.
90	 * ---------------------------------------------
91	 */
92	bl	bl2_main
93_panic:
94	b	_panic
95