1/* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <bl_common.h> 10#include <el3_common_macros.S> 11 12 13 .globl bl2_entrypoint 14 .globl bl2_run_next_image 15 16 17func bl2_entrypoint 18 /* Save arguments x0-x3 from previous Boot loader */ 19 mov r9, r0 20 mov r10, r1 21 mov r11, r2 22 mov r12, r3 23 24 el3_entrypoint_common \ 25 _init_sctlr=1 \ 26 _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ 27 _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ 28 _init_memory=1 \ 29 _init_c_runtime=1 \ 30 _exception_vectors=bl2_vector_table 31 32 /* 33 * Restore parameters of boot rom 34 */ 35 mov r0, r9 36 mov r1, r10 37 mov r2, r11 38 mov r3, r12 39 40 bl bl2_el3_early_platform_setup 41 bl bl2_el3_plat_arch_setup 42 43 /* --------------------------------------------- 44 * Jump to main function. 45 * --------------------------------------------- 46 */ 47 bl bl2_main 48 49 /* --------------------------------------------- 50 * Should never reach this point. 51 * --------------------------------------------- 52 */ 53 no_ret plat_panic_handler 54 55endfunc bl2_entrypoint 56 57func bl2_run_next_image 58 mov r8,r0 59 60 /* 61 * MMU needs to be disabled because both BL2 and BL32 execute 62 * in PL1, and therefore share the same address space. 63 * BL32 will initialize the address space according to its 64 * own requirement. 65 */ 66 bl disable_mmu_icache_secure 67 stcopr r0, TLBIALL 68 dsb sy 69 isb 70 mov r0, r8 71 bl bl2_el3_plat_prepare_exit 72 73 /* 74 * Extract PC and SPSR based on struct `entry_point_info_t` 75 * and load it in LR and SPSR registers respectively. 76 */ 77 ldr lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET] 78 ldr r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)] 79 msr spsr, r1 80 81 /* Some BL32 stages expect lr_svc to provide the BL33 entry address */ 82 cps #MODE32_svc 83 ldr lr, [r8, #ENTRY_POINT_INFO_LR_SVC_OFFSET] 84 cps #MODE32_mon 85 86 add r8, r8, #ENTRY_POINT_INFO_ARGS_OFFSET 87 ldm r8, {r0, r1, r2, r3} 88 eret 89endfunc bl2_run_next_image 90