1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20CROSS_COMPILE ?= arm-linux-gnueabihf- 21CROSS_COMPILE32 ?= $(CROSS_COMPILE) 22CROSS_COMPILE64 ?= aarch64-linux-gnu- 23COMPILER ?= gcc 24 25# For convenience 26ifdef CFLAGS 27CFLAGS32 ?= $(CFLAGS) 28CFLAGS64 ?= $(CFLAGS) 29endif 30 31# Compiler warning level. 32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 33WARNS ?= 3 34 35# Path to the Python interpreter used by the build system. 36# This variable is set to the default python3 interpreter in the user's 37# path. But build environments that require more explicit control can 38# set the path to a specific interpreter through this variable. 39PYTHON3 ?= python3 40 41# Define DEBUG=1 to compile without optimization (forces -O0) 42# DEBUG=1 43ifeq ($(DEBUG),1) 44# For backwards compatibility 45$(call force,CFG_CC_OPT_LEVEL,0) 46$(call force,CFG_DEBUG_INFO,y) 47endif 48 49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 50# Optimize for size by default, usually gives good performance too. 51CFG_CC_OPT_LEVEL ?= s 52 53# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 54CFG_DEBUG_INFO ?= y 55 56# If y, enable debug features of the TEE core (assertions and lock checks 57# are enabled, panic and assert messages are more verbose, data and prefetch 58# aborts show a stack dump). When disabled, the NDEBUG directive is defined 59# so assertions are disabled. 60CFG_TEE_CORE_DEBUG ?= y 61 62# Log levels for the TEE core. Defines which core messages are displayed 63# on the secure console. Disabling core log (level set to 0) also disables 64# logs from the TAs. 65# 0: none 66# 1: error 67# 2: error + info 68# 3: error + info + debug 69# 4: error + info + debug + flow 70CFG_TEE_CORE_LOG_LEVEL ?= 2 71 72# TA log level 73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 75# when the TA is built. 76CFG_TEE_TA_LOG_LEVEL ?= 1 77 78# TA enablement 79# When defined to "y", TA traces are output according to 80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 81CFG_TEE_CORE_TA_TRACE ?= y 82 83# If y, enable the memory leak detection feature in the bget memory allocator. 84# When this feature is enabled, calling mdbg_check(1) will print a list of all 85# the currently allocated buffers and the location of the allocation (file and 86# line number). 87# Note: make sure the log level is high enough for the messages to show up on 88# the secure console! For instance: 89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 90# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 91# - To debug TEE core allocations: build OP-TEE with: 92# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 93CFG_TEE_CORE_MALLOC_DEBUG ?= n 94CFG_TEE_TA_MALLOC_DEBUG ?= n 95# Prints an error message and dumps the stack on failed memory allocations 96# using malloc() and friends. 97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 98 99# Mask to select which messages are prefixed with long debugging information 100# (severity, core ID, thread ID, component name, function name, line number) 101# based on the message level. If BIT(level) is set, the long prefix is shown. 102# Otherwise a short prefix is used (severity and component name only). 103# Levels: 0=none 1=error 2=info 3=debug 4=flow 104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 105 106# PRNG configuration 107# If CFG_WITH_SOFTWARE_PRNG is enabled, crypto provider provided 108# software PRNG implementation is used. 109# Otherwise, you need to implement hw_get_random_bytes() for your platform 110CFG_WITH_SOFTWARE_PRNG ?= y 111 112# Number of threads 113CFG_NUM_THREADS ?= 2 114 115# API implementation version 116CFG_TEE_API_VERSION ?= GPD-1.1-dev 117 118# Implementation description (implementation-dependent) 119CFG_TEE_IMPL_DESCR ?= OPTEE 120 121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 122# World? 123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 124 125# The following values are not extracted from the "git describe" output because 126# we might be outside of a Git environment, or the tree may have been cloned 127# with limited depth not including any tag, so there is really no guarantee 128# that TEE_IMPL_VERSION contains the major and minor revision numbers. 129CFG_OPTEE_REVISION_MAJOR ?= 3 130CFG_OPTEE_REVISION_MINOR ?= 19 131CFG_OPTEE_REVISION_EXTRA ?= 132 133# Trusted OS implementation version 134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 135 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 136ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y) 137TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0) 138else 139TEE_IMPL_GIT_SHA1 := 0x0 140endif 141 142# Trusted OS implementation manufacturer name 143CFG_TEE_MANUFACTURER ?= LINARO 144 145# Trusted firmware version 146CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 147 148# Trusted OS implementation manufacturer name 149CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 150 151# Rich Execution Environment (REE) file system support: normal world OS 152# provides the actual storage. 153# This is the default FS when enabled (i.e., the one used when 154# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 155CFG_REE_FS ?= y 156 157# RPMB file system support 158CFG_RPMB_FS ?= n 159 160# Enable roll-back protection of REE file system using RPMB. 161# Roll-back protection only works if CFG_RPMB_FS = y. 162CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 163$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 164 165# Device identifier used when CFG_RPMB_FS = y. 166# The exact meaning of this value is platform-dependent. On Linux, the 167# tee-supplicant process will open /dev/mmcblk<id>rpmb 168CFG_RPMB_FS_DEV_ID ?= 0 169 170# This config variable determines the number of entries read in from RPMB at 171# once whenever a function traverses the RPMB FS. Increasing the default value 172# has the following consequences: 173# - More memory required on heap. A single FAT entry currently has a size of 174# 256 bytes. 175# - Potentially significant speed-ups for RPMB I/O. Depending on how many 176# entries a function needs to traverse, the number of time-consuming RPMB 177# read-in operations can be reduced. 178# Chosing a proper value is both platform- (available memory) and use-case- 179# dependent (potential number of FAT fs entries), so overwrite in platform 180# config files 181CFG_RPMB_FS_RD_ENTRIES ?= 8 182 183# Enables caching of FAT FS entries when set to a value greater than zero. 184# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 185# entries. The cache is populated when FAT FS entries are initially read in. 186# When traversing the FAT FS entries, we read from the cache instead of reading 187# in the entries from RPMB storage. Consequently, when a FAT FS entry is 188# written, the cache is updated. In scenarios where an estimate of the number 189# of FAT FS entries can be made, the cache may be specifically tailored to 190# store all entries. The caching can improve RPMB I/O at the cost 191# of additional memory. 192# Without caching, we temporarily require 193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 194# while traversing the FAT FS (e.g. in read_fat). 195# For example 8*256 bytes = 2kB while in read_fat. 196# With caching, we constantly require up to 197# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 198# depending on how many elements are in the cache, and additional temporary 199# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 200# in case the cache is too small to hold all elements when traversing. 201CFG_RPMB_FS_CACHE_ENTRIES ?= 0 202 203# Print RPMB data frames sent to and received from the RPMB device 204CFG_RPMB_FS_DEBUG_DATA ?= n 205 206# Clear RPMB content at cold boot 207CFG_RPMB_RESET_FAT ?= n 208 209# Use a hard coded RPMB key instead of deriving it from the platform HUK 210CFG_RPMB_TESTKEY ?= n 211 212# Enables RPMB key programming by the TEE, in case the RPMB partition has not 213# been configured yet. 214# !!! Security warning !!! 215# Do *NOT* enable this in product builds, as doing so would allow the TEE to 216# leak the RPMB key. 217# This option is useful in the following situations: 218# - Testing 219# - RPMB key provisioning in a controlled environment (factory setup) 220CFG_RPMB_WRITE_KEY ?= n 221 222_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 223 224# Signing key for OP-TEE TA's 225# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 226# key and then set TA_PUBLIC_KEY to match public key from the HSM. 227# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 228TA_SIGN_KEY ?= keys/default_ta.pem 229TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 230 231# Include lib/libutils/isoc in the build? Most platforms need this, but some 232# may not because they obtain the isoc functions from elsewhere 233CFG_LIBUTILS_WITH_ISOC ?= y 234 235# Enables floating point support for user TAs 236# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 237# hard-float is basically a super set of soft-float. Hard-float 238# requires all the support routines provided for soft-float, but the 239# compiler may choose to optimize to not use some of them and use 240# the floating-point registers instead. 241# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 242# nothing with ` -mgeneral-regs-only`) 243# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 244CFG_TA_FLOAT_SUPPORT ?= y 245 246# Stack unwinding: print a stack dump to the console on core or TA abort, or 247# when a TA panics. 248# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 249# unwound (not paged TAs, however). 250# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 251# this option will increase the size of the 32-bit TEE binary by a few KB. 252# Similarly, TAs have to be compiled with -funwind-tables (default when the 253# option is set) otherwise they can't be unwound. 254# Warning: since the unwind sequence for user-mode (TA) code is implemented in 255# the privileged layer of OP-TEE, enabling this feature will weaken the 256# user/kernel isolation. Therefore it should be disabled in release builds. 257ifeq ($(CFG_TEE_CORE_DEBUG),y) 258CFG_UNWIND ?= y 259endif 260 261# Enable support for dynamically loaded user TAs 262CFG_WITH_USER_TA ?= y 263 264# Choosing the architecture(s) of user-mode libraries (used by TAs) 265# 266# Platforms may define a list of supported architectures for user-mode code 267# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 268# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 269# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 270# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 271# The first entry in $(supported-ta-targets) has a special role, see 272# CFG_USER_TA_TARGET_<ta-name> below. 273# 274# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 275# change the order of the values. 276# 277# The list of TA architectures is ultimately stored in $(ta-targets). 278 279# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 280# defined, selects the unique TA architecture mode for building the in-tree TA 281# <ta-name>. Can be either ta_arm32 or ta_arm64. 282# By default, in-tree TAs are built using the first architecture specified in 283# $(ta-targets). 284 285# Address Space Layout Randomization for user-mode Trusted Applications 286# 287# When this flag is enabled, the ELF loader will introduce a random offset 288# when mapping the application in user space. ASLR makes the exploitation of 289# memory corruption vulnerabilities more difficult. 290CFG_TA_ASLR ?= y 291 292# How much ASLR may shift the base address (in pages). The base address is 293# randomly shifted by an integer number of pages comprised between these two 294# values. Bigger ranges are more secure because they make the addresses harder 295# to guess at the expense of using more memory for the page tables. 296CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 297CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 298 299# Address Space Layout Randomization for TEE Core 300# 301# When this flag is enabled, the early init code will introduce a random 302# offset when mapping TEE Core. ASLR makes the exploitation of memory 303# corruption vulnerabilities more difficult. 304CFG_CORE_ASLR ?= y 305 306# Load user TAs from the REE filesystem via tee-supplicant 307CFG_REE_FS_TA ?= y 308 309# Pre-authentication of TA binaries loaded from the REE filesystem 310# 311# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 312# "Secure DDR" pool, check the signature, then process the file only if it is 313# valid. 314# - If disabled: hash the binaries as they are being processed and verify the 315# signature as a last step. 316CFG_REE_FS_TA_BUFFERED ?= n 317$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 318 319# When CFG_REE_FS=y and CFG_RPMB_FS=y: 320# Allow secure storage in the REE FS to be entirely deleted without causing 321# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 322# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 323# can be used to reset the secure storage to a clean, empty state. 324# Typically used for testing only since it weakens storage security. 325CFG_REE_FS_ALLOW_RESET ?= n 326 327# Support for loading user TAs from a special section in the TEE binary. 328# Such TAs are available even before tee-supplicant is available (hence their 329# name), but note that many services exported to TAs may need tee-supplicant, 330# so early use is limited to a subset of the TEE Internal Core API (crypto...) 331# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 332# file(s). For example: 333# $ make ... \ 334# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 335# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 336# Typical build steps: 337# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 338# # headers, makefiles), ready to build TAs. 339# # CFG_EARLY_TA=y is optional, it prevents 340# # later library recompilations. 341# <build some TAs> 342# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 343# 344# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 345# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 346# <name-of-ta>/<uuid> 347# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 348ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 349$(call force,CFG_EARLY_TA,y) 350else 351CFG_EARLY_TA ?= n 352endif 353 354ifeq ($(CFG_EARLY_TA),y) 355$(call force,CFG_EMBEDDED_TS,y) 356endif 357 358ifneq ($(SP_PATHS),) 359$(call force,CFG_EMBEDDED_TS,y) 360else 361CFG_SECURE_PARTITION ?= n 362endif 363 364ifeq ($(CFG_SECURE_PARTITION),y) 365$(call force,CFG_EMBEDDED_TS,y) 366endif 367 368ifeq ($(CFG_EMBEDDED_TS),y) 369$(call force,CFG_ZLIB,y) 370endif 371 372# By default the early TAs are compressed in the TEE binary, it is possible to 373# not compress them with CFG_EARLY_TA_COMPRESS=n 374CFG_EARLY_TA_COMPRESS ?= y 375 376# Enable paging, requires SRAM, can't be enabled by default 377CFG_WITH_PAGER ?= n 378 379# Use the pager for user TAs 380CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 381 382# If paging of user TAs, that is, R/W paging default to enable paging of 383# TAG and IV in order to reduce heap usage. 384CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 385 386# Runtime lock dependency checker: ensures that a proper locking hierarchy is 387# used in the TEE core when acquiring and releasing mutexes. Any violation will 388# cause a panic as soon as the invalid locking condition is detected. If 389# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 390# records the call stacks when locks are taken, and prints them when a 391# potential deadlock is found. 392# Expect a significant performance impact when enabling this. 393CFG_LOCKDEP ?= n 394CFG_LOCKDEP_RECORD_STACK ?= y 395 396# BestFit algorithm in bget reduces the fragmentation of the heap when running 397# with the pager enabled or lockdep 398CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 399 400# Enable support for detected undefined behavior in C 401# Uses a lot of memory, can't be enabled by default 402CFG_CORE_SANITIZE_UNDEFINED ?= n 403 404# Enable Kernel Address sanitizer, has a huge performance impact, uses a 405# lot of memory and need platform specific adaptations, can't be enabled by 406# default 407CFG_CORE_SANITIZE_KADDRESS ?= n 408 409# Add stack guards before/after stacks and periodically check them 410CFG_WITH_STACK_CANARIES ?= y 411 412# Use compiler instrumentation to troubleshoot stack overflows. 413# When enabled, most C functions check the stack pointer against the current 414# stack limits on entry and panic immediately if it is out of range. 415CFG_CORE_DEBUG_CHECK_STACKS ?= n 416 417# Use when the default stack allocations are not sufficient. 418CFG_STACK_THREAD_EXTRA ?= 0 419CFG_STACK_TMP_EXTRA ?= 0 420 421# Device Tree support 422# 423# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 424# device tree blob (DTB) parsing from the core. 425# 426# When CFG_DT is enabled, the TEE _start function expects to find 427# the address of a DTB in register X2/R2 provided by the early boot stage 428# or value 0 if boot stage provides no DTB. 429# 430# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 431# and the external device tree is expected to be used/modified. Its value 432# defaults to CFG_DT. 433# 434# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 435# be in the secure memory. 436# 437# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 438# relative path of a DTS file located in core/arch/$(ARCH)/dts. 439# The DTS file is compiled into a DTB file which content is embedded in a 440# read-only section of the core. 441ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 442CFG_EMBED_DTB ?= y 443endif 444ifeq ($(CFG_EMBED_DTB),y) 445$(call force,CFG_DT,y) 446endif 447CFG_EMBED_DTB ?= n 448CFG_DT ?= n 449CFG_EXTERNAL_DT ?= $(CFG_DT) 450CFG_MAP_EXT_DT_SECURE ?= n 451ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 452$(call force,CFG_DT,y) 453endif 454 455# Maximum size of the Device Tree Blob, has to be large enough to allow 456# editing of the supplied DTB. 457CFG_DTB_MAX_SIZE ?= 0x10000 458 459# Maximum size of the init info data passed to Secure Partitions. 460CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 461 462# Device Tree Overlay support. 463# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 464# external DTB. The overlay is created when no valid DTB overlay is found. 465# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 466# DTB location. 467# External DTB location (physical address) is provided either by boot 468# argument arg2 or from CFG_DT_ADDR if defined. 469# A subsequent boot stage can then merge the generated overlay DTB into a main 470# DTB using the standard fdt_overlay_apply() method. 471CFG_EXTERNAL_DTB_OVERLAY ?= n 472CFG_GENERATE_DTB_OVERLAY ?= n 473 474ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 475$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 476endif 477_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 478 CFG_GENERATE_DTB_OVERLAY) 479 480# All embedded tests are supposed to be disabled by default, this flag 481# is used to control the default value of all other embedded tests 482CFG_ENABLE_EMBEDDED_TESTS ?= n 483 484# Enable core self tests and related pseudo TAs 485CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 486 487# Compiles bget_main_test() to be called from a test TA 488CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 489 490# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedb DT driver probing tests. 491# This also requires embeddeding a DTB with expected content. 492# Defautl disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 493# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 494CFG_DT_DRIVER_EMBEDDED_TEST ?= n 495ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 496CFG_DRIVERS_CLK ?= y 497CFG_DRIVERS_RSTCTRL ?= y 498CFG_DRIVERS_CLK_EARLY_PROBE ?= n 499$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 500endif 501 502# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 503# parsing in the embedded DTB for driver probing. The alternative is 504# an exploration based on compatible drivers found. It is default disabled. 505CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 506 507# This option enables OP-TEE to respond to SMP boot request: the Rich OS 508# issues this to request OP-TEE to release secondaries cores out of reset, 509# with specific core number and non-secure entry address. 510CFG_BOOT_SECONDARY_REQUEST ?= n 511 512# Default heap size for Core, 64 kB 513CFG_CORE_HEAP_SIZE ?= 65536 514 515# Default size of nexus heap. 16 kB. Used only if CFG_VIRTUALIZATION 516# is enabled 517CFG_CORE_NEX_HEAP_SIZE ?= 16384 518 519# TA profiling. 520# When this option is enabled, OP-TEE can execute Trusted Applications 521# instrumented with GCC's -pg flag and will output profiling information 522# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 523# tee-supplicant) 524# Note: this does not work well with shared libraries at the moment for a 525# couple of reasons: 526# 1. The profiling code assumes a unique executable section in the TA VA space. 527# 2. The code used to detect at run time if the TA is intrumented assumes that 528# the TA is linked statically. 529CFG_TA_GPROF_SUPPORT ?= n 530 531# TA function tracing. 532# When this option is enabled, OP-TEE can execute Trusted Applications 533# instrumented with GCC's -pg flag and will output function tracing 534# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is 535# defined in tee-supplicant) 536CFG_FTRACE_SUPPORT ?= n 537 538# How to make room when the function tracing buffer is full? 539# 'shift': shift the previously stored data by the amount needed in order 540# to always keep the latest logs (slower, especially with big buffer sizes) 541# 'wrap': discard the previous data and start at the beginning of the buffer 542# again (fast, but can result in a mostly empty buffer) 543# 'stop': stop logging new data 544CFG_FTRACE_BUF_WHEN_FULL ?= shift 545$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap) 546$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y) 547 548# Function tracing: unit to be used when displaying durations 549# 0: always display durations in microseconds 550# >0: if duration is greater or equal to the specified value (in microseconds), 551# display it in milliseconds 552CFG_FTRACE_US_MS ?= 10000 553 554# Core syscall function tracing. 555# When this option is enabled, OP-TEE core is instrumented with GCC's 556# -pg flag and will output syscall function graph in user TA ftrace 557# buffer 558CFG_SYSCALL_FTRACE ?= n 559$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 560 561# Enable to compile user TA libraries with profiling (-pg). 562# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 563CFG_ULIBS_MCOUNT ?= n 564# Profiling/tracing of syscall wrapper (utee_*) 565CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 566 567ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 568ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 569$(error Cannot instrument user libraries if user mode profiling is disabled) 570endif 571endif 572 573# Build libutee, libutils, libmbedtls as shared libraries. 574# - Static libraries are still generated when this is enabled, but TAs will use 575# the shared libraries unless explicitly linked with the -static flag. 576# - Shared libraries are made of two files: for example, libutee is 577# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 578# is a totally standard shared object, and should be used to link against. 579# The '.ta' file is a signed version of the '.so' and should be installed 580# in the same way as TAs so that they can be found at runtime. 581CFG_ULIBS_SHARED ?= n 582 583ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 584$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 585endif 586 587# CFG_GP_SOCKETS 588# Enable Global Platform Sockets support 589CFG_GP_SOCKETS ?= y 590 591# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 592# invocation parameters referring to specific secure memories). 593CFG_SECURE_DATA_PATH ?= n 594 595# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 596# TA binaries are stored encrypted in the REE FS and are protected by 597# metadata in secure storage. 598CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 599$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 600 601# Enable the pseudo TA that managages TA storage in secure storage 602CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 603$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 604 605# Enable the pseudo TA for misc. auxilary services, extending existing 606# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 607# pool etc...) 608CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 609$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 610 611# Enable the pseudo TA for enumeration of TEE based devices for the normal 612# world OS. 613CFG_DEVICE_ENUM_PTA ?= y 614 615# The attestation pseudo TA provides an interface to request measurements of 616# a TA or the TEE binary. 617CFG_ATTESTATION_PTA ?= n 618$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 619 620# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 621# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 622# note that such a low value is not secure. 623# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 624# https://tools.ietf.org/html/rfc8017#section-9.1.1 625# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 626# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 627CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 628 629# Define the number of cores per cluster used in calculating core position. 630# The cluster number is shifted by this value and added to the core ID, 631# so its value represents log2(cores/cluster). 632# Default is 2**(2) = 4 cores per cluster. 633CFG_CORE_CLUSTER_SHIFT ?= 2 634 635# Define the number of threads per core used in calculating processing 636# element's position. The core number is shifted by this value and added to 637# the thread ID, so its value represents log2(threads/core). 638# Default is 2**(0) = 1 threads per core. 639CFG_CORE_THREAD_SHIFT ?= 0 640 641# Enable support for dynamic shared memory (shared memory anywhere in 642# non-secure memory). 643CFG_CORE_DYN_SHM ?= y 644 645# Enable support for reserved shared memory (shared memory in a carved out 646# memory area). 647CFG_CORE_RESERVED_SHM ?= y 648 649# Enables support for larger physical addresses, that is, it will define 650# paddr_t as a 64-bit type. 651CFG_CORE_LARGE_PHYS_ADDR ?= n 652 653# Define the maximum size, in bits, for big numbers in the Internal Core API 654# Arithmetical functions. This does *not* influence the key size that may be 655# manipulated through the Cryptographic API. 656# Set this to a lower value to reduce the TA memory footprint. 657CFG_TA_BIGNUM_MAX_BITS ?= 2048 658 659# Define the maximum size, in bits, for big numbers in the TEE core (privileged 660# layer). 661# This value is an upper limit for the key size in any cryptographic algorithm 662# implemented by the TEE core. 663# Set this to a lower value to reduce the memory footprint. 664CFG_CORE_BIGNUM_MAX_BITS ?= 4096 665 666# Not used since libmpa was removed. Force the values to catch build scripts 667# that would set = n. 668$(call force,CFG_TA_MBEDTLS_MPI,y) 669$(call force,CFG_TA_MBEDTLS,y) 670 671# Compile the TA library mbedTLS with self test functions, the functions 672# need to be called to test anything 673CFG_TA_MBEDTLS_SELF_TEST ?= y 674 675# By default use tomcrypt as the main crypto lib providing an implementation 676# for the API in <crypto/crypto.h> 677# CFG_CRYPTOLIB_NAME is used as libname and 678# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 679# 680# It's also possible to configure to use mbedtls instead of tomcrypt. 681# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 682# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 683CFG_CRYPTOLIB_NAME ?= tomcrypt 684CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 685 686# Not used since libmpa was removed. Force the value to catch build scripts 687# that would set = n. 688$(call force,CFG_CORE_MBEDTLS_MPI,y) 689 690# Enable virtualization support. OP-TEE will not work without compatible 691# hypervisor if this option is enabled. 692CFG_VIRTUALIZATION ?= n 693 694ifeq ($(CFG_VIRTUALIZATION),y) 695$(call force,CFG_CORE_RODATA_NOEXEC,y) 696$(call force,CFG_CORE_RWDATA_NOEXEC,y) 697 698# Default number of virtual guests 699CFG_VIRT_GUEST_COUNT ?= 2 700endif 701 702# Enables backwards compatible derivation of RPMB and SSK keys 703CFG_CORE_HUK_SUBKEY_COMPAT ?= y 704 705# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 706# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 707CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 708 709# Compress and encode conf.mk into the TEE core, and show the encoded string on 710# boot (with severity TRACE_INFO). 711CFG_SHOW_CONF_ON_BOOT ?= n 712 713# Enables support for passing a TPM Event Log stored in secure memory 714# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 715# taken before the service was up and running. 716CFG_CORE_TPM_EVENT_LOG ?= n 717 718# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 719# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 720# 721# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 722# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 723# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 724# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 725# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 726# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 727# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 728# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 729CFG_SCMI_MSG_DRIVERS ?= n 730ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 731CFG_SCMI_MSG_CLOCK ?= n 732CFG_SCMI_MSG_RESET_DOMAIN ?= n 733CFG_SCMI_MSG_SHM_MSG ?= n 734CFG_SCMI_MSG_SMT ?= n 735CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 736CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 737CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 738CFG_SCMI_MSG_THREAD_ENTRY ?= n 739CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 740$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 741$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 742$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 743endif 744 745# Enable SCMI PTA interface for REE SCMI agents 746CFG_SCMI_PTA ?= n 747 748ifneq ($(CFG_STMM_PATH),) 749$(call force,CFG_WITH_STMM_SP,y) 750else 751CFG_WITH_STMM_SP ?= n 752endif 753ifeq ($(CFG_WITH_STMM_SP),y) 754$(call force,CFG_ZLIB,y) 755endif 756 757# When enabled checks that buffers passed to the GP Internal Core API 758# comply with the rules added as annotations as part of the definition of 759# the API. For example preventing buffers in non-secure shared memory when 760# not allowed. 761CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 762 763# When enabled accepts the DES key sizes excluding parity bits as in 764# the GP Internal API Specification v1.0 765CFG_COMPAT_GP10_DES ?= y 766 767# Defines a limit for many levels TAs may call each others. 768CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 769 770# Pseudo-TA to export hardware RNG output to Normal World 771# RNG characteristics are platform specific 772CFG_HWRNG_PTA ?= n 773ifeq ($(CFG_HWRNG_PTA),y) 774# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 775CFG_HWRNG_RATE ?= 0 776# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 777ifeq (,$(CFG_HWRNG_QUALITY)) 778$(error CFG_HWRNG_QUALITY not defined) 779endif 780endif 781 782# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 783# shared memory for each secure thread. When disabled, RPC shared 784# memory is released once the secure thread has completed is execution. 785ifeq ($(CFG_WITH_PAGER),y) 786CFG_PREALLOC_RPC_CACHE ?= n 787endif 788CFG_PREALLOC_RPC_CACHE ?= y 789 790# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 791# This clock framework allows to describe clock tree and provides functions to 792# get and configure the clocks. 793# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 794# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 795# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 796CFG_DRIVERS_CLK ?= n 797CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 798CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 799CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 800 801$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 802$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 803 804# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 805# OP-TEE core to provide reset controls on subsystems of the devices. 806CFG_DRIVERS_RSTCTRL ?= n 807 808# The purpose of this flag is to show a print when booting up the device that 809# indicates whether the board runs a standard developer configuration or not. 810# A developer configuration doesn't necessarily has to be secure. The intention 811# is that the one making products based on OP-TEE should override this flag in 812# plat-xxx/conf.mk for the platform they're basing their products on after 813# they've finalized implementing stubbed functionality (see OP-TEE 814# documentation/Porting guidelines) as well as vendor specific security 815# configuration. 816CFG_WARN_INSECURE ?= y 817 818# Enables warnings for declarations mixed with statements 819CFG_WARN_DECL_AFTER_STATEMENT ?= y 820 821# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 822# mechanism to limit the set of locations to which computed branch instructions 823# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 824# that support it, enable this option. A GCC toolchain built with 825# --enable-standard-branch-protection is needed to use this option. 826CFG_CORE_BTI ?= n 827 828$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 829 830# To make use of BTI in user space libraries and TA's on CPU's that support it, 831# enable this option. 832CFG_TA_BTI ?= $(CFG_CORE_BTI) 833 834$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 835 836ifeq (y-y,$(CFG_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 837$(error CFG_VIRTUALIZATION and BTI are currently incompatible) 838endif 839 840ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 841$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 842endif 843 844# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 845# and key access to memory. This is a hardware supported alternative to 846# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 847CFG_MEMTAG ?= n 848 849$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 850ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 851$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 852endif 853ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 854$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 855endif 856 857# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable enables support 858# for sending asynchronous notifications to normal world. Note that an 859# interrupt ID must be configurged by the platform too. Currently is only 860# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 861CFG_CORE_ASYNC_NOTIF ?= n 862 863$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 864 CFG_WITH_STATS)) 865 866# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 867# for signing and authenticating pointers against secret keys. These can 868# be used to mitigate ROP (Return oriented programming) attacks. This is 869# currently done by instructing the compiler to add paciasp/autiasp at the 870# begging and end of functions to sign and verify ELR. 871# 872# The CFG_CORE_PAUTH enables these instructions for the core parts 873# executing at EL1, with one secret key per thread and one secret key per 874# physical CPU. 875# 876# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 877# this option is enabled, TEE core will initialize secret keys per TA. 878CFG_CORE_PAUTH ?= n 879CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 880 881$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 882$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 883 884ifeq (y-y,$(CFG_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 885$(error CFG_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 886endif 887ifeq (y-y,$(CFG_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 888$(error CFG_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 889endif 890 891ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 892$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 893endif 894 895ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 896$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 897endif 898 899# Enable support for generic watchdog registration 900# This watchdog will then be usable by non-secure world through SMC calls. 901CFG_WDT ?= n 902 903# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 904# When enabled, CFG_WDT_SM_HANDLER_ID must be defined with a SMC ID 905CFG_WDT_SM_HANDLER ?= n 906 907$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 908ifeq (y-,$(CFG_WDT_SM_HANDLER)-$(CFG_WDT_SM_HANDLER_ID)) 909$(error CFG_WDT_SM_HANDLER_ID must be defined when enabling CFG_WDT_SM_HANDLER) 910endif 911 912# Allow using the udelay/mdelay function for platforms without ARM generic timer 913# extension. When set to 'n', the plat_get_freq() function must be defined by 914# the platform code 915CFG_CORE_HAS_GENERIC_TIMER ?= y 916 917# Enable RTC API 918CFG_DRIVERS_RTC ?= n 919 920# Enable PTA for RTC access from non-secure world 921CFG_RTC_PTA ?= n 922 923# Enable TPM2 924CFG_DRIVERS_TPM2 ?= n 925CFG_DRIVERS_TPM2_MMIO ?= n 926ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 927CFG_CORE_TCG_PROVIDER ?= $(CFG_DRIVERS_TPM2) 928endif 929 930# Enable the FF-A SPMC tests in xtests 931CFG_SPMC_TESTS ?= n 932 933# Allocate the translation tables needed to map the S-EL0 application 934# loaded 935CFG_CORE_PREALLOC_EL0_TBLS ?= n 936ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 937$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 938endif 939