xref: /optee_os/mk/config.mk (revision c44d734b6366cbf4d12610310e809872db65f89d)
1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20CROSS_COMPILE ?= arm-linux-gnueabihf-
21CROSS_COMPILE32 ?= $(CROSS_COMPILE)
22CROSS_COMPILE64 ?= aarch64-linux-gnu-
23COMPILER ?= gcc
24
25# For convenience
26ifdef CFLAGS
27CFLAGS32 ?= $(CFLAGS)
28CFLAGS64 ?= $(CFLAGS)
29endif
30
31# Compiler warning level.
32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
33WARNS ?= 3
34
35# Path to the Python interpreter used by the build system.
36# This variable is set to the default python3 interpreter in the user's
37# path. But build environments that require more explicit control can
38# set the path to a specific interpreter through this variable.
39PYTHON3 ?= python3
40
41# Define DEBUG=1 to compile without optimization (forces -O0)
42# DEBUG=1
43ifeq ($(DEBUG),1)
44# For backwards compatibility
45$(call force,CFG_CC_OPT_LEVEL,0)
46$(call force,CFG_DEBUG_INFO,y)
47endif
48
49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
50# Optimize for size by default, usually gives good performance too.
51CFG_CC_OPT_LEVEL ?= s
52
53# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
54CFG_DEBUG_INFO ?= y
55
56# If y, enable debug features of the TEE core (assertions and lock checks
57# are enabled, panic and assert messages are more verbose, data and prefetch
58# aborts show a stack dump). When disabled, the NDEBUG directive is defined
59# so assertions are disabled.
60CFG_TEE_CORE_DEBUG ?= y
61
62# Log levels for the TEE core. Defines which core messages are displayed
63# on the secure console. Disabling core log (level set to 0) also disables
64# logs from the TAs.
65# 0: none
66# 1: error
67# 2: error + info
68# 3: error + info + debug
69# 4: error + info + debug + flow
70CFG_TEE_CORE_LOG_LEVEL ?= 2
71
72# TA log level
73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
75# when the TA is built.
76CFG_TEE_TA_LOG_LEVEL ?= 1
77
78# TA enablement
79# When defined to "y", TA traces are output according to
80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
81CFG_TEE_CORE_TA_TRACE ?= y
82
83# If y, enable the memory leak detection feature in the bget memory allocator.
84# When this feature is enabled, calling mdbg_check(1) will print a list of all
85# the currently allocated buffers and the location of the allocation (file and
86# line number).
87# Note: make sure the log level is high enough for the messages to show up on
88# the secure console! For instance:
89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
90#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
91# - To debug TEE core allocations: build OP-TEE with:
92#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
93CFG_TEE_CORE_MALLOC_DEBUG ?= n
94CFG_TEE_TA_MALLOC_DEBUG ?= n
95# Prints an error message and dumps the stack on failed memory allocations
96# using malloc() and friends.
97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
98
99# Mask to select which messages are prefixed with long debugging information
100# (severity, core ID, thread ID, component name, function name, line number)
101# based on the message level. If BIT(level) is set, the long prefix is shown.
102# Otherwise a short prefix is used (severity and component name only).
103# Levels: 0=none 1=error 2=info 3=debug 4=flow
104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
105
106# PRNG configuration
107# If CFG_WITH_SOFTWARE_PRNG is enabled, crypto provider provided
108# software PRNG implementation is used.
109# Otherwise, you need to implement hw_get_random_byte() for your platform
110CFG_WITH_SOFTWARE_PRNG ?= y
111
112# Number of threads
113CFG_NUM_THREADS ?= 2
114
115# API implementation version
116CFG_TEE_API_VERSION ?= GPD-1.1-dev
117
118# Implementation description (implementation-dependent)
119CFG_TEE_IMPL_DESCR ?= OPTEE
120
121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
122# World?
123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
124
125# The following values are not extracted from the "git describe" output because
126# we might be outside of a Git environment, or the tree may have been cloned
127# with limited depth not including any tag, so there is really no guarantee
128# that TEE_IMPL_VERSION contains the major and minor revision numbers.
129CFG_OPTEE_REVISION_MAJOR ?= 3
130CFG_OPTEE_REVISION_MINOR ?= 17
131CFG_OPTEE_REVISION_EXTRA ?=
132
133# Trusted OS implementation version
134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
135		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA)
136ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y)
137TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0)
138else
139TEE_IMPL_GIT_SHA1 := 0x0
140endif
141
142# Trusted OS implementation manufacturer name
143CFG_TEE_MANUFACTURER ?= LINARO
144
145# Trusted firmware version
146CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
147
148# Trusted OS implementation manufacturer name
149CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
150
151# Rich Execution Environment (REE) file system support: normal world OS
152# provides the actual storage.
153# This is the default FS when enabled (i.e., the one used when
154# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
155CFG_REE_FS ?= y
156
157# RPMB file system support
158CFG_RPMB_FS ?= n
159
160# Device identifier used when CFG_RPMB_FS = y.
161# The exact meaning of this value is platform-dependent. On Linux, the
162# tee-supplicant process will open /dev/mmcblk<id>rpmb
163CFG_RPMB_FS_DEV_ID ?= 0
164
165# This config variable determines the number of entries read in from RPMB at
166# once whenever a function traverses the RPMB FS. Increasing the default value
167# has the following consequences:
168# - More memory required on heap. A single FAT entry currently has a size of
169#   256 bytes.
170# - Potentially significant speed-ups for RPMB I/O. Depending on how many
171#   entries a function needs to traverse, the number of time-consuming RPMB
172#   read-in operations can be reduced.
173# Chosing a proper value is both platform- (available memory) and use-case-
174# dependent (potential number of FAT fs entries), so overwrite in platform
175# config files
176CFG_RPMB_FS_RD_ENTRIES ?= 8
177
178# Enables caching of FAT FS entries when set to a value greater than zero.
179# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
180# entries. The cache is populated when FAT FS entries are initially read in.
181# When traversing the FAT FS entries, we read from the cache instead of reading
182# in the entries from RPMB storage. Consequently, when a FAT FS entry is
183# written, the cache is updated. In scenarios where an estimate of the number
184# of FAT FS entries can be made, the cache may be specifically tailored to
185# store all entries. The caching can improve RPMB I/O at the cost
186# of additional memory.
187# Without caching, we temporarily require
188# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
189# while traversing the FAT FS (e.g. in read_fat).
190# For example 8*256 bytes = 2kB while in read_fat.
191# With caching, we constantly require up to
192# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
193# depending on how many elements are in the cache, and additional temporary
194# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
195# in case the cache is too small to hold all elements when traversing.
196CFG_RPMB_FS_CACHE_ENTRIES ?= 0
197
198# Print RPMB data frames sent to and received from the RPMB device
199CFG_RPMB_FS_DEBUG_DATA ?= n
200
201# Clear RPMB content at cold boot
202CFG_RPMB_RESET_FAT ?= n
203
204# Use a hard coded RPMB key instead of deriving it from the platform HUK
205CFG_RPMB_TESTKEY ?= n
206
207# Enables RPMB key programming by the TEE, in case the RPMB partition has not
208# been configured yet.
209# !!! Security warning !!!
210# Do *NOT* enable this in product builds, as doing so would allow the TEE to
211# leak the RPMB key.
212# This option is useful in the following situations:
213# - Testing
214# - RPMB key provisioning in a controlled environment (factory setup)
215CFG_RPMB_WRITE_KEY ?= n
216
217_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
218
219# Signing key for OP-TEE TA's
220# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
221# key and then set TA_PUBLIC_KEY to match public key from the HSM.
222# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
223TA_SIGN_KEY ?= keys/default_ta.pem
224TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
225
226# Include lib/libutils/isoc in the build? Most platforms need this, but some
227# may not because they obtain the isoc functions from elsewhere
228CFG_LIBUTILS_WITH_ISOC ?= y
229
230# Enables floating point support for user TAs
231# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
232#	 hard-float is basically a super set of soft-float. Hard-float
233#	 requires all the support routines provided for soft-float, but the
234#	 compiler may choose to optimize to not use some of them and use
235#	 the floating-point registers instead.
236# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
237#	 nothing with ` -mgeneral-regs-only`)
238# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
239CFG_TA_FLOAT_SUPPORT ?= y
240
241# Stack unwinding: print a stack dump to the console on core or TA abort, or
242# when a TA panics.
243# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
244# unwound (not paged TAs, however).
245# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
246# this option will increase the size of the 32-bit TEE binary by a few KB.
247# Similarly, TAs have to be compiled with -funwind-tables (default when the
248# option is set) otherwise they can't be unwound.
249# Warning: since the unwind sequence for user-mode (TA) code is implemented in
250# the privileged layer of OP-TEE, enabling this feature will weaken the
251# user/kernel isolation. Therefore it should be disabled in release builds.
252ifeq ($(CFG_TEE_CORE_DEBUG),y)
253CFG_UNWIND ?= y
254endif
255
256# Enable support for dynamically loaded user TAs
257CFG_WITH_USER_TA ?= y
258
259# Choosing the architecture(s) of user-mode libraries (used by TAs)
260#
261# Platforms may define a list of supported architectures for user-mode code
262# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
263# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
264# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
265# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
266# The first entry in $(supported-ta-targets) has a special role, see
267# CFG_USER_TA_TARGET_<ta-name> below.
268#
269# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
270# change the order of the values.
271#
272# The list of TA architectures is ultimately stored in $(ta-targets).
273
274# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
275# defined, selects the unique TA architecture mode for building the in-tree TA
276# <ta-name>. Can be either ta_arm32 or ta_arm64.
277# By default, in-tree TAs are built using the first architecture specified in
278# $(ta-targets).
279
280# Address Space Layout Randomization for user-mode Trusted Applications
281#
282# When this flag is enabled, the ELF loader will introduce a random offset
283# when mapping the application in user space. ASLR makes the exploitation of
284# memory corruption vulnerabilities more difficult.
285CFG_TA_ASLR ?= y
286
287# How much ASLR may shift the base address (in pages). The base address is
288# randomly shifted by an integer number of pages comprised between these two
289# values. Bigger ranges are more secure because they make the addresses harder
290# to guess at the expense of using more memory for the page tables.
291CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
292CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
293
294# Address Space Layout Randomization for TEE Core
295#
296# When this flag is enabled, the early init code will introduce a random
297# offset when mapping TEE Core. ASLR makes the exploitation of memory
298# corruption vulnerabilities more difficult.
299CFG_CORE_ASLR ?= y
300
301# Load user TAs from the REE filesystem via tee-supplicant
302CFG_REE_FS_TA ?= y
303
304# Pre-authentication of TA binaries loaded from the REE filesystem
305#
306# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
307#   "Secure DDR" pool, check the signature, then process the file only if it is
308#   valid.
309# - If disabled: hash the binaries as they are being processed and verify the
310#   signature as a last step.
311CFG_REE_FS_TA_BUFFERED ?= n
312$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
313
314# When CFG_REE_FS=y and CFG_RPMB_FS=y:
315# Allow secure storage in the REE FS to be entirely deleted without causing
316# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
317# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
318# can be used to reset the secure storage to a clean, empty state.
319# Typically used for testing only since it weakens storage security.
320CFG_REE_FS_ALLOW_RESET ?= n
321
322# Support for loading user TAs from a special section in the TEE binary.
323# Such TAs are available even before tee-supplicant is available (hence their
324# name), but note that many services exported to TAs may need tee-supplicant,
325# so early use is limited to a subset of the TEE Internal Core API (crypto...)
326# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
327# file(s). For example:
328#   $ make ... \
329#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
330#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
331# Typical build steps:
332#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
333#                                    # headers, makefiles), ready to build TAs.
334#                                    # CFG_EARLY_TA=y is optional, it prevents
335#                                    # later library recompilations.
336#   <build some TAs>
337#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
338#
339# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
340# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
341# <name-of-ta>/<uuid>
342# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
343ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
344$(call force,CFG_EARLY_TA,y)
345else
346CFG_EARLY_TA ?= n
347endif
348
349ifeq ($(CFG_EARLY_TA),y)
350$(call force,CFG_EMBEDDED_TS,y)
351endif
352
353ifneq ($(SP_PATHS),)
354$(call force,CFG_EMBEDDED_TS,y)
355else
356CFG_SECURE_PARTITION ?= n
357endif
358
359ifeq ($(CFG_SECURE_PARTITION),y)
360$(call force,CFG_EMBEDDED_TS,y)
361endif
362
363ifeq ($(CFG_EMBEDDED_TS),y)
364$(call force,CFG_ZLIB,y)
365endif
366
367# By default the early TAs are compressed in the TEE binary, it is possible to
368# not compress them with CFG_EARLY_TA_COMPRESS=n
369CFG_EARLY_TA_COMPRESS ?= y
370
371# Enable paging, requires SRAM, can't be enabled by default
372CFG_WITH_PAGER ?= n
373
374# Use the pager for user TAs
375CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
376
377# If paging of user TAs, that is, R/W paging default to enable paging of
378# TAG and IV in order to reduce heap usage.
379CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
380
381# Runtime lock dependency checker: ensures that a proper locking hierarchy is
382# used in the TEE core when acquiring and releasing mutexes. Any violation will
383# cause a panic as soon as the invalid locking condition is detected. If
384# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
385# records the call stacks when locks are taken, and prints them when a
386# potential deadlock is found.
387# Expect a significant performance impact when enabling this.
388CFG_LOCKDEP ?= n
389CFG_LOCKDEP_RECORD_STACK ?= y
390
391# BestFit algorithm in bget reduces the fragmentation of the heap when running
392# with the pager enabled or lockdep
393CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
394
395# Enable support for detected undefined behavior in C
396# Uses a lot of memory, can't be enabled by default
397CFG_CORE_SANITIZE_UNDEFINED ?= n
398
399# Enable Kernel Address sanitizer, has a huge performance impact, uses a
400# lot of memory and need platform specific adaptations, can't be enabled by
401# default
402CFG_CORE_SANITIZE_KADDRESS ?= n
403
404# Add stack guards before/after stacks and periodically check them
405CFG_WITH_STACK_CANARIES ?= y
406
407# Use compiler instrumentation to troubleshoot stack overflows.
408# When enabled, most C functions check the stack pointer against the current
409# stack limits on entry and panic immediately if it is out of range.
410CFG_CORE_DEBUG_CHECK_STACKS ?= n
411
412# Use when the default stack allocations are not sufficient.
413CFG_STACK_THREAD_EXTRA ?= 0
414CFG_STACK_TMP_EXTRA ?= 0
415
416# Device Tree support
417#
418# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
419# device tree blob (DTB) parsing from the core.
420#
421# When CFG_DT is enabled, the TEE _start function expects to find
422# the address of a DTB in register X2/R2 provided by the early boot stage
423# or value 0 if boot stage provides no DTB.
424#
425# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to
426# be in the secure memory.
427#
428# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
429# relative path of a DTS file located in core/arch/$(ARCH)/dts.
430# The DTS file is compiled into a DTB file which content is embedded in a
431# read-only section of the core.
432ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
433CFG_EMBED_DTB ?= y
434endif
435ifeq ($(CFG_EMBED_DTB),y)
436$(call force,CFG_DT,y)
437endif
438CFG_EMBED_DTB ?= n
439CFG_DT ?= n
440CFG_MAP_EXT_DT_SECURE ?= n
441ifeq ($(CFG_MAP_EXT_DT_SECURE),y)
442$(call force,CFG_DT,y)
443endif
444
445# Maximum size of the Device Tree Blob, has to be large enough to allow
446# editing of the supplied DTB.
447CFG_DTB_MAX_SIZE ?= 0x10000
448
449# Maximum size of the init info data passed to Secure Partitions.
450CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000
451
452# Device Tree Overlay support.
453# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
454# external DTB. The overlay is created when no valid DTB overlay is found.
455# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
456# DTB location.
457# External DTB location (physical address) is provided either by boot
458# argument arg2 or from CFG_DT_ADDR if defined.
459# A subsequent boot stage can then merge the generated overlay DTB into a main
460# DTB using the standard fdt_overlay_apply() method.
461CFG_EXTERNAL_DTB_OVERLAY ?= n
462CFG_GENERATE_DTB_OVERLAY ?= n
463
464ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
465$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
466endif
467_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
468			  CFG_GENERATE_DTB_OVERLAY)
469
470# All embedded tests are supposed to be disabled by default, this flag
471# is used to control the default value of all other embedded tests
472CFG_ENABLE_EMBEDDED_TESTS ?= n
473
474# Enable core self tests and related pseudo TAs
475CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
476
477# Compiles bget_main_test() to be called from a test TA
478CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
479
480# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedb DT driver probing tests.
481# This also requires embeddeding a DTB with expected content.
482# Defautl disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers.
483# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n.
484CFG_DT_DRIVER_EMBEDDED_TEST ?= n
485ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
486CFG_DRIVERS_CLK ?= y
487CFG_DRIVERS_RSTCTRL ?= y
488CFG_DRIVERS_CLK_EARLY_PROBE ?= n
489$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST)
490endif
491
492# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode
493# parsing in the embedded DTB for driver probing. The alternative is
494# an exploration based on compatible drivers found. It is default disabled.
495CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n
496
497# This option enables OP-TEE to respond to SMP boot request: the Rich OS
498# issues this to request OP-TEE to release secondaries cores out of reset,
499# with specific core number and non-secure entry address.
500CFG_BOOT_SECONDARY_REQUEST ?= n
501
502# Default heap size for Core, 64 kB
503CFG_CORE_HEAP_SIZE ?= 65536
504
505# Default size of nexus heap. 16 kB. Used only if CFG_VIRTUALIZATION
506# is enabled
507CFG_CORE_NEX_HEAP_SIZE ?= 16384
508
509# TA profiling.
510# When this option is enabled, OP-TEE can execute Trusted Applications
511# instrumented with GCC's -pg flag and will output profiling information
512# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
513# tee-supplicant)
514# Note: this does not work well with shared libraries at the moment for a
515# couple of reasons:
516# 1. The profiling code assumes a unique executable section in the TA VA space.
517# 2. The code used to detect at run time if the TA is intrumented assumes that
518# the TA is linked statically.
519CFG_TA_GPROF_SUPPORT ?= n
520
521# TA function tracing.
522# When this option is enabled, OP-TEE can execute Trusted Applications
523# instrumented with GCC's -pg flag and will output function tracing
524# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is
525# defined in tee-supplicant)
526CFG_FTRACE_SUPPORT ?= n
527
528# How to make room when the function tracing buffer is full?
529# 'shift': shift the previously stored data by the amount needed in order
530#    to always keep the latest logs (slower, especially with big buffer sizes)
531# 'wrap': discard the previous data and start at the beginning of the buffer
532#    again (fast, but can result in a mostly empty buffer)
533# 'stop': stop logging new data
534CFG_FTRACE_BUF_WHEN_FULL ?= shift
535$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap)
536$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y)
537
538# Function tracing: unit to be used when displaying durations
539#  0: always display durations in microseconds
540# >0: if duration is greater or equal to the specified value (in microseconds),
541#     display it in milliseconds
542CFG_FTRACE_US_MS ?= 10000
543
544# Core syscall function tracing.
545# When this option is enabled, OP-TEE core is instrumented with GCC's
546# -pg flag and will output syscall function graph in user TA ftrace
547# buffer
548CFG_SYSCALL_FTRACE ?= n
549$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
550
551# Enable to compile user TA libraries with profiling (-pg).
552# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
553CFG_ULIBS_MCOUNT ?= n
554# Profiling/tracing of syscall wrapper (utee_*)
555CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
556
557ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
558ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
559$(error Cannot instrument user libraries if user mode profiling is disabled)
560endif
561endif
562
563# Build libutee, libutils, libmbedtls as shared libraries.
564# - Static libraries are still generated when this is enabled, but TAs will use
565# the shared libraries unless explicitly linked with the -static flag.
566# - Shared libraries are made of two files: for example, libutee is
567#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
568#   is a totally standard shared object, and should be used to link against.
569#   The '.ta' file is a signed version of the '.so' and should be installed
570#   in the same way as TAs so that they can be found at runtime.
571CFG_ULIBS_SHARED ?= n
572
573ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
574$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
575endif
576
577# CFG_GP_SOCKETS
578# Enable Global Platform Sockets support
579CFG_GP_SOCKETS ?= y
580
581# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
582# invocation parameters referring to specific secure memories).
583CFG_SECURE_DATA_PATH ?= n
584
585# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
586# TA binaries are stored encrypted in the REE FS and are protected by
587# metadata in secure storage.
588CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
589$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
590
591# Enable the pseudo TA that managages TA storage in secure storage
592CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
593$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
594
595# Enable the pseudo TA for misc. auxilary services, extending existing
596# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
597# pool etc...)
598CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
599$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
600
601# Enable the pseudo TA for enumeration of TEE based devices for the normal
602# world OS.
603CFG_DEVICE_ENUM_PTA ?= y
604
605# The attestation pseudo TA provides an interface to request measurements of
606# a TA or the TEE binary.
607CFG_ATTESTATION_PTA ?= n
608$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE))
609
610# RSA key size (in bits) for the attestation PTA. Must be at least 528 given
611# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but
612# note that such a low value is not secure.
613# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and
614# https://tools.ietf.org/html/rfc8017#section-9.1.1
615#  emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66
616#  emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes
617CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072
618
619# Define the number of cores per cluster used in calculating core position.
620# The cluster number is shifted by this value and added to the core ID,
621# so its value represents log2(cores/cluster).
622# Default is 2**(2) = 4 cores per cluster.
623CFG_CORE_CLUSTER_SHIFT ?= 2
624
625# Define the number of threads per core used in calculating processing
626# element's position. The core number is shifted by this value and added to
627# the thread ID, so its value represents log2(threads/core).
628# Default is 2**(0) = 1 threads per core.
629CFG_CORE_THREAD_SHIFT ?= 0
630
631# Enable support for dynamic shared memory (shared memory anywhere in
632# non-secure memory).
633CFG_CORE_DYN_SHM ?= y
634
635# Enable support for reserved shared memory (shared memory in a carved out
636# memory area).
637CFG_CORE_RESERVED_SHM ?= y
638
639# Enables support for larger physical addresses, that is, it will define
640# paddr_t as a 64-bit type.
641CFG_CORE_LARGE_PHYS_ADDR ?= n
642
643# Define the maximum size, in bits, for big numbers in the Internal Core API
644# Arithmetical functions. This does *not* influence the key size that may be
645# manipulated through the Cryptographic API.
646# Set this to a lower value to reduce the TA memory footprint.
647CFG_TA_BIGNUM_MAX_BITS ?= 2048
648
649# Define the maximum size, in bits, for big numbers in the TEE core (privileged
650# layer).
651# This value is an upper limit for the key size in any cryptographic algorithm
652# implemented by the TEE core.
653# Set this to a lower value to reduce the memory footprint.
654CFG_CORE_BIGNUM_MAX_BITS ?= 4096
655
656# Not used since libmpa was removed. Force the values to catch build scripts
657# that would set = n.
658$(call force,CFG_TA_MBEDTLS_MPI,y)
659$(call force,CFG_TA_MBEDTLS,y)
660
661# Compile the TA library mbedTLS with self test functions, the functions
662# need to be called to test anything
663CFG_TA_MBEDTLS_SELF_TEST ?= y
664
665# By default use tomcrypt as the main crypto lib providing an implementation
666# for the API in <crypto/crypto.h>
667# CFG_CRYPTOLIB_NAME is used as libname and
668# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
669#
670# It's also possible to configure to use mbedtls instead of tomcrypt.
671# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
672# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
673CFG_CRYPTOLIB_NAME ?= tomcrypt
674CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
675
676# Not used since libmpa was removed. Force the value to catch build scripts
677# that would set = n.
678$(call force,CFG_CORE_MBEDTLS_MPI,y)
679
680# Enable virtualization support. OP-TEE will not work without compatible
681# hypervisor if this option is enabled.
682CFG_VIRTUALIZATION ?= n
683
684ifeq ($(CFG_VIRTUALIZATION),y)
685$(call force,CFG_CORE_RODATA_NOEXEC,y)
686$(call force,CFG_CORE_RWDATA_NOEXEC,y)
687
688# Default number of virtual guests
689CFG_VIRT_GUEST_COUNT ?= 2
690endif
691
692# Enables backwards compatible derivation of RPMB and SSK keys
693CFG_CORE_HUK_SUBKEY_COMPAT ?= y
694
695# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
696# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
697CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
698
699# Compress and encode conf.mk into the TEE core, and show the encoded string on
700# boot (with severity TRACE_INFO).
701CFG_SHOW_CONF_ON_BOOT ?= n
702
703# Enables support for passing a TPM Event Log stored in secure memory
704# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement
705# taken before the service was up and running.
706CFG_CORE_TPM_EVENT_LOG ?= n
707
708# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
709# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
710#
711# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
712# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
713# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers
714# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
715# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory
716# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory
717# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory
718# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer
719CFG_SCMI_MSG_DRIVERS ?= n
720ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
721CFG_SCMI_MSG_CLOCK ?= n
722CFG_SCMI_MSG_RESET_DOMAIN ?= n
723CFG_SCMI_MSG_SHM_MSG ?= n
724CFG_SCMI_MSG_SMT ?= n
725CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n
726CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n
727CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n
728CFG_SCMI_MSG_THREAD_ENTRY ?= n
729CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
730$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT))
731$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT))
732$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG))
733endif
734
735# Enable SCMI PTA interface for REE SCMI agents
736CFG_SCMI_PTA ?= n
737
738ifneq ($(CFG_STMM_PATH),)
739$(call force,CFG_WITH_STMM_SP,y)
740else
741CFG_WITH_STMM_SP ?= n
742endif
743ifeq ($(CFG_WITH_STMM_SP),y)
744$(call force,CFG_ZLIB,y)
745endif
746
747# When enabled checks that buffers passed to the GP Internal Core API
748# comply with the rules added as annotations as part of the definition of
749# the API. For example preventing buffers in non-secure shared memory when
750# not allowed.
751CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
752
753# When enabled accepts the DES key sizes excluding parity bits as in
754# the GP Internal API Specification v1.0
755CFG_COMPAT_GP10_DES ?= y
756
757# Defines a limit for many levels TAs may call each others.
758CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
759
760# Pseudo-TA to export hardware RNG output to Normal World
761# RNG characteristics are platform specific
762CFG_HWRNG_PTA ?= n
763ifeq ($(CFG_HWRNG_PTA),y)
764# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
765CFG_HWRNG_RATE ?= 0
766# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
767ifeq (,$(CFG_HWRNG_QUALITY))
768$(error CFG_HWRNG_QUALITY not defined)
769endif
770endif
771
772# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
773# shared memory for each secure thread. When disabled, RPC shared
774# memory is released once the secure thread has completed is execution.
775ifeq ($(CFG_WITH_PAGER),y)
776CFG_PREALLOC_RPC_CACHE ?= n
777endif
778CFG_PREALLOC_RPC_CACHE ?= y
779
780# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
781# This clock framework allows to describe clock tree and provides functions to
782# get and configure the clocks.
783# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
784# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
785# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level.
786CFG_DRIVERS_CLK ?= n
787CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
788CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
789CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT)
790
791$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
792$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
793
794# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
795# OP-TEE core to provide reset controls on subsystems of the devices.
796CFG_DRIVERS_RSTCTRL ?= n
797
798# The purpose of this flag is to show a print when booting up the device that
799# indicates whether the board runs a standard developer configuration or not.
800# A developer configuration doesn't necessarily has to be secure. The intention
801# is that the one making products based on OP-TEE should override this flag in
802# plat-xxx/conf.mk for the platform they're basing their products on after
803# they've finalized implementing stubbed functionality (see OP-TEE
804# documentation/Porting guidelines) as well as vendor specific security
805# configuration.
806CFG_WARN_INSECURE ?= y
807
808# Enables warnings for declarations mixed with statements
809CFG_WARN_DECL_AFTER_STATEMENT ?= y
810
811# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
812# mechanism to limit the set of locations to which computed branch instructions
813# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
814# that support it, enable this option. A GCC toolchain built with
815# --enable-standard-branch-protection is needed to use this option.
816CFG_CORE_BTI ?= n
817
818$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
819
820# To make use of BTI in user space libraries and TA's on CPU's that support it,
821# enable this option.
822CFG_TA_BTI ?= $(CFG_CORE_BTI)
823
824$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
825
826ifeq (y-y,$(CFG_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
827$(error CFG_VIRTUALIZATION and BTI are currently incompatible)
828endif
829
830ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
831$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
832endif
833
834# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock
835# and key access to memory. This is a hardware supported alternative to
836# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0.
837CFG_MEMTAG ?= n
838
839$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core))
840ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG))
841$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible)
842endif
843ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG))
844$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible)
845endif
846
847# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable enables support
848# for sending asynchronous notifications to normal world. Note that an
849# interrupt ID must be configurged by the platform too. Currently is only
850# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
851CFG_CORE_ASYNC_NOTIF ?= n
852
853$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
854	 CFG_WITH_STATS))
855
856# Pointer Authentication (part of ARMv8.3 Extensions) provides
857# instructions for signing and authenticating pointers against secret keys.
858# These can be used to mitigate ROP (Return oriented programming) attacks.
859# This option enables these instructions for TA's at EL0. When this option is
860# enabled , TEE core will initialize secret keys per TA.
861CFG_TA_PAUTH ?= n
862
863$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core))
864
865ifeq (y-y,$(CFG_VIRTUALIZATION)-$(CFG_TA_PAUTH))
866$(error CFG_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible)
867endif
868
869ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH))
870$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible)
871endif
872
873ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH))
874$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible)
875endif
876
877# Enable support for generic watchdog registration
878# This watchdog will then be usable by non-secure world through SMC calls.
879CFG_WDT ?= n
880
881# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver
882# When enabled, CFG_WDT_SM_HANDLER_ID must be defined with a SMC ID
883CFG_WDT_SM_HANDLER ?= n
884
885$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT))
886ifeq (y-,$(CFG_WDT_SM_HANDLER)-$(CFG_WDT_SM_HANDLER_ID))
887$(error CFG_WDT_SM_HANDLER_ID must be defined when enabling CFG_WDT_SM_HANDLER)
888endif
889
890# Allow using the udelay/mdelay function for platforms without ARM generic timer
891# extension. When set to 'n', the plat_get_freq() function must be defined by
892# the platform code
893CFG_CORE_HAS_GENERIC_TIMER ?= y
894
895# Enable RTC API
896CFG_DRIVERS_RTC ?= n
897
898# Enable PTA for RTC access from non-secure world
899CFG_RTC_PTA ?= n
900
901# Enable TPM2
902CFG_DRIVERS_TPM2 ?= n
903CFG_DRIVERS_TPM2_MMIO ?= n
904ifeq ($(CFG_CORE_TPM_EVENT_LOG),y)
905CFG_CORE_TCG_PROVIDER ?= $(CFG_DRIVERS_TPM2)
906endif
907