xref: /optee_os/mk/config.mk (revision b59abd23f392aa7484e4661c39739a8f1ee70d93)
1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20CROSS_COMPILE ?= arm-linux-gnueabihf-
21CROSS_COMPILE32 ?= $(CROSS_COMPILE)
22CROSS_COMPILE64 ?= aarch64-linux-gnu-
23COMPILER ?= gcc
24
25# For convenience
26ifdef CFLAGS
27CFLAGS32 ?= $(CFLAGS)
28CFLAGS64 ?= $(CFLAGS)
29endif
30
31# Compiler warning level.
32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
33WARNS ?= 3
34
35# Path to the Python interpreter used by the build system.
36# This variable is set to the default python3 interpreter in the user's
37# path. But build environments that require more explicit control can
38# set the path to a specific interpreter through this variable.
39PYTHON3 ?= python3
40
41# Define DEBUG=1 to compile without optimization (forces -O0)
42# DEBUG=1
43ifeq ($(DEBUG),1)
44# For backwards compatibility
45$(call force,CFG_CC_OPT_LEVEL,0)
46$(call force,CFG_DEBUG_INFO,y)
47endif
48
49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
50# Optimize for size by default, usually gives good performance too.
51CFG_CC_OPT_LEVEL ?= s
52
53# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
54CFG_DEBUG_INFO ?= y
55
56# If y, enable debug features of the TEE core (assertions and lock checks
57# are enabled, panic and assert messages are more verbose, data and prefetch
58# aborts show a stack dump). When disabled, the NDEBUG directive is defined
59# so assertions are disabled.
60CFG_TEE_CORE_DEBUG ?= y
61
62# Log levels for the TEE core. Defines which core messages are displayed
63# on the secure console. Disabling core log (level set to 0) also disables
64# logs from the TAs.
65# 0: none
66# 1: error
67# 2: error + info
68# 3: error + info + debug
69# 4: error + info + debug + flow
70CFG_TEE_CORE_LOG_LEVEL ?= 2
71
72# TA log level
73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
75# when the TA is built.
76CFG_TEE_TA_LOG_LEVEL ?= 1
77
78# TA enablement
79# When defined to "y", TA traces are output according to
80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
81CFG_TEE_CORE_TA_TRACE ?= y
82
83# If y, enable the memory leak detection feature in the bget memory allocator.
84# When this feature is enabled, calling mdbg_check(1) will print a list of all
85# the currently allocated buffers and the location of the allocation (file and
86# line number).
87# Note: make sure the log level is high enough for the messages to show up on
88# the secure console! For instance:
89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
90#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
91# - To debug TEE core allocations: build OP-TEE with:
92#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
93CFG_TEE_CORE_MALLOC_DEBUG ?= n
94CFG_TEE_TA_MALLOC_DEBUG ?= n
95# Prints an error message and dumps the stack on failed memory allocations
96# using malloc() and friends.
97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
98
99# Mask to select which messages are prefixed with long debugging information
100# (severity, core ID, thread ID, component name, function name, line number)
101# based on the message level. If BIT(level) is set, the long prefix is shown.
102# Otherwise a short prefix is used (severity and component name only).
103# Levels: 0=none 1=error 2=info 3=debug 4=flow
104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
105
106# Number of threads
107CFG_NUM_THREADS ?= 2
108
109# API implementation version
110CFG_TEE_API_VERSION ?= GPD-1.1-dev
111
112# Implementation description (implementation-dependent)
113CFG_TEE_IMPL_DESCR ?= OPTEE
114
115# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
116# World?
117CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
118
119# The following values are not extracted from the "git describe" output because
120# we might be outside of a Git environment, or the tree may have been cloned
121# with limited depth not including any tag, so there is really no guarantee
122# that TEE_IMPL_VERSION contains the major and minor revision numbers.
123CFG_OPTEE_REVISION_MAJOR ?= 3
124CFG_OPTEE_REVISION_MINOR ?= 21
125CFG_OPTEE_REVISION_EXTRA ?=
126
127# Trusted OS implementation version
128TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
129		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA)
130ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y)
131TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0)
132else
133TEE_IMPL_GIT_SHA1 := 0x0
134endif
135
136# Trusted OS implementation manufacturer name
137CFG_TEE_MANUFACTURER ?= LINARO
138
139# Trusted firmware version
140CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
141
142# Trusted OS implementation manufacturer name
143CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
144
145# Rich Execution Environment (REE) file system support: normal world OS
146# provides the actual storage.
147# This is the default FS when enabled (i.e., the one used when
148# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
149CFG_REE_FS ?= y
150
151# RPMB file system support
152CFG_RPMB_FS ?= n
153
154# Enable roll-back protection of REE file system using RPMB.
155# Roll-back protection only works if CFG_RPMB_FS = y.
156CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS)
157$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS))
158
159# Device identifier used when CFG_RPMB_FS = y.
160# The exact meaning of this value is platform-dependent. On Linux, the
161# tee-supplicant process will open /dev/mmcblk<id>rpmb
162CFG_RPMB_FS_DEV_ID ?= 0
163
164# This config variable determines the number of entries read in from RPMB at
165# once whenever a function traverses the RPMB FS. Increasing the default value
166# has the following consequences:
167# - More memory required on heap. A single FAT entry currently has a size of
168#   256 bytes.
169# - Potentially significant speed-ups for RPMB I/O. Depending on how many
170#   entries a function needs to traverse, the number of time-consuming RPMB
171#   read-in operations can be reduced.
172# Chosing a proper value is both platform- (available memory) and use-case-
173# dependent (potential number of FAT fs entries), so overwrite in platform
174# config files
175CFG_RPMB_FS_RD_ENTRIES ?= 8
176
177# Enables caching of FAT FS entries when set to a value greater than zero.
178# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
179# entries. The cache is populated when FAT FS entries are initially read in.
180# When traversing the FAT FS entries, we read from the cache instead of reading
181# in the entries from RPMB storage. Consequently, when a FAT FS entry is
182# written, the cache is updated. In scenarios where an estimate of the number
183# of FAT FS entries can be made, the cache may be specifically tailored to
184# store all entries. The caching can improve RPMB I/O at the cost
185# of additional memory.
186# Without caching, we temporarily require
187# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
188# while traversing the FAT FS (e.g. in read_fat).
189# For example 8*256 bytes = 2kB while in read_fat.
190# With caching, we constantly require up to
191# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
192# depending on how many elements are in the cache, and additional temporary
193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
194# in case the cache is too small to hold all elements when traversing.
195CFG_RPMB_FS_CACHE_ENTRIES ?= 0
196
197# Print RPMB data frames sent to and received from the RPMB device
198CFG_RPMB_FS_DEBUG_DATA ?= n
199
200# Clear RPMB content at cold boot
201CFG_RPMB_RESET_FAT ?= n
202
203# Use a hard coded RPMB key instead of deriving it from the platform HUK
204CFG_RPMB_TESTKEY ?= n
205
206# Enables RPMB key programming by the TEE, in case the RPMB partition has not
207# been configured yet.
208# !!! Security warning !!!
209# Do *NOT* enable this in product builds, as doing so would allow the TEE to
210# leak the RPMB key.
211# This option is useful in the following situations:
212# - Testing
213# - RPMB key provisioning in a controlled environment (factory setup)
214CFG_RPMB_WRITE_KEY ?= n
215
216_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
217
218# Signing key for OP-TEE TA's
219# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
220# key and then set TA_PUBLIC_KEY to match public key from the HSM.
221# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
222TA_SIGN_KEY ?= keys/default_ta.pem
223TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
224
225# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used
226# to verify a TA instead. To sign a TA using a previously prepared subkey
227# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS.  It is
228# typically used by assigning the following in the TA Makefile:
229# BINARY = <TA-uuid-string>
230# TA_SIGN_KEY = subkey.pem
231# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta
232# TA_SUBKEY_DEPS = subkey.bin
233# See the documentation for more details on subkeys.
234
235# Include lib/libutils/isoc in the build? Most platforms need this, but some
236# may not because they obtain the isoc functions from elsewhere
237CFG_LIBUTILS_WITH_ISOC ?= y
238
239# Enables floating point support for user TAs
240# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
241#	 hard-float is basically a super set of soft-float. Hard-float
242#	 requires all the support routines provided for soft-float, but the
243#	 compiler may choose to optimize to not use some of them and use
244#	 the floating-point registers instead.
245# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
246#	 nothing with ` -mgeneral-regs-only`)
247# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
248CFG_TA_FLOAT_SUPPORT ?= y
249
250# Stack unwinding: print a stack dump to the console on core or TA abort, or
251# when a TA panics.
252# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
253# unwound (not paged TAs, however).
254# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
255# this option will increase the size of the 32-bit TEE binary by a few KB.
256# Similarly, TAs have to be compiled with -funwind-tables (default when the
257# option is set) otherwise they can't be unwound.
258# Warning: since the unwind sequence for user-mode (TA) code is implemented in
259# the privileged layer of OP-TEE, enabling this feature will weaken the
260# user/kernel isolation. Therefore it should be disabled in release builds.
261ifeq ($(CFG_TEE_CORE_DEBUG),y)
262CFG_UNWIND ?= y
263endif
264
265# Enable support for dynamically loaded user TAs
266CFG_WITH_USER_TA ?= y
267
268# Build user TAs included in this source tree
269CFG_BUILD_IN_TREE_TA ?= y
270
271# Choosing the architecture(s) of user-mode libraries (used by TAs)
272#
273# Platforms may define a list of supported architectures for user-mode code
274# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
275# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
276# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
277# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
278# The first entry in $(supported-ta-targets) has a special role, see
279# CFG_USER_TA_TARGET_<ta-name> below.
280#
281# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
282# change the order of the values.
283#
284# The list of TA architectures is ultimately stored in $(ta-targets).
285
286# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
287# defined, selects the unique TA architecture mode for building the in-tree TA
288# <ta-name>. Can be either ta_arm32 or ta_arm64.
289# By default, in-tree TAs are built using the first architecture specified in
290# $(ta-targets).
291
292# Address Space Layout Randomization for user-mode Trusted Applications
293#
294# When this flag is enabled, the ELF loader will introduce a random offset
295# when mapping the application in user space. ASLR makes the exploitation of
296# memory corruption vulnerabilities more difficult.
297CFG_TA_ASLR ?= y
298
299# How much ASLR may shift the base address (in pages). The base address is
300# randomly shifted by an integer number of pages comprised between these two
301# values. Bigger ranges are more secure because they make the addresses harder
302# to guess at the expense of using more memory for the page tables.
303CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
304CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
305
306# Address Space Layout Randomization for TEE Core
307#
308# When this flag is enabled, the early init code will introduce a random
309# offset when mapping TEE Core. ASLR makes the exploitation of memory
310# corruption vulnerabilities more difficult.
311CFG_CORE_ASLR ?= y
312
313# Stack Protection for TEE Core
314# This flag enables the compiler stack protection mechanisms -fstack-protector.
315# It will check the stack canary value before returning from a function to
316# prevent buffer overflow attacks. Stack protector canary logic will be added
317# for vulnerable functions that contain:
318# - A character array larger than 8 bytes.
319# - An 8-bit integer array larger than 8 bytes.
320# - A call to alloca() with either a variable size or a constant size bigger
321#   than 8 bytes.
322CFG_CORE_STACK_PROTECTOR ?= n
323# This enable stack protector flag -fstack-protector-strong. Stack protector
324# canary logic will be added for vulnerable functions that contain:
325# - An array of any size and type.
326# - A call to alloca().
327# - A local variable that has its address taken.
328CFG_CORE_STACK_PROTECTOR_STRONG ?= y
329# This enable stack protector flag -fstack-protector-all. Stack protector canary
330# logic will be added to all functions regardless of their vulnerability.
331CFG_CORE_STACK_PROTECTOR_ALL ?= n
332# Stack Protection for TA
333CFG_TA_STACK_PROTECTOR ?= n
334CFG_TA_STACK_PROTECTOR_STRONG ?= y
335CFG_TA_STACK_PROTECTOR_ALL ?= n
336
337_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \
338						     CFG_CORE_STACK_PROTECTOR_STRONG \
339						     CFG_CORE_STACK_PROTECTOR_ALL)
340_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \
341						   CFG_TA_STACK_PROTECTOR_STRONG \
342						   CFG_TA_STACK_PROTECTOR_ALL)
343
344# Load user TAs from the REE filesystem via tee-supplicant
345CFG_REE_FS_TA ?= y
346
347# Pre-authentication of TA binaries loaded from the REE filesystem
348#
349# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
350#   "Secure DDR" pool, check the signature, then process the file only if it is
351#   valid.
352# - If disabled: hash the binaries as they are being processed and verify the
353#   signature as a last step.
354CFG_REE_FS_TA_BUFFERED ?= n
355$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
356
357# When CFG_REE_FS=y and CFG_RPMB_FS=y:
358# Allow secure storage in the REE FS to be entirely deleted without causing
359# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
360# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
361# can be used to reset the secure storage to a clean, empty state.
362# Typically used for testing only since it weakens storage security.
363CFG_REE_FS_ALLOW_RESET ?= n
364
365# Support for loading user TAs from a special section in the TEE binary.
366# Such TAs are available even before tee-supplicant is available (hence their
367# name), but note that many services exported to TAs may need tee-supplicant,
368# so early use is limited to a subset of the TEE Internal Core API (crypto...)
369# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
370# file(s). For example:
371#   $ make ... \
372#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
373#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
374# Typical build steps:
375#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
376#                                    # headers, makefiles), ready to build TAs.
377#                                    # CFG_EARLY_TA=y is optional, it prevents
378#                                    # later library recompilations.
379#   <build some TAs>
380#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
381#
382# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
383# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
384# <name-of-ta>/<uuid>
385# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
386ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
387$(call force,CFG_EARLY_TA,y)
388else
389CFG_EARLY_TA ?= n
390endif
391
392ifeq ($(CFG_EARLY_TA),y)
393$(call force,CFG_EMBEDDED_TS,y)
394endif
395
396ifneq ($(SP_PATHS),)
397$(call force,CFG_EMBEDDED_TS,y)
398else
399CFG_SECURE_PARTITION ?= n
400endif
401
402ifeq ($(CFG_SECURE_PARTITION),y)
403$(call force,CFG_EMBEDDED_TS,y)
404endif
405
406ifeq ($(CFG_EMBEDDED_TS),y)
407$(call force,CFG_ZLIB,y)
408endif
409
410# By default the early TAs are compressed in the TEE binary, it is possible to
411# not compress them with CFG_EARLY_TA_COMPRESS=n
412CFG_EARLY_TA_COMPRESS ?= y
413
414# Enable paging, requires SRAM, can't be enabled by default
415CFG_WITH_PAGER ?= n
416
417# Use the pager for user TAs
418CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
419
420# If paging of user TAs, that is, R/W paging default to enable paging of
421# TAG and IV in order to reduce heap usage.
422CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
423
424# Runtime lock dependency checker: ensures that a proper locking hierarchy is
425# used in the TEE core when acquiring and releasing mutexes. Any violation will
426# cause a panic as soon as the invalid locking condition is detected. If
427# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
428# records the call stacks when locks are taken, and prints them when a
429# potential deadlock is found.
430# Expect a significant performance impact when enabling this.
431CFG_LOCKDEP ?= n
432CFG_LOCKDEP_RECORD_STACK ?= y
433
434# BestFit algorithm in bget reduces the fragmentation of the heap when running
435# with the pager enabled or lockdep
436CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
437
438# Enable support for detected undefined behavior in C
439# Uses a lot of memory, can't be enabled by default
440CFG_CORE_SANITIZE_UNDEFINED ?= n
441
442# Enable Kernel Address sanitizer, has a huge performance impact, uses a
443# lot of memory and need platform specific adaptations, can't be enabled by
444# default
445CFG_CORE_SANITIZE_KADDRESS ?= n
446
447# Add stack guards before/after stacks and periodically check them
448CFG_WITH_STACK_CANARIES ?= y
449
450# Use compiler instrumentation to troubleshoot stack overflows.
451# When enabled, most C functions check the stack pointer against the current
452# stack limits on entry and panic immediately if it is out of range.
453CFG_CORE_DEBUG_CHECK_STACKS ?= n
454
455# Use when the default stack allocations are not sufficient.
456CFG_STACK_THREAD_EXTRA ?= 0
457CFG_STACK_TMP_EXTRA ?= 0
458
459# Device Tree support
460#
461# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
462# device tree blob (DTB) parsing from the core.
463#
464# When CFG_DT is enabled, the TEE _start function expects to find
465# the address of a DTB in register X2/R2 provided by the early boot stage
466# or value 0 if boot stage provides no DTB.
467#
468# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented
469# and the external device tree is expected to be used/modified. Its value
470# defaults to CFG_DT.
471#
472# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to
473# be in the secure memory.
474#
475# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
476# relative path of a DTS file located in core/arch/$(ARCH)/dts.
477# The DTS file is compiled into a DTB file which content is embedded in a
478# read-only section of the core.
479ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
480CFG_EMBED_DTB ?= y
481endif
482ifeq ($(CFG_EMBED_DTB),y)
483$(call force,CFG_DT,y)
484endif
485CFG_EMBED_DTB ?= n
486CFG_DT ?= n
487CFG_EXTERNAL_DT ?= $(CFG_DT)
488CFG_MAP_EXT_DT_SECURE ?= n
489ifeq ($(CFG_MAP_EXT_DT_SECURE),y)
490$(call force,CFG_DT,y)
491endif
492
493# Maximum size of the Device Tree Blob, has to be large enough to allow
494# editing of the supplied DTB.
495CFG_DTB_MAX_SIZE ?= 0x10000
496
497# Maximum size of the init info data passed to Secure Partitions.
498CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000
499
500# Device Tree Overlay support.
501# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
502# external DTB. The overlay is created when no valid DTB overlay is found.
503# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
504# DTB location.
505# External DTB location (physical address) is provided either by boot
506# argument arg2 or from CFG_DT_ADDR if defined.
507# A subsequent boot stage can then merge the generated overlay DTB into a main
508# DTB using the standard fdt_overlay_apply() method.
509CFG_EXTERNAL_DTB_OVERLAY ?= n
510CFG_GENERATE_DTB_OVERLAY ?= n
511
512ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
513$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
514endif
515_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
516			  CFG_GENERATE_DTB_OVERLAY)
517
518# All embedded tests are supposed to be disabled by default, this flag
519# is used to control the default value of all other embedded tests
520CFG_ENABLE_EMBEDDED_TESTS ?= n
521
522# Enable core self tests and related pseudo TAs
523CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
524
525# Compiles bget_main_test() to be called from a test TA
526CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
527
528# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests.
529# This also requires embedding a DTB with expected content.
530# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers.
531# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n.
532CFG_DT_DRIVER_EMBEDDED_TEST ?= n
533ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
534CFG_DRIVERS_CLK ?= y
535CFG_DRIVERS_GPIO ?= y
536CFG_DRIVERS_RSTCTRL ?= y
537CFG_DRIVERS_CLK_EARLY_PROBE ?= n
538$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST)
539endif
540
541# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode
542# parsing in the embedded DTB for driver probing. The alternative is
543# an exploration based on compatible drivers found. It is default disabled.
544CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n
545
546# This option enables OP-TEE to respond to SMP boot request: the Rich OS
547# issues this to request OP-TEE to release secondaries cores out of reset,
548# with specific core number and non-secure entry address.
549CFG_BOOT_SECONDARY_REQUEST ?= n
550
551# Default heap size for Core, 64 kB
552CFG_CORE_HEAP_SIZE ?= 65536
553
554# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION
555# is enabled
556CFG_CORE_NEX_HEAP_SIZE ?= 16384
557
558# TA profiling.
559# When this option is enabled, OP-TEE can execute Trusted Applications
560# instrumented with GCC's -pg flag and will output profiling information
561# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
562# tee-supplicant)
563# Note: this does not work well with shared libraries at the moment for a
564# couple of reasons:
565# 1. The profiling code assumes a unique executable section in the TA VA space.
566# 2. The code used to detect at run time if the TA is intrumented assumes that
567# the TA is linked statically.
568CFG_TA_GPROF_SUPPORT ?= n
569
570# TA function tracing.
571# When this option is enabled, OP-TEE can execute Trusted Applications
572# instrumented with GCC's -pg flag and will output function tracing
573# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is
574# defined in tee-supplicant)
575CFG_FTRACE_SUPPORT ?= n
576
577# How to make room when the function tracing buffer is full?
578# 'shift': shift the previously stored data by the amount needed in order
579#    to always keep the latest logs (slower, especially with big buffer sizes)
580# 'wrap': discard the previous data and start at the beginning of the buffer
581#    again (fast, but can result in a mostly empty buffer)
582# 'stop': stop logging new data
583CFG_FTRACE_BUF_WHEN_FULL ?= shift
584$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap)
585$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y)
586
587# Function tracing: unit to be used when displaying durations
588#  0: always display durations in microseconds
589# >0: if duration is greater or equal to the specified value (in microseconds),
590#     display it in milliseconds
591CFG_FTRACE_US_MS ?= 10000
592
593# Core syscall function tracing.
594# When this option is enabled, OP-TEE core is instrumented with GCC's
595# -pg flag and will output syscall function graph in user TA ftrace
596# buffer
597CFG_SYSCALL_FTRACE ?= n
598$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
599
600# Enable to compile user TA libraries with profiling (-pg).
601# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
602CFG_ULIBS_MCOUNT ?= n
603# Profiling/tracing of syscall wrapper (utee_*)
604CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
605
606ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
607ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
608$(error Cannot instrument user libraries if user mode profiling is disabled)
609endif
610endif
611
612# Build libutee, libutils, libmbedtls as shared libraries.
613# - Static libraries are still generated when this is enabled, but TAs will use
614# the shared libraries unless explicitly linked with the -static flag.
615# - Shared libraries are made of two files: for example, libutee is
616#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
617#   is a totally standard shared object, and should be used to link against.
618#   The '.ta' file is a signed version of the '.so' and should be installed
619#   in the same way as TAs so that they can be found at runtime.
620CFG_ULIBS_SHARED ?= n
621
622ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
623$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
624endif
625
626# CFG_GP_SOCKETS
627# Enable Global Platform Sockets support
628CFG_GP_SOCKETS ?= y
629
630# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
631# invocation parameters referring to specific secure memories).
632CFG_SECURE_DATA_PATH ?= n
633
634# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
635# TA binaries are stored encrypted in the REE FS and are protected by
636# metadata in secure storage.
637CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
638$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
639
640# Enable the pseudo TA that managages TA storage in secure storage
641CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
642$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
643
644# Enable the pseudo TA for misc. auxilary services, extending existing
645# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
646# pool etc...)
647CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
648$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
649
650# Enable the pseudo TA for enumeration of TEE based devices for the normal
651# world OS.
652CFG_DEVICE_ENUM_PTA ?= y
653
654# The attestation pseudo TA provides an interface to request measurements of
655# a TA or the TEE binary.
656CFG_ATTESTATION_PTA ?= n
657$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE))
658
659# RSA key size (in bits) for the attestation PTA. Must be at least 528 given
660# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but
661# note that such a low value is not secure.
662# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and
663# https://tools.ietf.org/html/rfc8017#section-9.1.1
664#  emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66
665#  emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes
666CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072
667
668# Define the number of cores per cluster used in calculating core position.
669# The cluster number is shifted by this value and added to the core ID,
670# so its value represents log2(cores/cluster).
671# Default is 2**(2) = 4 cores per cluster.
672CFG_CORE_CLUSTER_SHIFT ?= 2
673
674# Define the number of threads per core used in calculating processing
675# element's position. The core number is shifted by this value and added to
676# the thread ID, so its value represents log2(threads/core).
677# Default is 2**(0) = 1 threads per core.
678CFG_CORE_THREAD_SHIFT ?= 0
679
680# Enable support for dynamic shared memory (shared memory anywhere in
681# non-secure memory).
682CFG_CORE_DYN_SHM ?= y
683
684# Enable support for reserved shared memory (shared memory in a carved out
685# memory area).
686CFG_CORE_RESERVED_SHM ?= y
687
688# Enables support for larger physical addresses, that is, it will define
689# paddr_t as a 64-bit type.
690CFG_CORE_LARGE_PHYS_ADDR ?= n
691
692# Define the maximum size, in bits, for big numbers in the Internal Core API
693# Arithmetical functions. This does *not* influence the key size that may be
694# manipulated through the Cryptographic API.
695# Set this to a lower value to reduce the TA memory footprint.
696CFG_TA_BIGNUM_MAX_BITS ?= 2048
697
698# Define the maximum size, in bits, for big numbers in the TEE core (privileged
699# layer).
700# This value is an upper limit for the key size in any cryptographic algorithm
701# implemented by the TEE core.
702# Set this to a lower value to reduce the memory footprint.
703CFG_CORE_BIGNUM_MAX_BITS ?= 4096
704
705# Not used since libmpa was removed. Force the values to catch build scripts
706# that would set = n.
707$(call force,CFG_TA_MBEDTLS_MPI,y)
708$(call force,CFG_TA_MBEDTLS,y)
709
710# Compile the TA library mbedTLS with self test functions, the functions
711# need to be called to test anything
712CFG_TA_MBEDTLS_SELF_TEST ?= y
713
714# By default use tomcrypt as the main crypto lib providing an implementation
715# for the API in <crypto/crypto.h>
716# CFG_CRYPTOLIB_NAME is used as libname and
717# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
718#
719# It's also possible to configure to use mbedtls instead of tomcrypt.
720# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
721# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
722CFG_CRYPTOLIB_NAME ?= tomcrypt
723CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
724
725# Not used since libmpa was removed. Force the value to catch build scripts
726# that would set = n.
727$(call force,CFG_CORE_MBEDTLS_MPI,y)
728
729# Enable virtualization support. OP-TEE will not work without compatible
730# hypervisor if this option is enabled.
731CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION)
732CFG_NS_VIRTUALIZATION ?= n
733
734ifeq ($(CFG_NS_VIRTUALIZATION),y)
735$(call force,CFG_CORE_RODATA_NOEXEC,y)
736$(call force,CFG_CORE_RWDATA_NOEXEC,y)
737
738# Default number of virtual guests
739CFG_VIRT_GUEST_COUNT ?= 2
740endif
741
742# Enables backwards compatible derivation of RPMB and SSK keys
743CFG_CORE_HUK_SUBKEY_COMPAT ?= y
744
745# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
746# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
747CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
748
749# Compress and encode conf.mk into the TEE core, and show the encoded string on
750# boot (with severity TRACE_INFO).
751CFG_SHOW_CONF_ON_BOOT ?= n
752
753# Enables support for passing a TPM Event Log stored in secure memory
754# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement
755# taken before the service was up and running.
756CFG_CORE_TPM_EVENT_LOG ?= n
757
758# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
759# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
760#
761# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
762# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
763# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers
764# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
765# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory
766# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory
767# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory
768# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer
769CFG_SCMI_MSG_DRIVERS ?= n
770ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
771CFG_SCMI_MSG_CLOCK ?= n
772CFG_SCMI_MSG_RESET_DOMAIN ?= n
773CFG_SCMI_MSG_SHM_MSG ?= n
774CFG_SCMI_MSG_SMT ?= n
775CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n
776CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n
777CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n
778CFG_SCMI_MSG_THREAD_ENTRY ?= n
779CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
780$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT))
781$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT))
782$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG))
783ifeq ($(CFG_SCMI_MSG_SMT),y)
784_CFG_SCMI_PTA_SMT_HEADER := y
785endif
786ifeq ($(CFG_SCMI_MSG_SHM_MSG),y)
787_CFG_SCMI_PTA_MSG_HEADER := y
788endif
789endif
790
791# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation
792# from SCP-firmware package as an built-in SCMI stack in core. This
793# configuration mandates target product identifier is configured with
794# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with
795# CFG_SCP_FIRMWARE.
796CFG_SCMI_SCPFW ?= n
797
798ifeq ($(CFG_SCMI_SCPFW),y)
799$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW)
800ifeq (,$(CFG_SCMI_SCPFW_PRODUCT))
801$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration)
802endif
803ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt))
804$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration)
805endif
806endif #CFG_SCMI_SCPFW
807
808ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y)
809$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive)
810endif
811
812# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for
813# the platform SCMI server and implements the platform plat_scmi_clock_*()
814# functions.
815CFG_SCMI_MSG_USE_CLK ?= n
816$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS))
817
818# Enable SCMI PTA interface for REE SCMI agents
819CFG_SCMI_PTA ?= n
820ifeq ($(CFG_SCMI_PTA),y)
821_CFG_SCMI_PTA_SMT_HEADER ?= n
822_CFG_SCMI_PTA_MSG_HEADER ?= n
823endif
824
825ifneq ($(CFG_STMM_PATH),)
826$(call force,CFG_WITH_STMM_SP,y)
827else
828CFG_WITH_STMM_SP ?= n
829endif
830ifeq ($(CFG_WITH_STMM_SP),y)
831$(call force,CFG_ZLIB,y)
832endif
833
834# When enabled checks that buffers passed to the GP Internal Core API
835# comply with the rules added as annotations as part of the definition of
836# the API. For example preventing buffers in non-secure shared memory when
837# not allowed.
838CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
839
840# When enabled accepts the DES key sizes excluding parity bits as in
841# the GP Internal API Specification v1.0
842CFG_COMPAT_GP10_DES ?= y
843
844# Defines a limit for many levels TAs may call each others.
845CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
846
847# Pseudo-TA to export hardware RNG output to Normal World
848# RNG characteristics are platform specific
849CFG_HWRNG_PTA ?= n
850ifeq ($(CFG_HWRNG_PTA),y)
851# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
852CFG_HWRNG_RATE ?= 0
853# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
854ifeq (,$(CFG_HWRNG_QUALITY))
855$(error CFG_HWRNG_QUALITY not defined)
856endif
857endif
858
859# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
860# shared memory for each secure thread. When disabled, RPC shared
861# memory is released once the secure thread has completed is execution.
862ifeq ($(CFG_WITH_PAGER),y)
863CFG_PREALLOC_RPC_CACHE ?= n
864endif
865CFG_PREALLOC_RPC_CACHE ?= y
866
867# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
868# This clock framework allows to describe clock tree and provides functions to
869# get and configure the clocks.
870# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
871# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
872# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level.
873CFG_DRIVERS_CLK ?= n
874CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
875CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
876CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT)
877
878$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
879$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
880
881# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
882# OP-TEE core to provide reset controls on subsystems of the devices.
883CFG_DRIVERS_RSTCTRL ?= n
884
885# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in
886# OP-TEE core to provide GPIO support for drivers.
887CFG_DRIVERS_GPIO ?= n
888
889# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support.
890CFG_DRIVERS_I2C ?= n
891
892# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in
893# OP-TEE core to provide drivers a way to apply pin muxing configurations based
894# on device-tree.
895CFG_DRIVERS_PINCTRL ?= n
896
897# The purpose of this flag is to show a print when booting up the device that
898# indicates whether the board runs a standard developer configuration or not.
899# A developer configuration doesn't necessarily has to be secure. The intention
900# is that the one making products based on OP-TEE should override this flag in
901# plat-xxx/conf.mk for the platform they're basing their products on after
902# they've finalized implementing stubbed functionality (see OP-TEE
903# documentation/Porting guidelines) as well as vendor specific security
904# configuration.
905CFG_WARN_INSECURE ?= y
906
907# Enables warnings for declarations mixed with statements
908CFG_WARN_DECL_AFTER_STATEMENT ?= y
909
910# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
911# mechanism to limit the set of locations to which computed branch instructions
912# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
913# that support it, enable this option. A GCC toolchain built with
914# --enable-standard-branch-protection is needed to use this option.
915CFG_CORE_BTI ?= n
916
917$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
918
919# To make use of BTI in user space libraries and TA's on CPU's that support it,
920# enable this option.
921CFG_TA_BTI ?= $(CFG_CORE_BTI)
922
923$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
924
925ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
926$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible)
927endif
928
929ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
930$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
931endif
932
933# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock
934# and key access to memory. This is a hardware supported alternative to
935# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0.
936CFG_MEMTAG ?= n
937
938$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core))
939ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG))
940$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible)
941endif
942ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG))
943$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible)
944endif
945
946# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support
947# for sending asynchronous notifications to normal world. Note that an
948# interrupt ID must be configurged by the platform too. Currently is only
949# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
950CFG_CORE_ASYNC_NOTIF ?= n
951
952$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
953	 CFG_WITH_STATS))
954
955# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions
956# for signing and authenticating pointers against secret keys. These can
957# be used to mitigate ROP (Return oriented programming) attacks. This is
958# currently done by instructing the compiler to add paciasp/autiasp at the
959# begging and end of functions to sign and verify ELR.
960#
961# The CFG_CORE_PAUTH enables these instructions for the core parts
962# executing at EL1, with one secret key per thread and one secret key per
963# physical CPU.
964#
965# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When
966# this option is enabled, TEE core will initialize secret keys per TA.
967CFG_CORE_PAUTH ?= n
968CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH)
969
970$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core))
971$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core))
972
973ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH))
974$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible)
975endif
976ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH))
977$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible)
978endif
979
980ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH))
981$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible)
982endif
983
984ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH))
985$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible)
986endif
987
988# Enable support for generic watchdog registration
989# This watchdog will then be usable by non-secure world through SMC calls.
990CFG_WDT ?= n
991
992# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver
993# When enabled, CFG_WDT_SM_HANDLER_ID must be defined with a SMC ID
994CFG_WDT_SM_HANDLER ?= n
995
996$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT))
997ifeq (y-,$(CFG_WDT_SM_HANDLER)-$(CFG_WDT_SM_HANDLER_ID))
998$(error CFG_WDT_SM_HANDLER_ID must be defined when enabling CFG_WDT_SM_HANDLER)
999endif
1000
1001# Allow using the udelay/mdelay function for platforms without ARM generic timer
1002# extension. When set to 'n', the plat_get_freq() function must be defined by
1003# the platform code
1004CFG_CORE_HAS_GENERIC_TIMER ?= y
1005
1006# Enable RTC API
1007CFG_DRIVERS_RTC ?= n
1008
1009# Enable PTA for RTC access from non-secure world
1010CFG_RTC_PTA ?= n
1011
1012# Enable the FF-A SPMC tests in xtests
1013CFG_SPMC_TESTS ?= n
1014
1015# Allocate the translation tables needed to map the S-EL0 application
1016# loaded
1017CFG_CORE_PREALLOC_EL0_TBLS ?= n
1018ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER))
1019$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS")
1020endif
1021
1022# User TA runtime context dump.
1023# When this option is enabled, OP-TEE provides a debug method for
1024# developer to dump user TA's runtime context, including TA's heap stats.
1025# Developer can open a stats PTA session and then invoke command
1026# STATS_CMD_TA_STATS to get the context of loaded TAs.
1027CFG_TA_STATS ?= n
1028
1029# Enables best effort mitigations against fault injected when the hardware
1030# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h
1031CFG_FAULT_MITIGATION ?= y
1032
1033# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note
1034# that this doesn't affect libutee itself, it's only the TAs compiled with
1035# this set that are affected. Each out-of-tree must set this if to enable
1036# compatibility with version v1.1 as the value of this variable is not
1037# preserved in the TA dev-kit.
1038CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n
1039
1040# Change supported HMAC key size range, from 64 to 1024.
1041# This is needed to pass AOSP Keymaster VTS tests:
1042#   Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp
1043#   Module: VtsHalKeymasterV3_0TargetTest
1044#   Testcases: - PerInstance/SigningOperationsTest#
1045#              - PerInstance/NewKeyGenerationTest#
1046#              - PerInstance/ImportKeyTest#
1047#              - PerInstance/EncryptionOperationsTest#
1048#              - PerInstance/AttestationTest#
1049# Note that this violates GP requirements of HMAC size range.
1050CFG_HMAC_64_1024_RANGE ?= n
1051