1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20ifeq ($(ARCH),arm) 21CROSS_COMPILE ?= arm-linux-gnueabihf- 22# Don't cross-compile if building on aarch64 natively 23ifneq ($(shell uname -m),aarch64) 24CROSS_COMPILE64 ?= aarch64-linux-gnu- 25endif 26endif 27ifeq ($(ARCH),riscv) 28CROSS_COMPILE ?= riscv-linux-gnu- 29CROSS_COMPILE64 ?= riscv64-linux-gnu- 30endif 31CROSS_COMPILE32 ?= $(CROSS_COMPILE) 32COMPILER ?= gcc 33 34# For convenience 35ifdef CFLAGS 36CFLAGS32 ?= $(CFLAGS) 37CFLAGS64 ?= $(CFLAGS) 38endif 39 40# Compiler warning level. 41# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 42WARNS ?= 3 43 44# Path to the Python interpreter used by the build system. 45# This variable is set to the default python3 interpreter in the user's 46# path. But build environments that require more explicit control can 47# set the path to a specific interpreter through this variable. 48PYTHON3 ?= python3 49 50# Define DEBUG=1 to compile without optimization (forces -O0) 51# DEBUG=1 52ifeq ($(DEBUG),1) 53# For backwards compatibility 54$(call force,CFG_CC_OPT_LEVEL,0) 55$(call force,CFG_DEBUG_INFO,y) 56endif 57 58# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 59# Optimize for size by default, usually gives good performance too. 60CFG_CC_OPT_LEVEL ?= s 61 62# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 63CFG_DEBUG_INFO ?= y 64 65# If y, enable debug features of the TEE core (assertions and lock checks 66# are enabled, panic and assert messages are more verbose, data and prefetch 67# aborts show a stack dump). When disabled, the NDEBUG directive is defined 68# so assertions are disabled. 69CFG_TEE_CORE_DEBUG ?= y 70 71# Log levels for the TEE core. Defines which core messages are displayed 72# on the secure console. Disabling core log (level set to 0) also disables 73# logs from the TAs. 74# 0: none 75# 1: error 76# 2: error + info 77# 3: error + info + debug 78# 4: error + info + debug + flow 79CFG_TEE_CORE_LOG_LEVEL ?= 2 80 81# TA log level 82# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 83# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 84# when the TA is built. 85CFG_TEE_TA_LOG_LEVEL ?= 1 86 87# TA enablement 88# When defined to "y", TA traces are output according to 89# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 90CFG_TEE_CORE_TA_TRACE ?= y 91 92# By default, OP-TEE masks interrupts when emitting console trace messages 93# and uses a spinlock to prevent they intertwine. 94# When CFG_CONSOLE_MASK_INTERRUPTS is disabled, OP-TEE only attempts, 95# when possible, to withhold trace message evictions to prevent they 96# intertwine. However, trace mesasges from atomic contexts may still be 97# inserted into or even interleaved with non-atomic trace messages. 98CFG_CONSOLE_MASK_INTERRUPTS ?= y 99 100# If y, enable the memory leak detection feature in the bget memory allocator. 101# When this feature is enabled, calling mdbg_check(1) will print a list of all 102# the currently allocated buffers and the location of the allocation (file and 103# line number). 104# Note: make sure the log level is high enough for the messages to show up on 105# the secure console! For instance: 106# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 107# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 108# - To debug TEE core allocations: build OP-TEE with: 109# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 110CFG_TEE_CORE_MALLOC_DEBUG ?= n 111CFG_TEE_TA_MALLOC_DEBUG ?= n 112# Prints an error message and dumps the stack on failed memory allocations 113# using malloc() and friends. 114CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 115 116# Mask to select which messages are prefixed with long debugging information 117# (severity, core ID, thread ID, component name, function name, line number) 118# based on the message level. If BIT(level) is set, the long prefix is shown. 119# Otherwise a short prefix is used (severity and component name only). 120# Levels: 0=none 1=error 2=info 3=debug 4=flow 121CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 122 123# Number of threads 124CFG_NUM_THREADS ?= 2 125 126# API implementation version 127CFG_TEE_API_VERSION ?= GPD-1.1-dev 128 129# Implementation description (implementation-dependent) 130CFG_TEE_IMPL_DESCR ?= OPTEE 131 132# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 133# World? 134CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 135 136# The following values are not extracted from the "git describe" output because 137# we might be outside of a Git environment, or the tree may have been cloned 138# with limited depth not including any tag, so there is really no guarantee 139# that TEE_IMPL_VERSION contains the major and minor revision numbers. 140CFG_OPTEE_REVISION_MAJOR ?= 4 141CFG_OPTEE_REVISION_MINOR ?= 10 142CFG_OPTEE_REVISION_EXTRA ?= 143 144# Trusted OS implementation version 145TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 146 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 147 148# Trusted OS implementation manufacturer name 149CFG_TEE_MANUFACTURER ?= LINARO 150 151# Trusted firmware version 152CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 153 154# Trusted OS implementation manufacturer name 155CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 156 157# Rich Execution Environment (REE) file system support: normal world OS 158# provides the actual storage. 159# This is the default FS when enabled (i.e., the one used when 160# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 161CFG_REE_FS ?= y 162 163# CFG_REE_FS_HTREE_HASH_SIZE_COMPAT, when enabled, supports the legacy 164# REE FS hash tree tagging implementation that uses a truncated hash. 165# Be warned that disabling this config could break accesses to existing 166# REE FS content. 167CFG_REE_FS_HTREE_HASH_SIZE_COMPAT ?= y 168 169# RPMB file system support 170CFG_RPMB_FS ?= n 171 172# Enable roll-back protection of REE file system using RPMB. 173# Roll-back protection only works if CFG_RPMB_FS = y. 174CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 175$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 176 177# Device identifier used when CFG_RPMB_FS = y. 178# The exact meaning of this value is platform-dependent. On Linux, the 179# tee-supplicant process will open /dev/mmcblk<id>rpmb 180CFG_RPMB_FS_DEV_ID ?= 0 181 182# This config variable determines the number of entries read in from RPMB at 183# once whenever a function traverses the RPMB FS. Increasing the default value 184# has the following consequences: 185# - More memory required on heap. A single FAT entry currently has a size of 186# 256 bytes. 187# - Potentially significant speed-ups for RPMB I/O. Depending on how many 188# entries a function needs to traverse, the number of time-consuming RPMB 189# read-in operations can be reduced. 190# Chosing a proper value is both platform- (available memory) and use-case- 191# dependent (potential number of FAT fs entries), so overwrite in platform 192# config files 193CFG_RPMB_FS_RD_ENTRIES ?= 8 194 195# Enables caching of FAT FS entries when set to a value greater than zero. 196# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 197# entries. The cache is populated when FAT FS entries are initially read in. 198# When traversing the FAT FS entries, we read from the cache instead of reading 199# in the entries from RPMB storage. Consequently, when a FAT FS entry is 200# written, the cache is updated. In scenarios where an estimate of the number 201# of FAT FS entries can be made, the cache may be specifically tailored to 202# store all entries. The caching can improve RPMB I/O at the cost 203# of additional memory. 204# Without caching, we temporarily require 205# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 206# while traversing the FAT FS (e.g. in read_fat). 207# For example 8*256 bytes = 2kB while in read_fat. 208# With caching, we constantly require up to 209# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 210# depending on how many elements are in the cache, and additional temporary 211# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 212# in case the cache is too small to hold all elements when traversing. 213CFG_RPMB_FS_CACHE_ENTRIES ?= 0 214 215# Print RPMB data frames sent to and received from the RPMB device 216CFG_RPMB_FS_DEBUG_DATA ?= n 217 218# Clear RPMB content at cold boot 219CFG_RPMB_RESET_FAT ?= n 220 221# Use a hard coded RPMB key instead of deriving it from the platform HUK 222CFG_RPMB_TESTKEY ?= n 223 224# Enables RPMB key programming by the TEE, in case the RPMB partition has not 225# been configured yet. 226# !!! Security warning !!! 227# Do *NOT* enable this in product builds, as doing so would allow the TEE to 228# leak the RPMB key. 229# This option is useful in the following situations: 230# - Testing 231# - RPMB key provisioning in a controlled environment (factory setup) 232CFG_RPMB_WRITE_KEY ?= n 233 234# For the kernel driver to enable in-kernel RPMB routing it must know in 235# advance that OP-TEE supports it. Setting CFG_RPMB_ANNOUNCE_PROBE_CAP=y 236# will announce OP-TEE's capability for RPMB probing to the kernel and it 237# will use in-kernel RPMB routing, without it all RPMB commands will be 238# routed to tee-supplicant. This option is intended give some control over 239# how the RPMB commands are routed to simplify testing. 240CFG_RPMB_ANNOUNCE_PROBE_CAP ?= y 241 242_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 243 244# Signing key for OP-TEE TA's 245# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 246# key and then set TA_PUBLIC_KEY to match public key from the HSM. 247# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 248TA_SIGN_KEY ?= keys/default_ta.pem 249TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 250 251# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used 252# to verify a TA instead. To sign a TA using a previously prepared subkey 253# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS. It is 254# typically used by assigning the following in the TA Makefile: 255# BINARY = <TA-uuid-string> 256# TA_SIGN_KEY = subkey.pem 257# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta 258# TA_SUBKEY_DEPS = subkey.bin 259# See the documentation for more details on subkeys. 260 261# Include lib/libutils/isoc in the build? Most platforms need this, but some 262# may not because they obtain the isoc functions from elsewhere 263CFG_LIBUTILS_WITH_ISOC ?= y 264 265# Include lib/libutils/compiler-rt in the build. Most platforms need this. 266# Provides some functions called "compiler builtins", which the compiler 267# may invoke to perform low-level operations such as long long division 268# etc. Such functions typically come with compiler runtime libraires (GCC 269# has libgcc, Clang has compiler-rt). OP-TEE often can't use them because 270# they may be Linux-specific or bring unwanted dependencies. Therefore, 271# this imports and builds only what's needed. 272CFG_LIBUTILS_WITH_COMPILER_RT ?= y 273 274# Enables floating point support for user TAs 275# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 276# hard-float is basically a super set of soft-float. Hard-float 277# requires all the support routines provided for soft-float, but the 278# compiler may choose to optimize to not use some of them and use 279# the floating-point registers instead. 280# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 281# nothing with ` -mgeneral-regs-only`) 282# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 283CFG_TA_FLOAT_SUPPORT ?= y 284 285# Stack unwinding: print a stack dump to the console on core or TA abort, or 286# when a TA panics. 287# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 288# unwound (not paged TAs, however). 289# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 290# this option will increase the size of the 32-bit TEE binary by a few KB. 291# Similarly, TAs have to be compiled with -funwind-tables (default when the 292# option is set) otherwise they can't be unwound. 293# Warning: since the unwind sequence for user-mode (TA) code is implemented in 294# the privileged layer of OP-TEE, enabling this feature will weaken the 295# user/kernel isolation. Therefore it should be disabled in release builds. 296ifeq ($(CFG_TEE_CORE_DEBUG),y) 297CFG_UNWIND ?= y 298endif 299 300# Enable support for dynamically loaded user TAs 301CFG_WITH_USER_TA ?= y 302 303# Build user TAs included in this source tree 304CFG_BUILD_IN_TREE_TA ?= y 305 306# Choosing the architecture(s) of user-mode libraries (used by TAs) 307# 308# Platforms may define a list of supported architectures for user-mode code 309# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 310# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 311# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 312# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 313# The first entry in $(supported-ta-targets) has a special role, see 314# CFG_USER_TA_TARGET_<ta-name> below. 315# 316# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 317# change the order of the values. 318# 319# The list of TA architectures is ultimately stored in $(ta-targets). 320 321# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 322# defined, selects the unique TA architecture mode for building the in-tree TA 323# <ta-name>. Can be either ta_arm32 or ta_arm64. 324# By default, in-tree TAs are built using the first architecture specified in 325# $(ta-targets). 326 327# Address Space Layout Randomization for user-mode Trusted Applications 328# 329# When this flag is enabled, the ELF loader will introduce a random offset 330# when mapping the application in user space. ASLR makes the exploitation of 331# memory corruption vulnerabilities more difficult. 332CFG_TA_ASLR ?= y 333 334# How much ASLR may shift the base address (in pages). The base address is 335# randomly shifted by an integer number of pages comprised between these two 336# values. Bigger ranges are more secure because they make the addresses harder 337# to guess at the expense of using more memory for the page tables. 338CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 339CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 340 341# Address Space Layout Randomization for TEE Core 342# 343# When this flag is enabled, the early init code will introduce a random 344# offset when mapping TEE Core. ASLR makes the exploitation of memory 345# corruption vulnerabilities more difficult. 346CFG_CORE_ASLR ?= y 347 348# Stack Protection for TEE Core 349# This flag enables the compiler stack protection mechanisms -fstack-protector. 350# It will check the stack canary value before returning from a function to 351# prevent buffer overflow attacks. Stack protector canary logic will be added 352# for vulnerable functions that contain: 353# - A character array larger than 8 bytes. 354# - An 8-bit integer array larger than 8 bytes. 355# - A call to alloca() with either a variable size or a constant size bigger 356# than 8 bytes. 357CFG_CORE_STACK_PROTECTOR ?= n 358# This enable stack protector flag -fstack-protector-strong. Stack protector 359# canary logic will be added for vulnerable functions that contain: 360# - An array of any size and type. 361# - A call to alloca(). 362# - A local variable that has its address taken. 363CFG_CORE_STACK_PROTECTOR_STRONG ?= y 364# This enable stack protector flag -fstack-protector-all. Stack protector canary 365# logic will be added to all functions regardless of their vulnerability. 366CFG_CORE_STACK_PROTECTOR_ALL ?= n 367# Stack Protection for TA 368CFG_TA_STACK_PROTECTOR ?= n 369CFG_TA_STACK_PROTECTOR_STRONG ?= y 370CFG_TA_STACK_PROTECTOR_ALL ?= n 371 372_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \ 373 CFG_CORE_STACK_PROTECTOR_STRONG \ 374 CFG_CORE_STACK_PROTECTOR_ALL) 375_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \ 376 CFG_TA_STACK_PROTECTOR_STRONG \ 377 CFG_TA_STACK_PROTECTOR_ALL) 378 379# Load user TAs from the REE filesystem via tee-supplicant 380CFG_REE_FS_TA ?= y 381 382# Pre-authentication of TA binaries loaded from the REE filesystem 383# 384# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 385# "Secure DDR" pool, check the signature, then process the file only if it is 386# valid. 387# - If disabled: hash the binaries as they are being processed and verify the 388# signature as a last step. 389CFG_REE_FS_TA_BUFFERED ?= n 390$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 391 392# When CFG_REE_FS=y: 393# Allow secure storage in the REE FS to be entirely deleted without causing 394# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 395# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 396# can be used to reset the secure storage to a clean, empty state. 397# Intended to be used for testing only since it weakens storage security. 398# Warning: If enabled for release build then it will break rollback protection 399# of TAs and the entire REE FS secure storage. 400CFG_REE_FS_ALLOW_RESET ?= n 401 402# Support for loading user TAs from a special section in the TEE binary. 403# Such TAs are available even before tee-supplicant is available (hence their 404# name), but note that many services exported to TAs may need tee-supplicant, 405# so early use is limited to a subset of the TEE Internal Core API (crypto...) 406# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 407# file(s). For example: 408# $ make ... \ 409# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 410# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 411# Typical build steps: 412# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 413# # headers, makefiles), ready to build TAs. 414# # CFG_EARLY_TA=y is optional, it prevents 415# # later library recompilations. 416# <build some TAs> 417# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 418# 419# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 420# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 421# <name-of-ta>/<uuid> 422# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 423ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 424$(call force,CFG_EARLY_TA,y) 425else 426CFG_EARLY_TA ?= n 427endif 428 429ifeq ($(CFG_EARLY_TA),y) 430$(call force,CFG_EMBEDDED_TS,y) 431endif 432 433ifneq ($(SP_PATHS),) 434$(call force,CFG_EMBEDDED_TS,y) 435else 436CFG_SECURE_PARTITION ?= n 437endif 438 439ifeq ($(CFG_SECURE_PARTITION),y) 440$(call force,CFG_EMBEDDED_TS,y) 441endif 442 443ifeq ($(CFG_EMBEDDED_TS),y) 444$(call force,CFG_ZLIB,y) 445endif 446 447# By default the early TAs are compressed in the TEE binary, it is possible to 448# not compress them with CFG_EARLY_TA_COMPRESS=n 449CFG_EARLY_TA_COMPRESS ?= y 450 451# Enable paging, requires SRAM, can't be enabled by default 452CFG_WITH_PAGER ?= n 453 454# Use the pager for user TAs 455CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 456 457# If paging of user TAs, that is, R/W paging default to enable paging of 458# TAG and IV in order to reduce heap usage. 459CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 460 461# Runtime lock dependency checker: ensures that a proper locking hierarchy is 462# used in the TEE core when acquiring and releasing mutexes. Any violation will 463# cause a panic as soon as the invalid locking condition is detected. If 464# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 465# records the call stacks when locks are taken, and prints them when a 466# potential deadlock is found. 467# Expect a significant performance impact when enabling this. 468CFG_LOCKDEP ?= n 469CFG_LOCKDEP_RECORD_STACK ?= y 470 471# BestFit algorithm in bget reduces the fragmentation of the heap when running 472# with the pager enabled or lockdep 473CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 474 475# Enable support for detected undefined behavior in C 476# Uses a lot of memory, can't be enabled by default 477CFG_CORE_SANITIZE_UNDEFINED ?= n 478CFG_TA_SANITIZE_UNDEFINED ?= n 479 480# Enable Kernel Address sanitizer, has a huge performance impact, uses a 481# lot of memory and need platform specific adaptations, can't be enabled by 482# default 483CFG_CORE_SANITIZE_KADDRESS ?= n 484CFG_TA_SANITIZE_KADDRESS ?= n 485 486# At the moment TA build requires core build 487ifeq ($(CFG_TA_SANITIZE_KADDRESS),y) 488ifeq ($(CFG_CORE_SANITIZE_KADDRESS),n) 489$(error CFG_TA_SANITIZE_KADDRESS requires CFG_CORE_SANITIZE_KADDRESS=y) 490endif 491endif 492 493ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR)) 494$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible) 495endif 496 497# Add stack guards before/after stacks and periodically check them 498CFG_WITH_STACK_CANARIES ?= y 499 500# Use compiler instrumentation to troubleshoot stack overflows. 501# When enabled, most C functions check the stack pointer against the current 502# stack limits on entry and panic immediately if it is out of range. 503CFG_CORE_DEBUG_CHECK_STACKS ?= n 504 505# Use when the default stack allocations are not sufficient. 506CFG_STACK_THREAD_EXTRA ?= 0 507CFG_STACK_TMP_EXTRA ?= 0 508 509# Device Tree support 510# 511# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 512# device tree blob (DTB) parsing from the core. 513# 514# When CFG_DT is enabled, the TEE _start function expects to find 515# the address of a DTB in register X2/R2 provided by the early boot stage 516# or value 0 if boot stage provides no DTB. 517# 518# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 519# and the external device tree is expected to be used/modified. Its value 520# defaults to CFG_DT. 521# 522# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 523# be in the secure memory. 524# 525# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 526# relative path of a DTS file located in core/arch/$(ARCH)/dts. 527# The DTS file is compiled into a DTB file which content is embedded in a 528# read-only section of the core. 529ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 530CFG_EMBED_DTB ?= y 531endif 532ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 533 $(CFG_CORE_EL3_SPMC)),y) 534$(call force,CFG_DT,y) 535endif 536CFG_EMBED_DTB ?= n 537CFG_DT ?= n 538CFG_EXTERNAL_DT ?= $(CFG_DT) 539CFG_MAP_EXT_DT_SECURE ?= n 540ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 541$(call force,CFG_DT,y) 542endif 543 544# This option enables OP-TEE to support boot arguments handover via Transfer 545# List defined in Firmware Handoff specification. 546# Note: This is an experimental feature and incompatible ABI changes can be 547# expected. It should be off by default until Firmware Handoff specification 548# has a stable release. 549# This feature requires the support of Device Tree. 550CFG_TRANSFER_LIST ?= n 551 552# Maximum size of the Device Tree Blob, has to be large enough to allow 553# editing of the supplied DTB. 554CFG_DTB_MAX_SIZE ?= 0x10000 555 556# CFG_DT_CACHED_NODE_INFO, when enabled, parses the embedded DT at boot 557# time and caches some information to speed up retrieve of DT node data, 558# more specifically those for which libfdt parses the full DTB to find 559# the target node information. 560CFG_DT_CACHED_NODE_INFO ?= $(CFG_EMBED_DTB) 561$(eval $(call cfg-depends-all,CFG_DT_CACHED_NODE_INFO,CFG_EMBED_DTB)) 562 563# Maximum size of the init info data passed to Secure Partitions. 564CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 565 566# Device Tree Overlay support. 567# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 568# external DTB. The overlay is created when no valid DTB overlay is found. 569# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 570# DTB location. 571# External DTB location (physical address) is provided either by boot 572# argument arg2 or from CFG_DT_ADDR if defined. 573# A subsequent boot stage can then merge the generated overlay DTB into a main 574# DTB using the standard fdt_overlay_apply() method. 575CFG_EXTERNAL_DTB_OVERLAY ?= n 576CFG_GENERATE_DTB_OVERLAY ?= n 577 578ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 579$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 580endif 581_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 582 CFG_GENERATE_DTB_OVERLAY) 583 584# All embedded tests are supposed to be disabled by default, this flag 585# is used to control the default value of all other embedded tests 586CFG_ENABLE_EMBEDDED_TESTS ?= n 587 588# Enable core self tests and related pseudo TAs 589CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 590# Embed transfer list support self test when enabled 591CFG_TRANSFER_LIST_TEST ?= $(call cfg-all-enabled,CFG_TRANSFER_LIST \ 592 CFG_TEE_CORE_EMBED_INTERNAL_TESTS) 593 594# Compiles bget_main_test() to be called from a test TA 595CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 596 597# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests. 598# This also requires embedding a DTB with expected content. 599# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 600# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 601CFG_DT_DRIVER_EMBEDDED_TEST ?= n 602ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 603CFG_DRIVERS_CLK ?= y 604CFG_DRIVERS_GPIO ?= y 605CFG_DRIVERS_RSTCTRL ?= y 606CFG_DRIVERS_CLK_EARLY_PROBE ?= n 607$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 608endif 609 610# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure 611# clients to retrieve debug and statistics information on core and loaded TAs. 612CFG_WITH_STATS ?= n 613 614# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 615# parsing in the embedded DTB for driver probing. The alternative is 616# an exploration based on compatible drivers found. It is default disabled. 617CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 618 619# This option enables OP-TEE to respond to SMP boot request: the Rich OS 620# issues this to request OP-TEE to release secondaries cores out of reset, 621# with specific core number and non-secure entry address. 622CFG_BOOT_SECONDARY_REQUEST ?= n 623 624# Default heap size for Core, 64 kB 625CFG_CORE_HEAP_SIZE ?= 65536 626 627# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION 628# is enabled 629CFG_CORE_NEX_HEAP_SIZE ?= 16384 630 631# TA profiling. 632# When this option is enabled, OP-TEE can execute Trusted Applications 633# instrumented with GCC's -pg flag and will output profiling information 634# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 635# tee-supplicant) 636# Note: this does not work well with shared libraries at the moment for a 637# couple of reasons: 638# 1. The profiling code assumes a unique executable section in the TA VA space. 639# 2. The code used to detect at run time if the TA is intrumented assumes that 640# the TA is linked statically. 641CFG_TA_GPROF_SUPPORT ?= n 642 643# TA function tracing. 644# When this option is enabled, OP-TEE can execute Trusted Applications 645# instrumented with GCC's -pg flag and will output function tracing 646# information for all functions compiled with -pg to 647# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant). 648CFG_FTRACE_SUPPORT ?= n 649 650# Core syscall function tracing. 651# When this option is enabled, OP-TEE core is instrumented with GCC's 652# -pg flag and will output syscall function graph in user TA ftrace 653# buffer 654CFG_SYSCALL_FTRACE ?= n 655$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 656 657# Dump ftrace buffer to tee-supplicant after every TA entry. 658# When this option is enabled, OP-TEE outputs the ftrace buffer to 659# tee-supplicant after every time TA returns from the entrypoint 660# calling. Instead of writing function tracing information after 661# the session is closed. 662# By enabling this option, developer can use smaller ftrace buffer 663# and reduce the chance of getting truncated ftrace information. 664# However, developer still needs to ensure the ftrace buffer is large 665# enough to hold the data generated in single TA entry. 666CFG_FTRACE_DUMP_EVERY_ENTRY ?= $(CFG_FTRACE_SUPPORT) 667$(call cfg-depends-all,CFG_FTRACE_DUMP_EVERY_ENTRY,CFG_FTRACE_SUPPORT) 668 669# Enable to compile user TA libraries with profiling (-pg). 670# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 671CFG_ULIBS_MCOUNT ?= n 672# Profiling/tracing of syscall wrapper (utee_*) 673CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 674 675ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 676ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 677$(error Cannot instrument user libraries if user mode profiling is disabled) 678endif 679endif 680 681# Build libutee, libutils, libmbedtls as shared libraries. 682# - Static libraries are still generated when this is enabled, but TAs will use 683# the shared libraries unless explicitly linked with the -static flag. 684# - Shared libraries are made of two files: for example, libutee is 685# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 686# is a totally standard shared object, and should be used to link against. 687# The '.ta' file is a signed version of the '.so' and should be installed 688# in the same way as TAs so that they can be found at runtime. 689CFG_ULIBS_SHARED ?= n 690 691ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 692$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 693endif 694 695# CFG_GP_SOCKETS 696# Enable Global Platform Sockets support 697CFG_GP_SOCKETS ?= y 698 699# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 700# invocation parameters referring to specific secure memories). 701CFG_SECURE_DATA_PATH ?= n 702 703# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 704# TA binaries are stored encrypted in the REE FS and are protected by 705# metadata in secure storage. 706CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 707$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 708 709# Enable the pseudo TA that managages TA storage in secure storage 710CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 711$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 712 713# Enable the pseudo TA for misc. auxilary services, extending existing 714# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 715# pool etc...) 716CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 717$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 718 719# Enable the pseudo TA for enumeration of TEE based devices for the normal 720# world OS. 721CFG_DEVICE_ENUM_PTA ?= y 722 723# The attestation pseudo TA provides an interface to request measurements of 724# a TA or the TEE binary. 725CFG_ATTESTATION_PTA ?= n 726$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 727 728# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 729# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 730# note that such a low value is not secure. 731# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 732# https://tools.ietf.org/html/rfc8017#section-9.1.1 733# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 734# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 735CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 736 737# Define the number of cores per cluster used in calculating core position. 738# The cluster number is shifted by this value and added to the core ID, 739# so its value represents log2(cores/cluster). 740# Default is 2**(2) = 4 cores per cluster. 741CFG_CORE_CLUSTER_SHIFT ?= 2 742 743# Define the number of threads per core used in calculating processing 744# element's position. The core number is shifted by this value and added to 745# the thread ID, so its value represents log2(threads/core). 746# Default is 2**(0) = 1 threads per core. 747CFG_CORE_THREAD_SHIFT ?= 0 748 749# Enable support for dynamic shared memory (shared memory anywhere in 750# non-secure memory). 751CFG_CORE_DYN_SHM ?= y 752 753# Enable support for reserved shared memory (shared memory in a carved out 754# memory area). 755CFG_CORE_RESERVED_SHM ?= y 756 757# Enables support for larger physical addresses, that is, it will define 758# paddr_t as a 64-bit type. 759CFG_CORE_LARGE_PHYS_ADDR ?= n 760 761# Define the maximum size, in bits, for big numbers in the Internal Core API 762# Arithmetical functions. This does *not* influence the key size that may be 763# manipulated through the Cryptographic API. 764# Set this to a lower value to reduce the TA memory footprint. 765CFG_TA_BIGNUM_MAX_BITS ?= 2048 766 767# Not used since libmpa was removed. Force the values to catch build scripts 768# that would set = n. 769$(call force,CFG_TA_MBEDTLS_MPI,y) 770$(call force,CFG_TA_MBEDTLS,y) 771 772# Compile the TA library mbedTLS with self test functions, the functions 773# need to be called to test anything 774CFG_TA_MBEDTLS_SELF_TEST ?= y 775 776# By default use tomcrypt as the main crypto lib providing an implementation 777# for the API in <crypto/crypto.h> 778# CFG_CRYPTOLIB_NAME is used as libname and 779# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 780# 781# It's also possible to configure to use mbedtls instead of tomcrypt. 782# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 783# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 784CFG_CRYPTOLIB_NAME ?= tomcrypt 785CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 786 787# Not used since libmpa was removed. Force the value to catch build scripts 788# that would set = n. 789$(call force,CFG_CORE_MBEDTLS_MPI,y) 790 791# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in 792# the non-secure world. OP-TEE will not work without a compatible hypervisor 793# in the non-secure world if this option is enabled. 794# 795# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is 796# deprecated as the configuration switch name was ambiguous regarding which 797# world has virtualization enabled. 798ifneq (undefined,$(flavor CFG_VIRTUALIZATION)) 799$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead) 800CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION) 801ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION)) 802$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION)) 803endif 804endif # CFG_VIRTUALIZATION defined 805CFG_NS_VIRTUALIZATION ?= n 806 807ifeq ($(CFG_NS_VIRTUALIZATION),y) 808$(call force,CFG_CORE_RODATA_NOEXEC,y) 809$(call force,CFG_CORE_RWDATA_NOEXEC,y) 810 811# Default number of virtual guests 812CFG_VIRT_GUEST_COUNT ?= 2 813endif 814 815# Enables backwards compatible derivation of RPMB and SSK keys 816CFG_CORE_HUK_SUBKEY_COMPAT ?= y 817 818# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 819# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 820CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 821 822# Compress and encode conf.mk into the TEE core, and show the encoded string on 823# boot (with severity TRACE_INFO). 824CFG_SHOW_CONF_ON_BOOT ?= n 825 826# Enables support for passing a TPM Event Log stored in secure memory 827# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 828# taken before the service was up and running. 829CFG_CORE_TPM_EVENT_LOG ?= n 830 831# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 832# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 833# 834# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 835# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 836# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 837# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 838# CFG_SCMI_MSG_PERF_DOMAIN embeds SCMI performance domain management protocol 839# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 840# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 841# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 842# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 843CFG_SCMI_MSG_DRIVERS ?= n 844ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 845CFG_SCMI_MSG_CLOCK ?= n 846CFG_SCMI_MSG_RESET_DOMAIN ?= n 847CFG_SCMI_MSG_SHM_MSG ?= n 848CFG_SCMI_MSG_SMT ?= n 849CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 850CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 851CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 852CFG_SCMI_MSG_THREAD_ENTRY ?= n 853CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 854CFG_SCMI_MSG_PERF_DOMAIN ?= n 855$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 856$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 857$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 858ifeq ($(CFG_SCMI_MSG_SMT),y) 859_CFG_SCMI_PTA_SMT_HEADER := y 860endif 861ifeq ($(CFG_SCMI_MSG_SHM_MSG),y) 862_CFG_SCMI_PTA_MSG_HEADER := y 863endif 864endif 865 866# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation 867# from SCP-firmware package as an built-in SCMI stack in core. This 868# configuration mandates target product identifier is configured with 869# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with 870# CFG_SCP_FIRMWARE. 871CFG_SCMI_SCPFW ?= n 872 873ifeq ($(CFG_SCMI_SCPFW),y) 874$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW) 875ifeq (,$(CFG_SCMI_SCPFW_PRODUCT)) 876$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration) 877endif 878ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt)) 879$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration) 880endif 881endif #CFG_SCMI_SCPFW 882 883# CFG_SCMI_SCPFW_FROM_DT, when enabled, calls scpfw_configure() function 884# in SCP-firmware that will retrieve resources in "scmi" fdt node. 885CFG_SCMI_SCPFW_FROM_DT ?= n 886$(eval $(call cfg-depends-all,CFG_SCMI_SCPFW_FROM_DT,CFG_SCMI_SCPFW CFG_EMBED_DTB)) 887 888ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y) 889$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive) 890endif 891 892# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for 893# the platform SCMI server and implements the platform plat_scmi_clock_*() 894# functions. 895CFG_SCMI_MSG_USE_CLK ?= n 896$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS)) 897 898# Enable SCMI PTA interface for REE SCMI agents 899CFG_SCMI_PTA ?= n 900ifeq ($(CFG_SCMI_PTA),y) 901_CFG_SCMI_PTA_SMT_HEADER ?= n 902_CFG_SCMI_PTA_MSG_HEADER ?= n 903endif 904 905ifneq ($(CFG_STMM_PATH),) 906$(call force,CFG_WITH_STMM_SP,y) 907$(call force,CFG_EFILIB,y) 908else 909CFG_WITH_STMM_SP ?= n 910endif 911ifeq ($(CFG_WITH_STMM_SP),y) 912$(call force,CFG_ZLIB,y) 913endif 914 915# When enabled checks that buffers passed to the GP Internal Core API 916# comply with the rules added as annotations as part of the definition of 917# the API. For example preventing buffers in non-secure shared memory when 918# not allowed. 919CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 920 921# When enabled accepts the DES key sizes excluding parity bits as in 922# the GP Internal API Specification v1.0 923CFG_COMPAT_GP10_DES ?= y 924 925# Defines a limit for many levels TAs may call each others. 926CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 927 928# Pseudo-TA to export hardware RNG output to Normal World 929# RNG characteristics are platform specific 930CFG_HWRNG_PTA ?= n 931ifeq ($(CFG_HWRNG_PTA),y) 932# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 933CFG_HWRNG_RATE ?= 0 934# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 935ifeq (,$(CFG_HWRNG_QUALITY)) 936$(error CFG_HWRNG_QUALITY not defined) 937endif 938endif 939 940# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 941# shared memory for each secure thread. When disabled, RPC shared 942# memory is released once the secure thread has completed is execution. 943ifeq ($(CFG_WITH_PAGER),y) 944CFG_PREALLOC_RPC_CACHE ?= n 945endif 946CFG_PREALLOC_RPC_CACHE ?= y 947 948# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 949# This clock framework allows to describe clock tree and provides functions to 950# get and configure the clocks. 951# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 952# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 953# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 954# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree 955# state on OP-TEE core console with the info trace level. 956CFG_DRIVERS_CLK ?= n 957CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 958CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 959CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 960CFG_DRIVERS_CLK_PRINT_TREE ?= n 961 962$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 963$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 964 965# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 966# OP-TEE core to provide reset controls on subsystems of the devices. 967CFG_DRIVERS_RSTCTRL ?= n 968 969# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in 970# OP-TEE core to provide GPIO support for drivers. 971CFG_DRIVERS_GPIO ?= n 972 973# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support. 974CFG_DRIVERS_I2C ?= n 975 976# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem 977# providers and allow consumer drivers to get NVMEM cells using the Device Tree. 978CFG_DRIVERS_NVMEM ?= n 979 980# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in 981# OP-TEE core to provide drivers a way to apply pin muxing configurations based 982# on device-tree. 983CFG_DRIVERS_PINCTRL ?= n 984 985# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in 986# OP-TEE core to provide drivers a common regulator interface and describe 987# the regulators dependencies using an embedded device tree. 988# 989# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for 990# DT compatible "regulator-fixed" devices. 991# 992# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for 993# DT compatible "regulator-gpio" devices. 994# 995# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the 996# regulator tree state on OP-TEE core console with the info trace level. 997CFG_DRIVERS_REGULATOR ?= n 998CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n 999CFG_REGULATOR_FIXED ?= n 1000CFG_REGULATOR_GPIO ?= n 1001 1002$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \ 1003 CFG_DRIVERS_REGULATOR CFG_DT)) 1004$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \ 1005 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO)) 1006 1007# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core 1008# and shows a print (info level) when booting up the device that 1009# indicates that the board runs a standard developer configuration. 1010# 1011# A developer configuration doesn't necessarily have to be secure. The intention 1012# is that the one making products based on OP-TEE should override this flag in 1013# plat-xxx/conf.mk for the platform they're basing their products on after 1014# they've finalized implementing stubbed functionality (see OP-TEE 1015# documentation/Porting guidelines) as well as vendor specific security 1016# configuration. 1017# 1018# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated. 1019ifneq (undefined,$(flavor CFG_WARN_INSECURE)) 1020$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead) 1021CFG_INSECURE ?= $(CFG_WARN_INSECURE) 1022ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE)) 1023$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE)) 1024endif 1025endif # CFG_WARN_INSECURE defined 1026CFG_INSECURE ?= y 1027 1028ifneq ($(CFG_INSECURE),y) 1029ifneq ($(CFG_CORE_ASLR_SEED),) 1030$(error CFG_CORE_ASLR_SEED requires CFG_INSECURE=y) 1031endif 1032endif 1033 1034# Enables warnings for declarations mixed with statements 1035CFG_WARN_DECL_AFTER_STATEMENT ?= y 1036 1037# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 1038# mechanism to limit the set of locations to which computed branch instructions 1039# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 1040# that support it, enable this option. A GCC toolchain built with 1041# --enable-standard-branch-protection is needed to use this option. 1042CFG_CORE_BTI ?= n 1043 1044$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 1045 1046# To make use of BTI in user space libraries and TA's on CPU's that support it, 1047# enable this option. 1048CFG_TA_BTI ?= $(CFG_CORE_BTI) 1049 1050$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 1051 1052ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 1053$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible) 1054endif 1055 1056ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 1057$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 1058endif 1059 1060# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 1061# and key access to memory. This is a hardware supported alternative to 1062# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 1063CFG_MEMTAG ?= n 1064 1065$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 1066ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 1067$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 1068endif 1069ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 1070$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 1071endif 1072 1073# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be 1074# used to restrict accesses to unprivileged memory from privileged mode. 1075# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN. 1076CFG_PAN ?= n 1077 1078$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core)) 1079 1080ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 1081 $(CFG_CORE_EL3_SPMC)),y) 1082# FF-A case, handled via the FF-A ABI 1083CFG_CORE_ASYNC_NOTIF ?= y 1084$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n) 1085else 1086# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support 1087# for sending asynchronous notifications to normal world. 1088# Interrupt ID must be configurged by the platform too. Currently is only 1089# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 1090CFG_CORE_ASYNC_NOTIF ?= n 1091$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF)) 1092endif 1093 1094ifeq ($(CFG_CORE_SEL2_SPMC),y) 1095# Callout by default disabled for SPMC at S-EL2 since Hafnium may crash, 1096# but allow it to be overridden for testing 1097CFG_CALLOUT ?= n 1098else 1099# Enable callout service 1100CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF) 1101endif 1102 1103# Enable notification based test watchdog 1104CFG_NOTIF_TEST_WD ?= $(call cfg-all-enabled,CFG_ENABLE_EMBEDDED_TESTS \ 1105 CFG_CALLOUT CFG_CORE_ASYNC_NOTIF) 1106$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \ 1107 CFG_CORE_ASYNC_NOTIF)) 1108 1109$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 1110 CFG_WITH_STATS)) 1111 1112# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 1113# for signing and authenticating pointers against secret keys. These can 1114# be used to mitigate ROP (Return oriented programming) attacks. This is 1115# currently done by instructing the compiler to add paciasp/autiasp at the 1116# begging and end of functions to sign and verify ELR. 1117# 1118# The CFG_CORE_PAUTH enables these instructions for the core parts 1119# executing at EL1, with one secret key per thread and one secret key per 1120# physical CPU. 1121# 1122# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 1123# this option is enabled, TEE core will initialize secret keys per TA. 1124CFG_CORE_PAUTH ?= n 1125CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 1126 1127$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 1128$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 1129 1130ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 1131$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 1132endif 1133ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 1134$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 1135endif 1136 1137ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 1138$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1139endif 1140 1141ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 1142$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1143endif 1144 1145# Enable support for generic watchdog registration 1146# This watchdog will then be usable by non-secure world through SMC calls. 1147CFG_WDT ?= n 1148 1149# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 1150CFG_WDT_SM_HANDLER ?= n 1151 1152$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 1153 1154# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements 1155# arm-smc-wdt service. Platform can also override this ID with a platform 1156# specific SMC function ID to access arm-smc-wdt service thanks to 1157# optional config switch CFG_WDT_SM_HANDLER_ID. 1158CFG_WDT_SM_HANDLER_ID ?= 0x82003D06 1159 1160# Allow using the udelay/mdelay function for platforms without ARM generic timer 1161# extension. When set to 'n', the plat_get_freq() function must be defined by 1162# the platform code 1163CFG_CORE_HAS_GENERIC_TIMER ?= y 1164 1165# Enable RTC API 1166CFG_DRIVERS_RTC ?= n 1167 1168# Enable PTA for RTC access from non-secure world 1169CFG_RTC_PTA ?= n 1170 1171# Enable the FF-A SPMC tests in xtests 1172CFG_SPMC_TESTS ?= n 1173 1174# Allocate the translation tables needed to map the S-EL0 application 1175# loaded 1176CFG_CORE_PREALLOC_EL0_TBLS ?= n 1177ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 1178$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 1179endif 1180 1181# CFG_PGT_CACHE_ENTRIES defines the number of entries on the memory 1182# mapping page table cache used for Trusted Application mapping. 1183# CFG_PGT_CACHE_ENTRIES is ignored when CFG_CORE_PREALLOC_EL0_TBLS 1184# is enabled. 1185# 1186# A proper value for CFG_PGT_CACHE_ENTRIES depends on many factors: 1187# CFG_WITH_LPAE, CFG_TA_ASLR, size of TAs, size of memrefs passed 1188# to TA, CFG_ULIBS_SHARED and possibly others. The default value 1189# is based on the number of threads as an indicator on how large 1190# the system might be. 1191ifeq ($(CFG_NUM_THREADS),1) 1192CFG_PGT_CACHE_ENTRIES ?= 4 1193endif 1194ifeq ($(CFG_NUM_THREADS),2) 1195ifneq ($(CFG_WITH_LPAE),y) 1196CFG_PGT_CACHE_ENTRIES ?= 8 1197endif 1198endif 1199CFG_PGT_CACHE_ENTRIES ?= ($(CFG_NUM_THREADS) * 2) 1200 1201# User TA runtime context dump. 1202# When this option is enabled, OP-TEE provides a debug method for 1203# developer to dump user TA's runtime context, including TA's heap stats. 1204# Developer can open a stats PTA session and then invoke command 1205# STATS_CMD_TA_STATS to get the context of loaded TAs. 1206CFG_TA_STATS ?= n 1207 1208# Enables best effort mitigations against fault injected when the hardware 1209# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h 1210CFG_FAULT_MITIGATION ?= y 1211 1212# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note 1213# that this doesn't affect libutee itself, it's only the TAs compiled with 1214# this set that are affected. Each out-of-tree must set this if to enable 1215# compatibility with version v1.1 as the value of this variable is not 1216# preserved in the TA dev-kit. 1217CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n 1218 1219# Change supported HMAC key size range, from 64 to 1024. 1220# This is needed to pass AOSP Keymaster VTS tests: 1221# Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp 1222# Module: VtsHalKeymasterV3_0TargetTest 1223# Testcases: - PerInstance/SigningOperationsTest# 1224# - PerInstance/NewKeyGenerationTest# 1225# - PerInstance/ImportKeyTest# 1226# - PerInstance/EncryptionOperationsTest# 1227# - PerInstance/AttestationTest# 1228# Note that this violates GP requirements of HMAC size range. 1229CFG_HMAC_64_1024_RANGE ?= n 1230 1231# CFG_RSA_PUB_EXPONENT_3, when enabled, allows RSA public exponents in the 1232# range 3 <= e < 2^256. This is needed to pass AOSP KeyMint VTS tests: 1233# Link to tests: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp 1234# Module: VtsAidlKeyMintTargetTest 1235# Testcases: - PerInstance/EncryptionOperationsTest.RsaNoPaddingSuccess 1236# When CFG_RSA_PUB_EXPONENT_3 is disabled, RSA public exponents must conform 1237# to NIST SP800-56B recommendation and be in the range 65537 <= e < 2^256. 1238CFG_RSA_PUB_EXPONENT_3 ?= n 1239 1240# Enable a hardware pbkdf2 function 1241# By default use standard pbkdf2 implementation 1242CFG_CRYPTO_HW_PBKDF2 ?= n 1243$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2)) 1244 1245# CFG_MULTI_CORE_HALTING, when enabled, registers an interrupt handler for the 1246# Software Generated Interrupt(SGI) specified by: CFG_HALT_CORES_SGI. Upon 1247# reception of this SGI, the CPU is halted. This feature currently relies on the 1248# GIC device. 1249CFG_MULTI_CORE_HALTING ?= n 1250CFG_HALT_CORES_SGI ?= 15 1251$(eval $(call cfg-depends-all,CFG_MULTI_CORE_HALTING,CFG_GIC)) 1252 1253# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the 1254# other cores. This feature relies on the SGI specified by CFG_HALT_CORES_SGI 1255# to halt the other cores. 1256CFG_HALT_CORES_ON_PANIC ?= ${CFG_MULTI_CORE_HALTING} 1257$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_MULTI_CORE_HALTING)) 1258 1259 1260# Enable automatic discovery of maximal PA supported by the hardware and 1261# use that. Provides easier configuration of virtual platforms where the 1262# maximal PA can vary. 1263CFG_AUTO_MAX_PA_BITS ?= n 1264 1265# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor 1266# management including generic DT bindings for the configuration. 1267CFG_DRIVERS_REMOTEPROC ?= n 1268 1269# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA 1270# service. 1271CFG_REMOTEPROC_PTA ?= n 1272 1273# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure 1274# DTB as OP-TEE HUK. 1275CFG_WIDEVINE_HUK ?= n 1276$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT)) 1277 1278# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under 1279# DT node "/options/op-tee/widevine" to some specific TAs. 1280CFG_WIDEVINE_PTA ?= n 1281$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK)) 1282 1283# When enabled, CFG_VERAISON_ATTESTATION_PTA embeds remote attestation PTA 1284# service. Note: This is an experimental feature and should be used 1285# with caution in production environments. 1286CFG_VERAISON_ATTESTATION_PTA ?= n 1287ifeq ($(CFG_VERAISON_ATTESTATION_PTA),y) 1288$(call force,CFG_QCBOR,y) 1289endif 1290 1291# When enabled, CFG_VERAISON_ATTESTATION_PTA_TEST_KEY embeds a test key. 1292# Note: CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled for 1293# CFG_VERAISON_ATTESTATION_PTA to work. 1294CFG_VERAISON_ATTESTATION_PTA_TEST_KEY ?= y 1295ifneq ($(CFG_VERAISON_ATTESTATION_PTA_TEST_KEY),y) 1296$(error "CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled") 1297endif 1298 1299# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver. 1300# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes 1301# trace messages from/to the debug terminal of the semihosting host computer. 1302# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console 1303# outputs trace messages to that file. Output to "optee.log" by default. 1304CFG_SEMIHOSTING_CONSOLE ?= n 1305ifeq ($(CFG_SEMIHOSTING_CONSOLE),y) 1306$(call force,CFG_SEMIHOSTING,y) 1307endif 1308CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log" 1309ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),) 1310$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty) 1311endif 1312 1313# Semihosting is a debugging mechanism that enables code running on an embedded 1314# system (also called the target) to communicate with and use the I/O of the 1315# host computer. 1316CFG_SEMIHOSTING ?= n 1317 1318# CFG_FFA_CONSOLE, when enabled, embeds a FFA console driver. OP-TEE console 1319# writes trace messages via FFA interface to the SPM (Secure Partition Manager) 1320# like hafnium. 1321CFG_FFA_CONSOLE ?= n 1322 1323# CFG_CONSOLE_RUNTIME_SET, when enabled, reduces the trace LOG_LEVEL to the 1324# value set by CFG_CONSOLE_RUNTIME_LOG_LEVEL after OP-TEE has finished booting. 1325# This allows for a different trace level during runtime than used during boot 1326CFG_CONSOLE_RUNTIME_SET ?= n 1327CFG_CONSOLE_RUNTIME_LOG_LEVEL ?= 0 1328 1329# CFG_CORE_UNSAFE_MODEXP, when enabled, makes modular exponentiation on TEE 1330# core use 'unsafe' algorithm having better performance. To resist against 1331# timing attacks, 'safe' one is designed to take constant-time that is 1332# generally much slower. 1333CFG_CORE_UNSAFE_MODEXP ?= n 1334 1335# CFG_TA_MBEDTLS_UNSAFE_MODEXP, similar to CFG_CORE_UNSAFE_MODEXP, 1336# when enabled, makes MBedTLS library for TAs use 'unsafe' modular 1337# exponentiation algorithm. 1338CFG_TA_MBEDTLS_UNSAFE_MODEXP ?= n 1339 1340# CFG_DYN_CONFIG, when enabled, use dynamic memory allocation for translation 1341# tables and stacks. Not supported with pager. 1342ifeq ($(CFG_WITH_PAGER),y) 1343$(call force,CFG_DYN_CONFIG,n,conflicts with CFG_WITH_PAGER) 1344else 1345CFG_DYN_CONFIG ?= y 1346endif 1347 1348# CFG_EXTERNAL_ABORT_PLAT_HANDLER is used to implement platform-specific 1349# handling of external abort implementing the plat_external_abort_handler() 1350# function. 1351CFG_EXTERNAL_ABORT_PLAT_HANDLER ?= n 1352 1353# CFG_TA_LIBGCC, when enabled, links user mode TAs with libgcc. Linking 1354# TAs with libgcc is deprecated, but keep this flag while sorting out the 1355# out remaining issues with supporting C++. 1356CFG_TA_LIBGCC ?= y 1357 1358# CFG_CORE_DYN_PROTMEM, enables dynamic protected memory lending from 1359# normal world. 1360CFG_CORE_DYN_PROTMEM ?= n 1361$(eval $(call cfg-depends-all,CFG_CORE_DYN_PROTMEM,CFG_CORE_DYN_SHM,CFG_SECURE_DATA_PATH)) 1362