1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20CROSS_COMPILE ?= arm-linux-gnueabihf- 21CROSS_COMPILE32 ?= $(CROSS_COMPILE) 22CROSS_COMPILE64 ?= aarch64-linux-gnu- 23COMPILER ?= gcc 24 25# For convenience 26ifdef CFLAGS 27CFLAGS32 ?= $(CFLAGS) 28CFLAGS64 ?= $(CFLAGS) 29endif 30 31# Compiler warning level. 32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 33WARNS ?= 3 34 35# Path to the Python interpreter used by the build system. 36# This variable is set to the default python3 interpreter in the user's 37# path. But build environments that require more explicit control can 38# set the path to a specific interpreter through this variable. 39PYTHON3 ?= python3 40 41# Define DEBUG=1 to compile without optimization (forces -O0) 42# DEBUG=1 43ifeq ($(DEBUG),1) 44# For backwards compatibility 45$(call force,CFG_CC_OPT_LEVEL,0) 46$(call force,CFG_DEBUG_INFO,y) 47endif 48 49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 50# Optimize for size by default, usually gives good performance too. 51CFG_CC_OPT_LEVEL ?= s 52 53# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 54CFG_DEBUG_INFO ?= y 55 56# If y, enable debug features of the TEE core (assertions and lock checks 57# are enabled, panic and assert messages are more verbose, data and prefetch 58# aborts show a stack dump). When disabled, the NDEBUG directive is defined 59# so assertions are disabled. 60CFG_TEE_CORE_DEBUG ?= y 61 62# Log levels for the TEE core. Defines which core messages are displayed 63# on the secure console. Disabling core log (level set to 0) also disables 64# logs from the TAs. 65# 0: none 66# 1: error 67# 2: error + info 68# 3: error + info + debug 69# 4: error + info + debug + flow 70CFG_TEE_CORE_LOG_LEVEL ?= 2 71 72# TA log level 73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 75# when the TA is built. 76CFG_TEE_TA_LOG_LEVEL ?= 1 77 78# TA enablement 79# When defined to "y", TA traces are output according to 80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 81CFG_TEE_CORE_TA_TRACE ?= y 82 83# If y, enable the memory leak detection feature in the bget memory allocator. 84# When this feature is enabled, calling mdbg_check(1) will print a list of all 85# the currently allocated buffers and the location of the allocation (file and 86# line number). 87# Note: make sure the log level is high enough for the messages to show up on 88# the secure console! For instance: 89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 90# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 91# - To debug TEE core allocations: build OP-TEE with: 92# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 93CFG_TEE_CORE_MALLOC_DEBUG ?= n 94CFG_TEE_TA_MALLOC_DEBUG ?= n 95# Prints an error message and dumps the stack on failed memory allocations 96# using malloc() and friends. 97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 98 99# Mask to select which messages are prefixed with long debugging information 100# (severity, core ID, thread ID, component name, function name, line number) 101# based on the message level. If BIT(level) is set, the long prefix is shown. 102# Otherwise a short prefix is used (severity and component name only). 103# Levels: 0=none 1=error 2=info 3=debug 4=flow 104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 105 106# PRNG configuration 107# If CFG_WITH_SOFTWARE_PRNG is enabled, crypto provider provided 108# software PRNG implementation is used. 109# Otherwise, you need to implement hw_get_random_bytes() for your platform 110CFG_WITH_SOFTWARE_PRNG ?= y 111 112# Number of threads 113CFG_NUM_THREADS ?= 2 114 115# API implementation version 116CFG_TEE_API_VERSION ?= GPD-1.1-dev 117 118# Implementation description (implementation-dependent) 119CFG_TEE_IMPL_DESCR ?= OPTEE 120 121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 122# World? 123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 124 125# The following values are not extracted from the "git describe" output because 126# we might be outside of a Git environment, or the tree may have been cloned 127# with limited depth not including any tag, so there is really no guarantee 128# that TEE_IMPL_VERSION contains the major and minor revision numbers. 129CFG_OPTEE_REVISION_MAJOR ?= 3 130CFG_OPTEE_REVISION_MINOR ?= 21 131CFG_OPTEE_REVISION_EXTRA ?= 132 133# Trusted OS implementation version 134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 135 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 136ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y) 137TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0) 138else 139TEE_IMPL_GIT_SHA1 := 0x0 140endif 141 142# Trusted OS implementation manufacturer name 143CFG_TEE_MANUFACTURER ?= LINARO 144 145# Trusted firmware version 146CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 147 148# Trusted OS implementation manufacturer name 149CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 150 151# Rich Execution Environment (REE) file system support: normal world OS 152# provides the actual storage. 153# This is the default FS when enabled (i.e., the one used when 154# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 155CFG_REE_FS ?= y 156 157# RPMB file system support 158CFG_RPMB_FS ?= n 159 160# Enable roll-back protection of REE file system using RPMB. 161# Roll-back protection only works if CFG_RPMB_FS = y. 162CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 163$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 164 165# Device identifier used when CFG_RPMB_FS = y. 166# The exact meaning of this value is platform-dependent. On Linux, the 167# tee-supplicant process will open /dev/mmcblk<id>rpmb 168CFG_RPMB_FS_DEV_ID ?= 0 169 170# This config variable determines the number of entries read in from RPMB at 171# once whenever a function traverses the RPMB FS. Increasing the default value 172# has the following consequences: 173# - More memory required on heap. A single FAT entry currently has a size of 174# 256 bytes. 175# - Potentially significant speed-ups for RPMB I/O. Depending on how many 176# entries a function needs to traverse, the number of time-consuming RPMB 177# read-in operations can be reduced. 178# Chosing a proper value is both platform- (available memory) and use-case- 179# dependent (potential number of FAT fs entries), so overwrite in platform 180# config files 181CFG_RPMB_FS_RD_ENTRIES ?= 8 182 183# Enables caching of FAT FS entries when set to a value greater than zero. 184# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 185# entries. The cache is populated when FAT FS entries are initially read in. 186# When traversing the FAT FS entries, we read from the cache instead of reading 187# in the entries from RPMB storage. Consequently, when a FAT FS entry is 188# written, the cache is updated. In scenarios where an estimate of the number 189# of FAT FS entries can be made, the cache may be specifically tailored to 190# store all entries. The caching can improve RPMB I/O at the cost 191# of additional memory. 192# Without caching, we temporarily require 193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 194# while traversing the FAT FS (e.g. in read_fat). 195# For example 8*256 bytes = 2kB while in read_fat. 196# With caching, we constantly require up to 197# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 198# depending on how many elements are in the cache, and additional temporary 199# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 200# in case the cache is too small to hold all elements when traversing. 201CFG_RPMB_FS_CACHE_ENTRIES ?= 0 202 203# Print RPMB data frames sent to and received from the RPMB device 204CFG_RPMB_FS_DEBUG_DATA ?= n 205 206# Clear RPMB content at cold boot 207CFG_RPMB_RESET_FAT ?= n 208 209# Use a hard coded RPMB key instead of deriving it from the platform HUK 210CFG_RPMB_TESTKEY ?= n 211 212# Enables RPMB key programming by the TEE, in case the RPMB partition has not 213# been configured yet. 214# !!! Security warning !!! 215# Do *NOT* enable this in product builds, as doing so would allow the TEE to 216# leak the RPMB key. 217# This option is useful in the following situations: 218# - Testing 219# - RPMB key provisioning in a controlled environment (factory setup) 220CFG_RPMB_WRITE_KEY ?= n 221 222_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 223 224# Signing key for OP-TEE TA's 225# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 226# key and then set TA_PUBLIC_KEY to match public key from the HSM. 227# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 228TA_SIGN_KEY ?= keys/default_ta.pem 229TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 230 231# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used 232# to verify a TA instead. To sign a TA using a previously prepared subkey 233# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS. It is 234# typically used by assigning the following in the TA Makefile: 235# BINARY = <TA-uuid-string> 236# TA_SIGN_KEY = subkey.pem 237# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta 238# TA_SUBKEY_DEPS = subkey.bin 239# See the documentation for more details on subkeys. 240 241# Include lib/libutils/isoc in the build? Most platforms need this, but some 242# may not because they obtain the isoc functions from elsewhere 243CFG_LIBUTILS_WITH_ISOC ?= y 244 245# Enables floating point support for user TAs 246# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 247# hard-float is basically a super set of soft-float. Hard-float 248# requires all the support routines provided for soft-float, but the 249# compiler may choose to optimize to not use some of them and use 250# the floating-point registers instead. 251# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 252# nothing with ` -mgeneral-regs-only`) 253# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 254CFG_TA_FLOAT_SUPPORT ?= y 255 256# Stack unwinding: print a stack dump to the console on core or TA abort, or 257# when a TA panics. 258# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 259# unwound (not paged TAs, however). 260# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 261# this option will increase the size of the 32-bit TEE binary by a few KB. 262# Similarly, TAs have to be compiled with -funwind-tables (default when the 263# option is set) otherwise they can't be unwound. 264# Warning: since the unwind sequence for user-mode (TA) code is implemented in 265# the privileged layer of OP-TEE, enabling this feature will weaken the 266# user/kernel isolation. Therefore it should be disabled in release builds. 267ifeq ($(CFG_TEE_CORE_DEBUG),y) 268CFG_UNWIND ?= y 269endif 270 271# Enable support for dynamically loaded user TAs 272CFG_WITH_USER_TA ?= y 273 274# Build user TAs included in this source tree 275CFG_BUILD_IN_TREE_TA ?= y 276 277# Choosing the architecture(s) of user-mode libraries (used by TAs) 278# 279# Platforms may define a list of supported architectures for user-mode code 280# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 281# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 282# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 283# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 284# The first entry in $(supported-ta-targets) has a special role, see 285# CFG_USER_TA_TARGET_<ta-name> below. 286# 287# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 288# change the order of the values. 289# 290# The list of TA architectures is ultimately stored in $(ta-targets). 291 292# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 293# defined, selects the unique TA architecture mode for building the in-tree TA 294# <ta-name>. Can be either ta_arm32 or ta_arm64. 295# By default, in-tree TAs are built using the first architecture specified in 296# $(ta-targets). 297 298# Address Space Layout Randomization for user-mode Trusted Applications 299# 300# When this flag is enabled, the ELF loader will introduce a random offset 301# when mapping the application in user space. ASLR makes the exploitation of 302# memory corruption vulnerabilities more difficult. 303CFG_TA_ASLR ?= y 304 305# How much ASLR may shift the base address (in pages). The base address is 306# randomly shifted by an integer number of pages comprised between these two 307# values. Bigger ranges are more secure because they make the addresses harder 308# to guess at the expense of using more memory for the page tables. 309CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 310CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 311 312# Address Space Layout Randomization for TEE Core 313# 314# When this flag is enabled, the early init code will introduce a random 315# offset when mapping TEE Core. ASLR makes the exploitation of memory 316# corruption vulnerabilities more difficult. 317CFG_CORE_ASLR ?= y 318 319# Stack Protection for TEE Core 320# This flag enables the compiler stack protection mechanisms -fstack-protector. 321# It will check the stack canary value before returning from a function to 322# prevent buffer overflow attacks. Stack protector canary logic will be added 323# for vulnerable functions that contain: 324# - A character array larger than 8 bytes. 325# - An 8-bit integer array larger than 8 bytes. 326# - A call to alloca() with either a variable size or a constant size bigger 327# than 8 bytes. 328CFG_CORE_STACK_PROTECTOR ?= n 329# This enable stack protector flag -fstack-protector-strong. Stack protector 330# canary logic will be added for vulnerable functions that contain: 331# - An array of any size and type. 332# - A call to alloca(). 333# - A local variable that has its address taken. 334CFG_CORE_STACK_PROTECTOR_STRONG ?= y 335# This enable stack protector flag -fstack-protector-all. Stack protector canary 336# logic will be added to all functions regardless of their vulnerability. 337CFG_CORE_STACK_PROTECTOR_ALL ?= n 338# Stack Protection for TA 339CFG_TA_STACK_PROTECTOR ?= n 340CFG_TA_STACK_PROTECTOR_STRONG ?= y 341CFG_TA_STACK_PROTECTOR_ALL ?= n 342 343_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \ 344 CFG_CORE_STACK_PROTECTOR_STRONG \ 345 CFG_CORE_STACK_PROTECTOR_ALL) 346_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \ 347 CFG_TA_STACK_PROTECTOR_STRONG \ 348 CFG_TA_STACK_PROTECTOR_ALL) 349 350# Load user TAs from the REE filesystem via tee-supplicant 351CFG_REE_FS_TA ?= y 352 353# Pre-authentication of TA binaries loaded from the REE filesystem 354# 355# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 356# "Secure DDR" pool, check the signature, then process the file only if it is 357# valid. 358# - If disabled: hash the binaries as they are being processed and verify the 359# signature as a last step. 360CFG_REE_FS_TA_BUFFERED ?= n 361$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 362 363# When CFG_REE_FS=y and CFG_RPMB_FS=y: 364# Allow secure storage in the REE FS to be entirely deleted without causing 365# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 366# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 367# can be used to reset the secure storage to a clean, empty state. 368# Typically used for testing only since it weakens storage security. 369CFG_REE_FS_ALLOW_RESET ?= n 370 371# Support for loading user TAs from a special section in the TEE binary. 372# Such TAs are available even before tee-supplicant is available (hence their 373# name), but note that many services exported to TAs may need tee-supplicant, 374# so early use is limited to a subset of the TEE Internal Core API (crypto...) 375# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 376# file(s). For example: 377# $ make ... \ 378# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 379# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 380# Typical build steps: 381# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 382# # headers, makefiles), ready to build TAs. 383# # CFG_EARLY_TA=y is optional, it prevents 384# # later library recompilations. 385# <build some TAs> 386# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 387# 388# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 389# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 390# <name-of-ta>/<uuid> 391# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 392ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 393$(call force,CFG_EARLY_TA,y) 394else 395CFG_EARLY_TA ?= n 396endif 397 398ifeq ($(CFG_EARLY_TA),y) 399$(call force,CFG_EMBEDDED_TS,y) 400endif 401 402ifneq ($(SP_PATHS),) 403$(call force,CFG_EMBEDDED_TS,y) 404else 405CFG_SECURE_PARTITION ?= n 406endif 407 408ifeq ($(CFG_SECURE_PARTITION),y) 409$(call force,CFG_EMBEDDED_TS,y) 410endif 411 412ifeq ($(CFG_EMBEDDED_TS),y) 413$(call force,CFG_ZLIB,y) 414endif 415 416# By default the early TAs are compressed in the TEE binary, it is possible to 417# not compress them with CFG_EARLY_TA_COMPRESS=n 418CFG_EARLY_TA_COMPRESS ?= y 419 420# Enable paging, requires SRAM, can't be enabled by default 421CFG_WITH_PAGER ?= n 422 423# Use the pager for user TAs 424CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 425 426# If paging of user TAs, that is, R/W paging default to enable paging of 427# TAG and IV in order to reduce heap usage. 428CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 429 430# Runtime lock dependency checker: ensures that a proper locking hierarchy is 431# used in the TEE core when acquiring and releasing mutexes. Any violation will 432# cause a panic as soon as the invalid locking condition is detected. If 433# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 434# records the call stacks when locks are taken, and prints them when a 435# potential deadlock is found. 436# Expect a significant performance impact when enabling this. 437CFG_LOCKDEP ?= n 438CFG_LOCKDEP_RECORD_STACK ?= y 439 440# BestFit algorithm in bget reduces the fragmentation of the heap when running 441# with the pager enabled or lockdep 442CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 443 444# Enable support for detected undefined behavior in C 445# Uses a lot of memory, can't be enabled by default 446CFG_CORE_SANITIZE_UNDEFINED ?= n 447 448# Enable Kernel Address sanitizer, has a huge performance impact, uses a 449# lot of memory and need platform specific adaptations, can't be enabled by 450# default 451CFG_CORE_SANITIZE_KADDRESS ?= n 452 453# Add stack guards before/after stacks and periodically check them 454CFG_WITH_STACK_CANARIES ?= y 455 456# Use compiler instrumentation to troubleshoot stack overflows. 457# When enabled, most C functions check the stack pointer against the current 458# stack limits on entry and panic immediately if it is out of range. 459CFG_CORE_DEBUG_CHECK_STACKS ?= n 460 461# Use when the default stack allocations are not sufficient. 462CFG_STACK_THREAD_EXTRA ?= 0 463CFG_STACK_TMP_EXTRA ?= 0 464 465# Device Tree support 466# 467# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 468# device tree blob (DTB) parsing from the core. 469# 470# When CFG_DT is enabled, the TEE _start function expects to find 471# the address of a DTB in register X2/R2 provided by the early boot stage 472# or value 0 if boot stage provides no DTB. 473# 474# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 475# and the external device tree is expected to be used/modified. Its value 476# defaults to CFG_DT. 477# 478# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 479# be in the secure memory. 480# 481# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 482# relative path of a DTS file located in core/arch/$(ARCH)/dts. 483# The DTS file is compiled into a DTB file which content is embedded in a 484# read-only section of the core. 485ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 486CFG_EMBED_DTB ?= y 487endif 488ifeq ($(CFG_EMBED_DTB),y) 489$(call force,CFG_DT,y) 490endif 491CFG_EMBED_DTB ?= n 492CFG_DT ?= n 493CFG_EXTERNAL_DT ?= $(CFG_DT) 494CFG_MAP_EXT_DT_SECURE ?= n 495ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 496$(call force,CFG_DT,y) 497endif 498 499# Maximum size of the Device Tree Blob, has to be large enough to allow 500# editing of the supplied DTB. 501CFG_DTB_MAX_SIZE ?= 0x10000 502 503# Maximum size of the init info data passed to Secure Partitions. 504CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 505 506# Device Tree Overlay support. 507# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 508# external DTB. The overlay is created when no valid DTB overlay is found. 509# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 510# DTB location. 511# External DTB location (physical address) is provided either by boot 512# argument arg2 or from CFG_DT_ADDR if defined. 513# A subsequent boot stage can then merge the generated overlay DTB into a main 514# DTB using the standard fdt_overlay_apply() method. 515CFG_EXTERNAL_DTB_OVERLAY ?= n 516CFG_GENERATE_DTB_OVERLAY ?= n 517 518ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 519$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 520endif 521_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 522 CFG_GENERATE_DTB_OVERLAY) 523 524# All embedded tests are supposed to be disabled by default, this flag 525# is used to control the default value of all other embedded tests 526CFG_ENABLE_EMBEDDED_TESTS ?= n 527 528# Enable core self tests and related pseudo TAs 529CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 530 531# Compiles bget_main_test() to be called from a test TA 532CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 533 534# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedb DT driver probing tests. 535# This also requires embeddeding a DTB with expected content. 536# Defautl disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 537# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 538CFG_DT_DRIVER_EMBEDDED_TEST ?= n 539ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 540CFG_DRIVERS_CLK ?= y 541CFG_DRIVERS_RSTCTRL ?= y 542CFG_DRIVERS_CLK_EARLY_PROBE ?= n 543$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 544endif 545 546# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 547# parsing in the embedded DTB for driver probing. The alternative is 548# an exploration based on compatible drivers found. It is default disabled. 549CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 550 551# This option enables OP-TEE to respond to SMP boot request: the Rich OS 552# issues this to request OP-TEE to release secondaries cores out of reset, 553# with specific core number and non-secure entry address. 554CFG_BOOT_SECONDARY_REQUEST ?= n 555 556# Default heap size for Core, 64 kB 557CFG_CORE_HEAP_SIZE ?= 65536 558 559# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION 560# is enabled 561CFG_CORE_NEX_HEAP_SIZE ?= 16384 562 563# TA profiling. 564# When this option is enabled, OP-TEE can execute Trusted Applications 565# instrumented with GCC's -pg flag and will output profiling information 566# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 567# tee-supplicant) 568# Note: this does not work well with shared libraries at the moment for a 569# couple of reasons: 570# 1. The profiling code assumes a unique executable section in the TA VA space. 571# 2. The code used to detect at run time if the TA is intrumented assumes that 572# the TA is linked statically. 573CFG_TA_GPROF_SUPPORT ?= n 574 575# TA function tracing. 576# When this option is enabled, OP-TEE can execute Trusted Applications 577# instrumented with GCC's -pg flag and will output function tracing 578# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is 579# defined in tee-supplicant) 580CFG_FTRACE_SUPPORT ?= n 581 582# How to make room when the function tracing buffer is full? 583# 'shift': shift the previously stored data by the amount needed in order 584# to always keep the latest logs (slower, especially with big buffer sizes) 585# 'wrap': discard the previous data and start at the beginning of the buffer 586# again (fast, but can result in a mostly empty buffer) 587# 'stop': stop logging new data 588CFG_FTRACE_BUF_WHEN_FULL ?= shift 589$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap) 590$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y) 591 592# Function tracing: unit to be used when displaying durations 593# 0: always display durations in microseconds 594# >0: if duration is greater or equal to the specified value (in microseconds), 595# display it in milliseconds 596CFG_FTRACE_US_MS ?= 10000 597 598# Core syscall function tracing. 599# When this option is enabled, OP-TEE core is instrumented with GCC's 600# -pg flag and will output syscall function graph in user TA ftrace 601# buffer 602CFG_SYSCALL_FTRACE ?= n 603$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 604 605# Enable to compile user TA libraries with profiling (-pg). 606# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 607CFG_ULIBS_MCOUNT ?= n 608# Profiling/tracing of syscall wrapper (utee_*) 609CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 610 611ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 612ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 613$(error Cannot instrument user libraries if user mode profiling is disabled) 614endif 615endif 616 617# Build libutee, libutils, libmbedtls as shared libraries. 618# - Static libraries are still generated when this is enabled, but TAs will use 619# the shared libraries unless explicitly linked with the -static flag. 620# - Shared libraries are made of two files: for example, libutee is 621# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 622# is a totally standard shared object, and should be used to link against. 623# The '.ta' file is a signed version of the '.so' and should be installed 624# in the same way as TAs so that they can be found at runtime. 625CFG_ULIBS_SHARED ?= n 626 627ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 628$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 629endif 630 631# CFG_GP_SOCKETS 632# Enable Global Platform Sockets support 633CFG_GP_SOCKETS ?= y 634 635# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 636# invocation parameters referring to specific secure memories). 637CFG_SECURE_DATA_PATH ?= n 638 639# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 640# TA binaries are stored encrypted in the REE FS and are protected by 641# metadata in secure storage. 642CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 643$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 644 645# Enable the pseudo TA that managages TA storage in secure storage 646CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 647$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 648 649# Enable the pseudo TA for misc. auxilary services, extending existing 650# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 651# pool etc...) 652CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 653$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 654 655# Enable the pseudo TA for enumeration of TEE based devices for the normal 656# world OS. 657CFG_DEVICE_ENUM_PTA ?= y 658 659# The attestation pseudo TA provides an interface to request measurements of 660# a TA or the TEE binary. 661CFG_ATTESTATION_PTA ?= n 662$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 663 664# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 665# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 666# note that such a low value is not secure. 667# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 668# https://tools.ietf.org/html/rfc8017#section-9.1.1 669# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 670# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 671CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 672 673# Define the number of cores per cluster used in calculating core position. 674# The cluster number is shifted by this value and added to the core ID, 675# so its value represents log2(cores/cluster). 676# Default is 2**(2) = 4 cores per cluster. 677CFG_CORE_CLUSTER_SHIFT ?= 2 678 679# Define the number of threads per core used in calculating processing 680# element's position. The core number is shifted by this value and added to 681# the thread ID, so its value represents log2(threads/core). 682# Default is 2**(0) = 1 threads per core. 683CFG_CORE_THREAD_SHIFT ?= 0 684 685# Enable support for dynamic shared memory (shared memory anywhere in 686# non-secure memory). 687CFG_CORE_DYN_SHM ?= y 688 689# Enable support for reserved shared memory (shared memory in a carved out 690# memory area). 691CFG_CORE_RESERVED_SHM ?= y 692 693# Enables support for larger physical addresses, that is, it will define 694# paddr_t as a 64-bit type. 695CFG_CORE_LARGE_PHYS_ADDR ?= n 696 697# Define the maximum size, in bits, for big numbers in the Internal Core API 698# Arithmetical functions. This does *not* influence the key size that may be 699# manipulated through the Cryptographic API. 700# Set this to a lower value to reduce the TA memory footprint. 701CFG_TA_BIGNUM_MAX_BITS ?= 2048 702 703# Define the maximum size, in bits, for big numbers in the TEE core (privileged 704# layer). 705# This value is an upper limit for the key size in any cryptographic algorithm 706# implemented by the TEE core. 707# Set this to a lower value to reduce the memory footprint. 708CFG_CORE_BIGNUM_MAX_BITS ?= 4096 709 710# Not used since libmpa was removed. Force the values to catch build scripts 711# that would set = n. 712$(call force,CFG_TA_MBEDTLS_MPI,y) 713$(call force,CFG_TA_MBEDTLS,y) 714 715# Compile the TA library mbedTLS with self test functions, the functions 716# need to be called to test anything 717CFG_TA_MBEDTLS_SELF_TEST ?= y 718 719# By default use tomcrypt as the main crypto lib providing an implementation 720# for the API in <crypto/crypto.h> 721# CFG_CRYPTOLIB_NAME is used as libname and 722# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 723# 724# It's also possible to configure to use mbedtls instead of tomcrypt. 725# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 726# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 727CFG_CRYPTOLIB_NAME ?= tomcrypt 728CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 729 730# Not used since libmpa was removed. Force the value to catch build scripts 731# that would set = n. 732$(call force,CFG_CORE_MBEDTLS_MPI,y) 733 734# Enable virtualization support. OP-TEE will not work without compatible 735# hypervisor if this option is enabled. 736CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION) 737CFG_NS_VIRTUALIZATION ?= n 738 739ifeq ($(CFG_NS_VIRTUALIZATION),y) 740$(call force,CFG_CORE_RODATA_NOEXEC,y) 741$(call force,CFG_CORE_RWDATA_NOEXEC,y) 742 743# Default number of virtual guests 744CFG_VIRT_GUEST_COUNT ?= 2 745endif 746 747# Enables backwards compatible derivation of RPMB and SSK keys 748CFG_CORE_HUK_SUBKEY_COMPAT ?= y 749 750# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 751# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 752CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 753 754# Compress and encode conf.mk into the TEE core, and show the encoded string on 755# boot (with severity TRACE_INFO). 756CFG_SHOW_CONF_ON_BOOT ?= n 757 758# Enables support for passing a TPM Event Log stored in secure memory 759# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 760# taken before the service was up and running. 761CFG_CORE_TPM_EVENT_LOG ?= n 762 763# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 764# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 765# 766# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 767# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 768# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 769# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 770# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 771# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 772# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 773# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 774CFG_SCMI_MSG_DRIVERS ?= n 775ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 776CFG_SCMI_MSG_CLOCK ?= n 777CFG_SCMI_MSG_RESET_DOMAIN ?= n 778CFG_SCMI_MSG_SHM_MSG ?= n 779CFG_SCMI_MSG_SMT ?= n 780CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 781CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 782CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 783CFG_SCMI_MSG_THREAD_ENTRY ?= n 784CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 785$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 786$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 787$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 788ifeq ($(CFG_SCMI_MSG_SMT),y) 789_CFG_SCMI_PTA_SMT_HEADER := y 790endif 791ifeq ($(CFG_SCMI_MSG_SHM_MSG),y) 792_CFG_SCMI_PTA_MSG_HEADER := y 793endif 794endif 795 796# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation 797# from SCP-firmware package as an built-in SCMI stack in core. This 798# configuration mandates target product identifier is configured with 799# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with 800# CFG_SCP_FIRMWARE. 801CFG_SCMI_SCPFW ?= n 802 803ifeq ($(CFG_SCMI_SCPFW),y) 804$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW) 805ifeq (,$(CFG_SCMI_SCPFW_PRODUCT)) 806$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration) 807endif 808ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt)) 809$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration) 810endif 811endif #CFG_SCMI_SCPFW 812 813ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y) 814$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive) 815endif 816 817# Enable SCMI PTA interface for REE SCMI agents 818CFG_SCMI_PTA ?= n 819ifeq ($(CFG_SCMI_PTA),y) 820_CFG_SCMI_PTA_SMT_HEADER ?= n 821_CFG_SCMI_PTA_MSG_HEADER ?= n 822endif 823 824ifneq ($(CFG_STMM_PATH),) 825$(call force,CFG_WITH_STMM_SP,y) 826else 827CFG_WITH_STMM_SP ?= n 828endif 829ifeq ($(CFG_WITH_STMM_SP),y) 830$(call force,CFG_ZLIB,y) 831endif 832 833# When enabled checks that buffers passed to the GP Internal Core API 834# comply with the rules added as annotations as part of the definition of 835# the API. For example preventing buffers in non-secure shared memory when 836# not allowed. 837CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 838 839# When enabled accepts the DES key sizes excluding parity bits as in 840# the GP Internal API Specification v1.0 841CFG_COMPAT_GP10_DES ?= y 842 843# Defines a limit for many levels TAs may call each others. 844CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 845 846# Pseudo-TA to export hardware RNG output to Normal World 847# RNG characteristics are platform specific 848CFG_HWRNG_PTA ?= n 849ifeq ($(CFG_HWRNG_PTA),y) 850# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 851CFG_HWRNG_RATE ?= 0 852# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 853ifeq (,$(CFG_HWRNG_QUALITY)) 854$(error CFG_HWRNG_QUALITY not defined) 855endif 856endif 857 858# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 859# shared memory for each secure thread. When disabled, RPC shared 860# memory is released once the secure thread has completed is execution. 861ifeq ($(CFG_WITH_PAGER),y) 862CFG_PREALLOC_RPC_CACHE ?= n 863endif 864CFG_PREALLOC_RPC_CACHE ?= y 865 866# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 867# This clock framework allows to describe clock tree and provides functions to 868# get and configure the clocks. 869# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 870# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 871# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 872CFG_DRIVERS_CLK ?= n 873CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 874CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 875CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 876 877$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 878$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 879 880# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 881# OP-TEE core to provide reset controls on subsystems of the devices. 882CFG_DRIVERS_RSTCTRL ?= n 883 884# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support. 885CFG_DRIVERS_I2C ?= n 886 887# The purpose of this flag is to show a print when booting up the device that 888# indicates whether the board runs a standard developer configuration or not. 889# A developer configuration doesn't necessarily has to be secure. The intention 890# is that the one making products based on OP-TEE should override this flag in 891# plat-xxx/conf.mk for the platform they're basing their products on after 892# they've finalized implementing stubbed functionality (see OP-TEE 893# documentation/Porting guidelines) as well as vendor specific security 894# configuration. 895CFG_WARN_INSECURE ?= y 896 897# Enables warnings for declarations mixed with statements 898CFG_WARN_DECL_AFTER_STATEMENT ?= y 899 900# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 901# mechanism to limit the set of locations to which computed branch instructions 902# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 903# that support it, enable this option. A GCC toolchain built with 904# --enable-standard-branch-protection is needed to use this option. 905CFG_CORE_BTI ?= n 906 907$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 908 909# To make use of BTI in user space libraries and TA's on CPU's that support it, 910# enable this option. 911CFG_TA_BTI ?= $(CFG_CORE_BTI) 912 913$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 914 915ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 916$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible) 917endif 918 919ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 920$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 921endif 922 923# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 924# and key access to memory. This is a hardware supported alternative to 925# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 926CFG_MEMTAG ?= n 927 928$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 929ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 930$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 931endif 932ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 933$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 934endif 935 936# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable enables support 937# for sending asynchronous notifications to normal world. Note that an 938# interrupt ID must be configurged by the platform too. Currently is only 939# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 940CFG_CORE_ASYNC_NOTIF ?= n 941 942$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 943 CFG_WITH_STATS)) 944 945# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 946# for signing and authenticating pointers against secret keys. These can 947# be used to mitigate ROP (Return oriented programming) attacks. This is 948# currently done by instructing the compiler to add paciasp/autiasp at the 949# begging and end of functions to sign and verify ELR. 950# 951# The CFG_CORE_PAUTH enables these instructions for the core parts 952# executing at EL1, with one secret key per thread and one secret key per 953# physical CPU. 954# 955# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 956# this option is enabled, TEE core will initialize secret keys per TA. 957CFG_CORE_PAUTH ?= n 958CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 959 960$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 961$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 962 963ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 964$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 965endif 966ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 967$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 968endif 969 970ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 971$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 972endif 973 974ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 975$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 976endif 977 978# Enable support for generic watchdog registration 979# This watchdog will then be usable by non-secure world through SMC calls. 980CFG_WDT ?= n 981 982# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 983# When enabled, CFG_WDT_SM_HANDLER_ID must be defined with a SMC ID 984CFG_WDT_SM_HANDLER ?= n 985 986$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 987ifeq (y-,$(CFG_WDT_SM_HANDLER)-$(CFG_WDT_SM_HANDLER_ID)) 988$(error CFG_WDT_SM_HANDLER_ID must be defined when enabling CFG_WDT_SM_HANDLER) 989endif 990 991# Allow using the udelay/mdelay function for platforms without ARM generic timer 992# extension. When set to 'n', the plat_get_freq() function must be defined by 993# the platform code 994CFG_CORE_HAS_GENERIC_TIMER ?= y 995 996# Enable RTC API 997CFG_DRIVERS_RTC ?= n 998 999# Enable PTA for RTC access from non-secure world 1000CFG_RTC_PTA ?= n 1001 1002# Enable TPM2 1003CFG_DRIVERS_TPM2 ?= n 1004CFG_DRIVERS_TPM2_MMIO ?= n 1005ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 1006CFG_CORE_TCG_PROVIDER ?= $(CFG_DRIVERS_TPM2) 1007endif 1008 1009# Enable the FF-A SPMC tests in xtests 1010CFG_SPMC_TESTS ?= n 1011 1012# Allocate the translation tables needed to map the S-EL0 application 1013# loaded 1014CFG_CORE_PREALLOC_EL0_TBLS ?= n 1015ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 1016$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 1017endif 1018 1019# User TA runtime context dump. 1020# When this option is enabled, OP-TEE provides a debug method for 1021# developer to dump user TA's runtime context, including TA's heap stats. 1022# Developer can open a stats PTA session and then invoke command 1023# STATS_CMD_TA_STATS to get the context of loaded TAs. 1024CFG_TA_STATS ?= n 1025 1026# Enables best effort mitigations against fault injected when the hardware 1027# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h 1028CFG_FAULT_MITIGATION ?= y 1029 1030# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note 1031# that this doesn't affect libutee itself, it's only the TAs compiled with 1032# this set that are affected. Each out-of-tree must set this if to enable 1033# compatibility with version v1.1 as the value of this variable is not 1034# preserved in the TA dev-kit. 1035CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n 1036 1037# Change supported HMAC key size range, from 64 to 1024. 1038# This is needed to pass AOSP Keymaster VTS tests: 1039# Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp 1040# Module: VtsHalKeymasterV3_0TargetTest 1041# Testcases: - PerInstance/SigningOperationsTest# 1042# - PerInstance/NewKeyGenerationTest# 1043# - PerInstance/ImportKeyTest# 1044# - PerInstance/EncryptionOperationsTest# 1045# - PerInstance/AttestationTest# 1046# Note that this violates GP requirements of HMAC size range. 1047CFG_HMAC_64_1024_RANGE ?= n 1048