xref: /optee_os/mk/config.mk (revision 574b1b2dbced9a237dd07e64d5b5e2bc31fbf28d)
1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20ifeq ($(ARCH),arm)
21CROSS_COMPILE ?= arm-linux-gnueabihf-
22# Don't cross-compile if building on aarch64 natively
23ifneq ($(shell uname -m),aarch64)
24CROSS_COMPILE64 ?= aarch64-linux-gnu-
25endif
26endif
27ifeq ($(ARCH),riscv)
28CROSS_COMPILE ?= riscv-linux-gnu-
29CROSS_COMPILE64 ?= riscv64-linux-gnu-
30endif
31CROSS_COMPILE32 ?= $(CROSS_COMPILE)
32COMPILER ?= gcc
33
34# For convenience
35ifdef CFLAGS
36CFLAGS32 ?= $(CFLAGS)
37CFLAGS64 ?= $(CFLAGS)
38endif
39
40# Compiler warning level.
41# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
42WARNS ?= 3
43
44# Path to the Python interpreter used by the build system.
45# This variable is set to the default python3 interpreter in the user's
46# path. But build environments that require more explicit control can
47# set the path to a specific interpreter through this variable.
48PYTHON3 ?= python3
49
50# Define DEBUG=1 to compile without optimization (forces -O0)
51# DEBUG=1
52ifeq ($(DEBUG),1)
53# For backwards compatibility
54$(call force,CFG_CC_OPT_LEVEL,0)
55$(call force,CFG_DEBUG_INFO,y)
56endif
57
58# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
59# Optimize for size by default, usually gives good performance too.
60CFG_CC_OPT_LEVEL ?= s
61
62# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
63CFG_DEBUG_INFO ?= y
64
65# If y, enable debug features of the TEE core (assertions and lock checks
66# are enabled, panic and assert messages are more verbose, data and prefetch
67# aborts show a stack dump). When disabled, the NDEBUG directive is defined
68# so assertions are disabled.
69CFG_TEE_CORE_DEBUG ?= y
70
71# Log levels for the TEE core. Defines which core messages are displayed
72# on the secure console. Disabling core log (level set to 0) also disables
73# logs from the TAs.
74# 0: none
75# 1: error
76# 2: error + info
77# 3: error + info + debug
78# 4: error + info + debug + flow
79CFG_TEE_CORE_LOG_LEVEL ?= 2
80
81# TA log level
82# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
83# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
84# when the TA is built.
85CFG_TEE_TA_LOG_LEVEL ?= 1
86
87# TA enablement
88# When defined to "y", TA traces are output according to
89# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
90CFG_TEE_CORE_TA_TRACE ?= y
91
92# If y, enable the memory leak detection feature in the bget memory allocator.
93# When this feature is enabled, calling mdbg_check(1) will print a list of all
94# the currently allocated buffers and the location of the allocation (file and
95# line number).
96# Note: make sure the log level is high enough for the messages to show up on
97# the secure console! For instance:
98# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
99#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
100# - To debug TEE core allocations: build OP-TEE with:
101#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
102CFG_TEE_CORE_MALLOC_DEBUG ?= n
103CFG_TEE_TA_MALLOC_DEBUG ?= n
104# Prints an error message and dumps the stack on failed memory allocations
105# using malloc() and friends.
106CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
107
108# Mask to select which messages are prefixed with long debugging information
109# (severity, core ID, thread ID, component name, function name, line number)
110# based on the message level. If BIT(level) is set, the long prefix is shown.
111# Otherwise a short prefix is used (severity and component name only).
112# Levels: 0=none 1=error 2=info 3=debug 4=flow
113CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
114
115# Number of threads
116CFG_NUM_THREADS ?= 2
117
118# API implementation version
119CFG_TEE_API_VERSION ?= GPD-1.1-dev
120
121# Implementation description (implementation-dependent)
122CFG_TEE_IMPL_DESCR ?= OPTEE
123
124# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
125# World?
126CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
127
128# The following values are not extracted from the "git describe" output because
129# we might be outside of a Git environment, or the tree may have been cloned
130# with limited depth not including any tag, so there is really no guarantee
131# that TEE_IMPL_VERSION contains the major and minor revision numbers.
132CFG_OPTEE_REVISION_MAJOR ?= 4
133CFG_OPTEE_REVISION_MINOR ?= 8
134CFG_OPTEE_REVISION_EXTRA ?=
135
136# Trusted OS implementation version
137TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
138		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA)
139
140# Trusted OS implementation manufacturer name
141CFG_TEE_MANUFACTURER ?= LINARO
142
143# Trusted firmware version
144CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
145
146# Trusted OS implementation manufacturer name
147CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
148
149# Rich Execution Environment (REE) file system support: normal world OS
150# provides the actual storage.
151# This is the default FS when enabled (i.e., the one used when
152# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
153CFG_REE_FS ?= y
154
155# CFG_REE_FS_HTREE_HASH_SIZE_COMPAT, when enabled, supports the legacy
156# REE FS hash tree tagging implementation that uses a truncated hash.
157# Be warned that disabling this config could break accesses to existing
158# REE FS content.
159CFG_REE_FS_HTREE_HASH_SIZE_COMPAT ?= y
160
161# RPMB file system support
162CFG_RPMB_FS ?= n
163
164# Enable roll-back protection of REE file system using RPMB.
165# Roll-back protection only works if CFG_RPMB_FS = y.
166CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS)
167$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS))
168
169# Device identifier used when CFG_RPMB_FS = y.
170# The exact meaning of this value is platform-dependent. On Linux, the
171# tee-supplicant process will open /dev/mmcblk<id>rpmb
172CFG_RPMB_FS_DEV_ID ?= 0
173
174# This config variable determines the number of entries read in from RPMB at
175# once whenever a function traverses the RPMB FS. Increasing the default value
176# has the following consequences:
177# - More memory required on heap. A single FAT entry currently has a size of
178#   256 bytes.
179# - Potentially significant speed-ups for RPMB I/O. Depending on how many
180#   entries a function needs to traverse, the number of time-consuming RPMB
181#   read-in operations can be reduced.
182# Chosing a proper value is both platform- (available memory) and use-case-
183# dependent (potential number of FAT fs entries), so overwrite in platform
184# config files
185CFG_RPMB_FS_RD_ENTRIES ?= 8
186
187# Enables caching of FAT FS entries when set to a value greater than zero.
188# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
189# entries. The cache is populated when FAT FS entries are initially read in.
190# When traversing the FAT FS entries, we read from the cache instead of reading
191# in the entries from RPMB storage. Consequently, when a FAT FS entry is
192# written, the cache is updated. In scenarios where an estimate of the number
193# of FAT FS entries can be made, the cache may be specifically tailored to
194# store all entries. The caching can improve RPMB I/O at the cost
195# of additional memory.
196# Without caching, we temporarily require
197# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
198# while traversing the FAT FS (e.g. in read_fat).
199# For example 8*256 bytes = 2kB while in read_fat.
200# With caching, we constantly require up to
201# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
202# depending on how many elements are in the cache, and additional temporary
203# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
204# in case the cache is too small to hold all elements when traversing.
205CFG_RPMB_FS_CACHE_ENTRIES ?= 0
206
207# Print RPMB data frames sent to and received from the RPMB device
208CFG_RPMB_FS_DEBUG_DATA ?= n
209
210# Clear RPMB content at cold boot
211CFG_RPMB_RESET_FAT ?= n
212
213# Use a hard coded RPMB key instead of deriving it from the platform HUK
214CFG_RPMB_TESTKEY ?= n
215
216# Enables RPMB key programming by the TEE, in case the RPMB partition has not
217# been configured yet.
218# !!! Security warning !!!
219# Do *NOT* enable this in product builds, as doing so would allow the TEE to
220# leak the RPMB key.
221# This option is useful in the following situations:
222# - Testing
223# - RPMB key provisioning in a controlled environment (factory setup)
224CFG_RPMB_WRITE_KEY ?= n
225
226# For the kernel driver to enable in-kernel RPMB routing it must know in
227# advance that OP-TEE supports it. Setting CFG_RPMB_ANNOUNCE_PROBE_CAP=y
228# will announce OP-TEE's capability for RPMB probing to the kernel and it
229# will use in-kernel RPMB routing, without it all RPMB commands will be
230# routed to tee-supplicant. This option is intended give some control over
231# how the RPMB commands are routed to simplify testing.
232CFG_RPMB_ANNOUNCE_PROBE_CAP ?= y
233
234_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
235
236# Signing key for OP-TEE TA's
237# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
238# key and then set TA_PUBLIC_KEY to match public key from the HSM.
239# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
240TA_SIGN_KEY ?= keys/default_ta.pem
241TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
242
243# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used
244# to verify a TA instead. To sign a TA using a previously prepared subkey
245# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS.  It is
246# typically used by assigning the following in the TA Makefile:
247# BINARY = <TA-uuid-string>
248# TA_SIGN_KEY = subkey.pem
249# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta
250# TA_SUBKEY_DEPS = subkey.bin
251# See the documentation for more details on subkeys.
252
253# Include lib/libutils/isoc in the build? Most platforms need this, but some
254# may not because they obtain the isoc functions from elsewhere
255CFG_LIBUTILS_WITH_ISOC ?= y
256
257# Include lib/libutils/compiler-rt in the build. Most platforms need this.
258# Provides some functions called "compiler builtins", which the compiler
259# may invoke to perform low-level operations such as long long division
260# etc. Such functions typically come with compiler runtime libraires (GCC
261# has libgcc, Clang has compiler-rt). OP-TEE often can't use them because
262# they may be Linux-specific or bring unwanted dependencies. Therefore,
263# this imports and builds only what's needed.
264CFG_LIBUTILS_WITH_COMPILER_RT ?= y
265
266# Enables floating point support for user TAs
267# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
268#	 hard-float is basically a super set of soft-float. Hard-float
269#	 requires all the support routines provided for soft-float, but the
270#	 compiler may choose to optimize to not use some of them and use
271#	 the floating-point registers instead.
272# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
273#	 nothing with ` -mgeneral-regs-only`)
274# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
275CFG_TA_FLOAT_SUPPORT ?= y
276
277# Stack unwinding: print a stack dump to the console on core or TA abort, or
278# when a TA panics.
279# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
280# unwound (not paged TAs, however).
281# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
282# this option will increase the size of the 32-bit TEE binary by a few KB.
283# Similarly, TAs have to be compiled with -funwind-tables (default when the
284# option is set) otherwise they can't be unwound.
285# Warning: since the unwind sequence for user-mode (TA) code is implemented in
286# the privileged layer of OP-TEE, enabling this feature will weaken the
287# user/kernel isolation. Therefore it should be disabled in release builds.
288ifeq ($(CFG_TEE_CORE_DEBUG),y)
289CFG_UNWIND ?= y
290endif
291
292# Enable support for dynamically loaded user TAs
293CFG_WITH_USER_TA ?= y
294
295# Build user TAs included in this source tree
296CFG_BUILD_IN_TREE_TA ?= y
297
298# Choosing the architecture(s) of user-mode libraries (used by TAs)
299#
300# Platforms may define a list of supported architectures for user-mode code
301# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
302# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
303# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
304# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
305# The first entry in $(supported-ta-targets) has a special role, see
306# CFG_USER_TA_TARGET_<ta-name> below.
307#
308# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
309# change the order of the values.
310#
311# The list of TA architectures is ultimately stored in $(ta-targets).
312
313# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
314# defined, selects the unique TA architecture mode for building the in-tree TA
315# <ta-name>. Can be either ta_arm32 or ta_arm64.
316# By default, in-tree TAs are built using the first architecture specified in
317# $(ta-targets).
318
319# Address Space Layout Randomization for user-mode Trusted Applications
320#
321# When this flag is enabled, the ELF loader will introduce a random offset
322# when mapping the application in user space. ASLR makes the exploitation of
323# memory corruption vulnerabilities more difficult.
324CFG_TA_ASLR ?= y
325
326# How much ASLR may shift the base address (in pages). The base address is
327# randomly shifted by an integer number of pages comprised between these two
328# values. Bigger ranges are more secure because they make the addresses harder
329# to guess at the expense of using more memory for the page tables.
330CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
331CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
332
333# Address Space Layout Randomization for TEE Core
334#
335# When this flag is enabled, the early init code will introduce a random
336# offset when mapping TEE Core. ASLR makes the exploitation of memory
337# corruption vulnerabilities more difficult.
338CFG_CORE_ASLR ?= y
339
340# Stack Protection for TEE Core
341# This flag enables the compiler stack protection mechanisms -fstack-protector.
342# It will check the stack canary value before returning from a function to
343# prevent buffer overflow attacks. Stack protector canary logic will be added
344# for vulnerable functions that contain:
345# - A character array larger than 8 bytes.
346# - An 8-bit integer array larger than 8 bytes.
347# - A call to alloca() with either a variable size or a constant size bigger
348#   than 8 bytes.
349CFG_CORE_STACK_PROTECTOR ?= n
350# This enable stack protector flag -fstack-protector-strong. Stack protector
351# canary logic will be added for vulnerable functions that contain:
352# - An array of any size and type.
353# - A call to alloca().
354# - A local variable that has its address taken.
355CFG_CORE_STACK_PROTECTOR_STRONG ?= y
356# This enable stack protector flag -fstack-protector-all. Stack protector canary
357# logic will be added to all functions regardless of their vulnerability.
358CFG_CORE_STACK_PROTECTOR_ALL ?= n
359# Stack Protection for TA
360CFG_TA_STACK_PROTECTOR ?= n
361CFG_TA_STACK_PROTECTOR_STRONG ?= y
362CFG_TA_STACK_PROTECTOR_ALL ?= n
363
364_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \
365						     CFG_CORE_STACK_PROTECTOR_STRONG \
366						     CFG_CORE_STACK_PROTECTOR_ALL)
367_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \
368						   CFG_TA_STACK_PROTECTOR_STRONG \
369						   CFG_TA_STACK_PROTECTOR_ALL)
370
371# Load user TAs from the REE filesystem via tee-supplicant
372CFG_REE_FS_TA ?= y
373
374# Pre-authentication of TA binaries loaded from the REE filesystem
375#
376# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
377#   "Secure DDR" pool, check the signature, then process the file only if it is
378#   valid.
379# - If disabled: hash the binaries as they are being processed and verify the
380#   signature as a last step.
381CFG_REE_FS_TA_BUFFERED ?= n
382$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
383
384# When CFG_REE_FS=y:
385# Allow secure storage in the REE FS to be entirely deleted without causing
386# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
387# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
388# can be used to reset the secure storage to a clean, empty state.
389# Intended to be used for testing only since it weakens storage security.
390# Warning: If enabled for release build then it will break rollback protection
391# of TAs and the entire REE FS secure storage.
392CFG_REE_FS_ALLOW_RESET ?= n
393
394# Support for loading user TAs from a special section in the TEE binary.
395# Such TAs are available even before tee-supplicant is available (hence their
396# name), but note that many services exported to TAs may need tee-supplicant,
397# so early use is limited to a subset of the TEE Internal Core API (crypto...)
398# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
399# file(s). For example:
400#   $ make ... \
401#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
402#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
403# Typical build steps:
404#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
405#                                    # headers, makefiles), ready to build TAs.
406#                                    # CFG_EARLY_TA=y is optional, it prevents
407#                                    # later library recompilations.
408#   <build some TAs>
409#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
410#
411# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
412# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
413# <name-of-ta>/<uuid>
414# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
415ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
416$(call force,CFG_EARLY_TA,y)
417else
418CFG_EARLY_TA ?= n
419endif
420
421ifeq ($(CFG_EARLY_TA),y)
422$(call force,CFG_EMBEDDED_TS,y)
423endif
424
425ifneq ($(SP_PATHS),)
426$(call force,CFG_EMBEDDED_TS,y)
427else
428CFG_SECURE_PARTITION ?= n
429endif
430
431ifeq ($(CFG_SECURE_PARTITION),y)
432$(call force,CFG_EMBEDDED_TS,y)
433endif
434
435ifeq ($(CFG_EMBEDDED_TS),y)
436$(call force,CFG_ZLIB,y)
437endif
438
439# By default the early TAs are compressed in the TEE binary, it is possible to
440# not compress them with CFG_EARLY_TA_COMPRESS=n
441CFG_EARLY_TA_COMPRESS ?= y
442
443# Enable paging, requires SRAM, can't be enabled by default
444CFG_WITH_PAGER ?= n
445
446# Use the pager for user TAs
447CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
448
449# If paging of user TAs, that is, R/W paging default to enable paging of
450# TAG and IV in order to reduce heap usage.
451CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
452
453# Runtime lock dependency checker: ensures that a proper locking hierarchy is
454# used in the TEE core when acquiring and releasing mutexes. Any violation will
455# cause a panic as soon as the invalid locking condition is detected. If
456# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
457# records the call stacks when locks are taken, and prints them when a
458# potential deadlock is found.
459# Expect a significant performance impact when enabling this.
460CFG_LOCKDEP ?= n
461CFG_LOCKDEP_RECORD_STACK ?= y
462
463# BestFit algorithm in bget reduces the fragmentation of the heap when running
464# with the pager enabled or lockdep
465CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
466
467# Enable support for detected undefined behavior in C
468# Uses a lot of memory, can't be enabled by default
469CFG_CORE_SANITIZE_UNDEFINED ?= n
470CFG_TA_SANITIZE_UNDEFINED ?= n
471
472# Enable Kernel Address sanitizer, has a huge performance impact, uses a
473# lot of memory and need platform specific adaptations, can't be enabled by
474# default
475CFG_CORE_SANITIZE_KADDRESS ?= n
476
477ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR))
478$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible)
479endif
480
481# Add stack guards before/after stacks and periodically check them
482CFG_WITH_STACK_CANARIES ?= y
483
484# Use compiler instrumentation to troubleshoot stack overflows.
485# When enabled, most C functions check the stack pointer against the current
486# stack limits on entry and panic immediately if it is out of range.
487CFG_CORE_DEBUG_CHECK_STACKS ?= n
488
489# Use when the default stack allocations are not sufficient.
490CFG_STACK_THREAD_EXTRA ?= 0
491CFG_STACK_TMP_EXTRA ?= 0
492
493# Device Tree support
494#
495# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
496# device tree blob (DTB) parsing from the core.
497#
498# When CFG_DT is enabled, the TEE _start function expects to find
499# the address of a DTB in register X2/R2 provided by the early boot stage
500# or value 0 if boot stage provides no DTB.
501#
502# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented
503# and the external device tree is expected to be used/modified. Its value
504# defaults to CFG_DT.
505#
506# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to
507# be in the secure memory.
508#
509# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
510# relative path of a DTS file located in core/arch/$(ARCH)/dts.
511# The DTS file is compiled into a DTB file which content is embedded in a
512# read-only section of the core.
513ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
514CFG_EMBED_DTB ?= y
515endif
516ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \
517		 $(CFG_CORE_EL3_SPMC)),y)
518$(call force,CFG_DT,y)
519endif
520CFG_EMBED_DTB ?= n
521CFG_DT ?= n
522CFG_EXTERNAL_DT ?= $(CFG_DT)
523CFG_MAP_EXT_DT_SECURE ?= n
524ifeq ($(CFG_MAP_EXT_DT_SECURE),y)
525$(call force,CFG_DT,y)
526endif
527
528# This option enables OP-TEE to support boot arguments handover via Transfer
529# List defined in Firmware Handoff specification.
530# Note: This is an experimental feature and incompatible ABI changes can be
531# expected. It should be off by default until Firmware Handoff specification
532# has a stable release.
533# This feature requires the support of Device Tree.
534CFG_TRANSFER_LIST ?= n
535
536# Maximum size of the Device Tree Blob, has to be large enough to allow
537# editing of the supplied DTB.
538CFG_DTB_MAX_SIZE ?= 0x10000
539
540# CFG_DT_CACHED_NODE_INFO, when enabled, parses the embedded DT at boot
541# time and caches some information to speed up retrieve of DT node data,
542# more specifically those for which libfdt parses the full DTB to find
543# the target node information.
544CFG_DT_CACHED_NODE_INFO ?= $(CFG_EMBED_DTB)
545$(eval $(call cfg-depends-all,CFG_DT_CACHED_NODE_INFO,CFG_EMBED_DTB))
546
547# Maximum size of the init info data passed to Secure Partitions.
548CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000
549
550# Device Tree Overlay support.
551# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
552# external DTB. The overlay is created when no valid DTB overlay is found.
553# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
554# DTB location.
555# External DTB location (physical address) is provided either by boot
556# argument arg2 or from CFG_DT_ADDR if defined.
557# A subsequent boot stage can then merge the generated overlay DTB into a main
558# DTB using the standard fdt_overlay_apply() method.
559CFG_EXTERNAL_DTB_OVERLAY ?= n
560CFG_GENERATE_DTB_OVERLAY ?= n
561
562ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
563$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
564endif
565_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
566			  CFG_GENERATE_DTB_OVERLAY)
567
568# All embedded tests are supposed to be disabled by default, this flag
569# is used to control the default value of all other embedded tests
570CFG_ENABLE_EMBEDDED_TESTS ?= n
571
572# Enable core self tests and related pseudo TAs
573CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
574# Embed transfer list support self test when enabled
575CFG_TRANSFER_LIST_TEST ?= $(call cfg-all-enabled,CFG_TRANSFER_LIST \
576			    CFG_TEE_CORE_EMBED_INTERNAL_TESTS)
577
578# Compiles bget_main_test() to be called from a test TA
579CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
580
581# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests.
582# This also requires embedding a DTB with expected content.
583# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers.
584# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n.
585CFG_DT_DRIVER_EMBEDDED_TEST ?= n
586ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
587CFG_DRIVERS_CLK ?= y
588CFG_DRIVERS_GPIO ?= y
589CFG_DRIVERS_RSTCTRL ?= y
590CFG_DRIVERS_CLK_EARLY_PROBE ?= n
591$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST)
592endif
593
594# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure
595# clients to retrieve debug and statistics information on core and loaded TAs.
596CFG_WITH_STATS ?= n
597
598# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode
599# parsing in the embedded DTB for driver probing. The alternative is
600# an exploration based on compatible drivers found. It is default disabled.
601CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n
602
603# This option enables OP-TEE to respond to SMP boot request: the Rich OS
604# issues this to request OP-TEE to release secondaries cores out of reset,
605# with specific core number and non-secure entry address.
606CFG_BOOT_SECONDARY_REQUEST ?= n
607
608# Default heap size for Core, 64 kB
609CFG_CORE_HEAP_SIZE ?= 65536
610
611# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION
612# is enabled
613CFG_CORE_NEX_HEAP_SIZE ?= 16384
614
615# TA profiling.
616# When this option is enabled, OP-TEE can execute Trusted Applications
617# instrumented with GCC's -pg flag and will output profiling information
618# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
619# tee-supplicant)
620# Note: this does not work well with shared libraries at the moment for a
621# couple of reasons:
622# 1. The profiling code assumes a unique executable section in the TA VA space.
623# 2. The code used to detect at run time if the TA is intrumented assumes that
624# the TA is linked statically.
625CFG_TA_GPROF_SUPPORT ?= n
626
627# TA function tracing.
628# When this option is enabled, OP-TEE can execute Trusted Applications
629# instrumented with GCC's -pg flag and will output function tracing
630# information for all functions compiled with -pg to
631# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant).
632CFG_FTRACE_SUPPORT ?= n
633
634# Core syscall function tracing.
635# When this option is enabled, OP-TEE core is instrumented with GCC's
636# -pg flag and will output syscall function graph in user TA ftrace
637# buffer
638CFG_SYSCALL_FTRACE ?= n
639$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
640
641# Enable to compile user TA libraries with profiling (-pg).
642# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
643CFG_ULIBS_MCOUNT ?= n
644# Profiling/tracing of syscall wrapper (utee_*)
645CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
646
647ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
648ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
649$(error Cannot instrument user libraries if user mode profiling is disabled)
650endif
651endif
652
653# Build libutee, libutils, libmbedtls as shared libraries.
654# - Static libraries are still generated when this is enabled, but TAs will use
655# the shared libraries unless explicitly linked with the -static flag.
656# - Shared libraries are made of two files: for example, libutee is
657#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
658#   is a totally standard shared object, and should be used to link against.
659#   The '.ta' file is a signed version of the '.so' and should be installed
660#   in the same way as TAs so that they can be found at runtime.
661CFG_ULIBS_SHARED ?= n
662
663ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
664$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
665endif
666
667# CFG_GP_SOCKETS
668# Enable Global Platform Sockets support
669CFG_GP_SOCKETS ?= y
670
671# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
672# invocation parameters referring to specific secure memories).
673CFG_SECURE_DATA_PATH ?= n
674
675# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
676# TA binaries are stored encrypted in the REE FS and are protected by
677# metadata in secure storage.
678CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
679$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
680
681# Enable the pseudo TA that managages TA storage in secure storage
682CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
683$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
684
685# Enable the pseudo TA for misc. auxilary services, extending existing
686# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
687# pool etc...)
688CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
689$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
690
691# Enable the pseudo TA for enumeration of TEE based devices for the normal
692# world OS.
693CFG_DEVICE_ENUM_PTA ?= y
694
695# The attestation pseudo TA provides an interface to request measurements of
696# a TA or the TEE binary.
697CFG_ATTESTATION_PTA ?= n
698$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE))
699
700# RSA key size (in bits) for the attestation PTA. Must be at least 528 given
701# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but
702# note that such a low value is not secure.
703# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and
704# https://tools.ietf.org/html/rfc8017#section-9.1.1
705#  emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66
706#  emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes
707CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072
708
709# Define the number of cores per cluster used in calculating core position.
710# The cluster number is shifted by this value and added to the core ID,
711# so its value represents log2(cores/cluster).
712# Default is 2**(2) = 4 cores per cluster.
713CFG_CORE_CLUSTER_SHIFT ?= 2
714
715# Define the number of threads per core used in calculating processing
716# element's position. The core number is shifted by this value and added to
717# the thread ID, so its value represents log2(threads/core).
718# Default is 2**(0) = 1 threads per core.
719CFG_CORE_THREAD_SHIFT ?= 0
720
721# Enable support for dynamic shared memory (shared memory anywhere in
722# non-secure memory).
723CFG_CORE_DYN_SHM ?= y
724
725# Enable support for reserved shared memory (shared memory in a carved out
726# memory area).
727CFG_CORE_RESERVED_SHM ?= y
728
729# Enables support for larger physical addresses, that is, it will define
730# paddr_t as a 64-bit type.
731CFG_CORE_LARGE_PHYS_ADDR ?= n
732
733# Define the maximum size, in bits, for big numbers in the Internal Core API
734# Arithmetical functions. This does *not* influence the key size that may be
735# manipulated through the Cryptographic API.
736# Set this to a lower value to reduce the TA memory footprint.
737CFG_TA_BIGNUM_MAX_BITS ?= 2048
738
739# Not used since libmpa was removed. Force the values to catch build scripts
740# that would set = n.
741$(call force,CFG_TA_MBEDTLS_MPI,y)
742$(call force,CFG_TA_MBEDTLS,y)
743
744# Compile the TA library mbedTLS with self test functions, the functions
745# need to be called to test anything
746CFG_TA_MBEDTLS_SELF_TEST ?= y
747
748# By default use tomcrypt as the main crypto lib providing an implementation
749# for the API in <crypto/crypto.h>
750# CFG_CRYPTOLIB_NAME is used as libname and
751# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
752#
753# It's also possible to configure to use mbedtls instead of tomcrypt.
754# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
755# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
756CFG_CRYPTOLIB_NAME ?= tomcrypt
757CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
758
759# Not used since libmpa was removed. Force the value to catch build scripts
760# that would set = n.
761$(call force,CFG_CORE_MBEDTLS_MPI,y)
762
763# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in
764# the non-secure world. OP-TEE will not work without a compatible hypervisor
765# in the non-secure world if this option is enabled.
766#
767# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is
768# deprecated as the configuration switch name was ambiguous regarding which
769# world has virtualization enabled.
770ifneq (undefined,$(flavor CFG_VIRTUALIZATION))
771$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead)
772CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION)
773ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION))
774$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION))
775endif
776endif # CFG_VIRTUALIZATION defined
777CFG_NS_VIRTUALIZATION ?= n
778
779ifeq ($(CFG_NS_VIRTUALIZATION),y)
780$(call force,CFG_CORE_RODATA_NOEXEC,y)
781$(call force,CFG_CORE_RWDATA_NOEXEC,y)
782
783# Default number of virtual guests
784CFG_VIRT_GUEST_COUNT ?= 2
785endif
786
787# Enables backwards compatible derivation of RPMB and SSK keys
788CFG_CORE_HUK_SUBKEY_COMPAT ?= y
789
790# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
791# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
792CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
793
794# Compress and encode conf.mk into the TEE core, and show the encoded string on
795# boot (with severity TRACE_INFO).
796CFG_SHOW_CONF_ON_BOOT ?= n
797
798# Enables support for passing a TPM Event Log stored in secure memory
799# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement
800# taken before the service was up and running.
801CFG_CORE_TPM_EVENT_LOG ?= n
802
803# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
804# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
805#
806# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
807# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
808# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers
809# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
810# CFG_SCMI_MSG_PERF_DOMAIN embeds SCMI performance domain management protocol
811# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory
812# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory
813# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory
814# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer
815CFG_SCMI_MSG_DRIVERS ?= n
816ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
817CFG_SCMI_MSG_CLOCK ?= n
818CFG_SCMI_MSG_RESET_DOMAIN ?= n
819CFG_SCMI_MSG_SHM_MSG ?= n
820CFG_SCMI_MSG_SMT ?= n
821CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n
822CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n
823CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n
824CFG_SCMI_MSG_THREAD_ENTRY ?= n
825CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
826CFG_SCMI_MSG_PERF_DOMAIN ?= n
827$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT))
828$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT))
829$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG))
830ifeq ($(CFG_SCMI_MSG_SMT),y)
831_CFG_SCMI_PTA_SMT_HEADER := y
832endif
833ifeq ($(CFG_SCMI_MSG_SHM_MSG),y)
834_CFG_SCMI_PTA_MSG_HEADER := y
835endif
836endif
837
838# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation
839# from SCP-firmware package as an built-in SCMI stack in core. This
840# configuration mandates target product identifier is configured with
841# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with
842# CFG_SCP_FIRMWARE.
843CFG_SCMI_SCPFW ?= n
844
845ifeq ($(CFG_SCMI_SCPFW),y)
846$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW)
847ifeq (,$(CFG_SCMI_SCPFW_PRODUCT))
848$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration)
849endif
850ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt))
851$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration)
852endif
853endif #CFG_SCMI_SCPFW
854
855# CFG_SCMI_SCPFW_FROM_DT, when enabled, calls scpfw_configure() function
856# in SCP-firmware that will retrieve resources in "scmi" fdt node.
857CFG_SCMI_SCPFW_FROM_DT ?= n
858$(eval $(call cfg-depends-all,CFG_SCMI_SCPFW_FROM_DT,CFG_SCMI_SCPFW CFG_EMBED_DTB))
859
860ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y)
861$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive)
862endif
863
864# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for
865# the platform SCMI server and implements the platform plat_scmi_clock_*()
866# functions.
867CFG_SCMI_MSG_USE_CLK ?= n
868$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS))
869
870# Enable SCMI PTA interface for REE SCMI agents
871CFG_SCMI_PTA ?= n
872ifeq ($(CFG_SCMI_PTA),y)
873_CFG_SCMI_PTA_SMT_HEADER ?= n
874_CFG_SCMI_PTA_MSG_HEADER ?= n
875endif
876
877ifneq ($(CFG_STMM_PATH),)
878$(call force,CFG_WITH_STMM_SP,y)
879$(call force,CFG_EFILIB,y)
880else
881CFG_WITH_STMM_SP ?= n
882endif
883ifeq ($(CFG_WITH_STMM_SP),y)
884$(call force,CFG_ZLIB,y)
885endif
886
887# When enabled checks that buffers passed to the GP Internal Core API
888# comply with the rules added as annotations as part of the definition of
889# the API. For example preventing buffers in non-secure shared memory when
890# not allowed.
891CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
892
893# When enabled accepts the DES key sizes excluding parity bits as in
894# the GP Internal API Specification v1.0
895CFG_COMPAT_GP10_DES ?= y
896
897# Defines a limit for many levels TAs may call each others.
898CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
899
900# Pseudo-TA to export hardware RNG output to Normal World
901# RNG characteristics are platform specific
902CFG_HWRNG_PTA ?= n
903ifeq ($(CFG_HWRNG_PTA),y)
904# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
905CFG_HWRNG_RATE ?= 0
906# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
907ifeq (,$(CFG_HWRNG_QUALITY))
908$(error CFG_HWRNG_QUALITY not defined)
909endif
910endif
911
912# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
913# shared memory for each secure thread. When disabled, RPC shared
914# memory is released once the secure thread has completed is execution.
915ifeq ($(CFG_WITH_PAGER),y)
916CFG_PREALLOC_RPC_CACHE ?= n
917endif
918CFG_PREALLOC_RPC_CACHE ?= y
919
920# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
921# This clock framework allows to describe clock tree and provides functions to
922# get and configure the clocks.
923# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
924# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
925# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level.
926# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree
927# state on OP-TEE core console with the info trace level.
928CFG_DRIVERS_CLK ?= n
929CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
930CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
931CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT)
932CFG_DRIVERS_CLK_PRINT_TREE ?= n
933
934$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
935$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
936
937# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
938# OP-TEE core to provide reset controls on subsystems of the devices.
939CFG_DRIVERS_RSTCTRL ?= n
940
941# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in
942# OP-TEE core to provide GPIO support for drivers.
943CFG_DRIVERS_GPIO ?= n
944
945# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support.
946CFG_DRIVERS_I2C ?= n
947
948# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem
949# providers and allow consumer drivers to get NVMEM cells using the Device Tree.
950CFG_DRIVERS_NVMEM ?= n
951
952# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in
953# OP-TEE core to provide drivers a way to apply pin muxing configurations based
954# on device-tree.
955CFG_DRIVERS_PINCTRL ?= n
956
957# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in
958# OP-TEE core to provide drivers a common regulator interface and describe
959# the regulators dependencies using an embedded device tree.
960#
961# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for
962# DT compatible "regulator-fixed" devices.
963#
964# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for
965# DT compatible "regulator-gpio" devices.
966#
967# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the
968# regulator tree state on OP-TEE core console with the info trace level.
969CFG_DRIVERS_REGULATOR ?= n
970CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n
971CFG_REGULATOR_FIXED ?= n
972CFG_REGULATOR_GPIO ?= n
973
974$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \
975	 CFG_DRIVERS_REGULATOR CFG_DT))
976$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \
977	 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO))
978
979# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core
980# and shows a print (info level) when booting up the device that
981# indicates that the board runs a standard developer configuration.
982#
983# A developer configuration doesn't necessarily have to be secure. The intention
984# is that the one making products based on OP-TEE should override this flag in
985# plat-xxx/conf.mk for the platform they're basing their products on after
986# they've finalized implementing stubbed functionality (see OP-TEE
987# documentation/Porting guidelines) as well as vendor specific security
988# configuration.
989#
990# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated.
991ifneq (undefined,$(flavor CFG_WARN_INSECURE))
992$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead)
993CFG_INSECURE ?= $(CFG_WARN_INSECURE)
994ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE))
995$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE))
996endif
997endif # CFG_WARN_INSECURE defined
998CFG_INSECURE ?= y
999
1000ifneq ($(CFG_INSECURE),y)
1001ifneq ($(CFG_CORE_ASLR_SEED),)
1002$(error CFG_CORE_ASLR_SEED requires CFG_INSECURE=y)
1003endif
1004endif
1005
1006# Enables warnings for declarations mixed with statements
1007CFG_WARN_DECL_AFTER_STATEMENT ?= y
1008
1009# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
1010# mechanism to limit the set of locations to which computed branch instructions
1011# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
1012# that support it, enable this option. A GCC toolchain built with
1013# --enable-standard-branch-protection is needed to use this option.
1014CFG_CORE_BTI ?= n
1015
1016$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
1017
1018# To make use of BTI in user space libraries and TA's on CPU's that support it,
1019# enable this option.
1020CFG_TA_BTI ?= $(CFG_CORE_BTI)
1021
1022$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
1023
1024ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
1025$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible)
1026endif
1027
1028ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
1029$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
1030endif
1031
1032# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock
1033# and key access to memory. This is a hardware supported alternative to
1034# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0.
1035CFG_MEMTAG ?= n
1036
1037$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core))
1038ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG))
1039$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible)
1040endif
1041ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG))
1042$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible)
1043endif
1044
1045# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be
1046# used to restrict accesses to unprivileged memory from privileged mode.
1047# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN.
1048CFG_PAN ?= n
1049
1050$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core))
1051
1052ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \
1053		  $(CFG_CORE_EL3_SPMC)),y)
1054# FF-A case, handled via the FF-A ABI
1055CFG_CORE_ASYNC_NOTIF ?= y
1056$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n)
1057else
1058# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support
1059# for sending asynchronous notifications to normal world.
1060# Interrupt ID must be configurged by the platform too. Currently is only
1061# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
1062CFG_CORE_ASYNC_NOTIF ?= n
1063$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF))
1064endif
1065
1066ifeq ($(CFG_CORE_SEL2_SPMC),y)
1067# Callout by default disabled for SPMC at S-EL2 since Hafnium may crash,
1068# but allow it to be overridden for testing
1069CFG_CALLOUT ?= n
1070else
1071# Enable callout service
1072CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF)
1073endif
1074
1075# Enable notification based test watchdog
1076CFG_NOTIF_TEST_WD ?= $(call cfg-all-enabled,CFG_ENABLE_EMBEDDED_TESTS \
1077		       CFG_CALLOUT CFG_CORE_ASYNC_NOTIF)
1078$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \
1079	 CFG_CORE_ASYNC_NOTIF))
1080
1081$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
1082	 CFG_WITH_STATS))
1083
1084# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions
1085# for signing and authenticating pointers against secret keys. These can
1086# be used to mitigate ROP (Return oriented programming) attacks. This is
1087# currently done by instructing the compiler to add paciasp/autiasp at the
1088# begging and end of functions to sign and verify ELR.
1089#
1090# The CFG_CORE_PAUTH enables these instructions for the core parts
1091# executing at EL1, with one secret key per thread and one secret key per
1092# physical CPU.
1093#
1094# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When
1095# this option is enabled, TEE core will initialize secret keys per TA.
1096CFG_CORE_PAUTH ?= n
1097CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH)
1098
1099$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core))
1100$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core))
1101
1102ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH))
1103$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible)
1104endif
1105ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH))
1106$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible)
1107endif
1108
1109ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH))
1110$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible)
1111endif
1112
1113ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH))
1114$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible)
1115endif
1116
1117# Enable support for generic watchdog registration
1118# This watchdog will then be usable by non-secure world through SMC calls.
1119CFG_WDT ?= n
1120
1121# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver
1122CFG_WDT_SM_HANDLER ?= n
1123
1124$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT))
1125
1126# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements
1127# arm-smc-wdt service. Platform can also override this ID with a platform
1128# specific SMC function ID to access arm-smc-wdt service thanks to
1129# optional config switch CFG_WDT_SM_HANDLER_ID.
1130CFG_WDT_SM_HANDLER_ID ?= 0x82003D06
1131
1132# Allow using the udelay/mdelay function for platforms without ARM generic timer
1133# extension. When set to 'n', the plat_get_freq() function must be defined by
1134# the platform code
1135CFG_CORE_HAS_GENERIC_TIMER ?= y
1136
1137# Enable RTC API
1138CFG_DRIVERS_RTC ?= n
1139
1140# Enable PTA for RTC access from non-secure world
1141CFG_RTC_PTA ?= n
1142
1143# Enable the FF-A SPMC tests in xtests
1144CFG_SPMC_TESTS ?= n
1145
1146# Allocate the translation tables needed to map the S-EL0 application
1147# loaded
1148CFG_CORE_PREALLOC_EL0_TBLS ?= n
1149ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER))
1150$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS")
1151endif
1152
1153# CFG_PGT_CACHE_ENTRIES defines the number of entries on the memory
1154# mapping page table cache used for Trusted Application mapping.
1155# CFG_PGT_CACHE_ENTRIES is ignored when CFG_CORE_PREALLOC_EL0_TBLS
1156# is enabled.
1157#
1158# A proper value for CFG_PGT_CACHE_ENTRIES depends on many factors:
1159# CFG_WITH_LPAE, CFG_TA_ASLR, size of TAs, size of memrefs passed
1160# to TA, CFG_ULIBS_SHARED and possibly others. The default value
1161# is based on the number of threads as an indicator on how large
1162# the system might be.
1163ifeq ($(CFG_NUM_THREADS),1)
1164CFG_PGT_CACHE_ENTRIES ?= 4
1165endif
1166ifeq ($(CFG_NUM_THREADS),2)
1167ifneq ($(CFG_WITH_LPAE),y)
1168CFG_PGT_CACHE_ENTRIES ?= 8
1169endif
1170endif
1171CFG_PGT_CACHE_ENTRIES ?= ($(CFG_NUM_THREADS) * 2)
1172
1173# User TA runtime context dump.
1174# When this option is enabled, OP-TEE provides a debug method for
1175# developer to dump user TA's runtime context, including TA's heap stats.
1176# Developer can open a stats PTA session and then invoke command
1177# STATS_CMD_TA_STATS to get the context of loaded TAs.
1178CFG_TA_STATS ?= n
1179
1180# Enables best effort mitigations against fault injected when the hardware
1181# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h
1182CFG_FAULT_MITIGATION ?= y
1183
1184# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note
1185# that this doesn't affect libutee itself, it's only the TAs compiled with
1186# this set that are affected. Each out-of-tree must set this if to enable
1187# compatibility with version v1.1 as the value of this variable is not
1188# preserved in the TA dev-kit.
1189CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n
1190
1191# Change supported HMAC key size range, from 64 to 1024.
1192# This is needed to pass AOSP Keymaster VTS tests:
1193#   Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp
1194#   Module: VtsHalKeymasterV3_0TargetTest
1195#   Testcases: - PerInstance/SigningOperationsTest#
1196#              - PerInstance/NewKeyGenerationTest#
1197#              - PerInstance/ImportKeyTest#
1198#              - PerInstance/EncryptionOperationsTest#
1199#              - PerInstance/AttestationTest#
1200# Note that this violates GP requirements of HMAC size range.
1201CFG_HMAC_64_1024_RANGE ?= n
1202
1203# CFG_RSA_PUB_EXPONENT_3, when enabled, allows RSA public exponents in the
1204# range 3 <= e < 2^256. This is needed to pass AOSP KeyMint VTS tests:
1205#    Link to tests: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp
1206#    Module: VtsAidlKeyMintTargetTest
1207#    Testcases: - PerInstance/EncryptionOperationsTest.RsaNoPaddingSuccess
1208# When CFG_RSA_PUB_EXPONENT_3 is disabled, RSA public exponents must conform
1209# to NIST SP800-56B recommendation and be in the range 65537 <= e < 2^256.
1210CFG_RSA_PUB_EXPONENT_3 ?= n
1211
1212# Enable a hardware pbkdf2 function
1213# By default use standard pbkdf2 implementation
1214CFG_CRYPTO_HW_PBKDF2 ?= n
1215$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2))
1216
1217# CFG_MULTI_CORE_HALTING, when enabled, registers an interrupt handler for the
1218# Software Generated Interrupt(SGI) specified by: CFG_HALT_CORES_SGI. Upon
1219# reception of this SGI, the CPU is halted. This feature currently relies on the
1220# GIC device.
1221CFG_MULTI_CORE_HALTING ?= n
1222CFG_HALT_CORES_SGI ?= 15
1223$(eval $(call cfg-depends-all,CFG_MULTI_CORE_HALTING,CFG_GIC))
1224
1225# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the
1226# other cores. This feature relies on the SGI specified by CFG_HALT_CORES_SGI
1227# to halt the other cores.
1228CFG_HALT_CORES_ON_PANIC ?= ${CFG_MULTI_CORE_HALTING}
1229$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_MULTI_CORE_HALTING))
1230
1231
1232# Enable automatic discovery of maximal PA supported by the hardware and
1233# use that. Provides easier configuration of virtual platforms where the
1234# maximal PA can vary.
1235CFG_AUTO_MAX_PA_BITS ?= n
1236
1237# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor
1238# management including generic DT bindings for the configuration.
1239CFG_DRIVERS_REMOTEPROC ?= n
1240
1241# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA
1242# service.
1243CFG_REMOTEPROC_PTA ?= n
1244
1245# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure
1246# DTB as OP-TEE HUK.
1247CFG_WIDEVINE_HUK ?= n
1248$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT))
1249
1250# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under
1251# DT node "/options/op-tee/widevine" to some specific TAs.
1252CFG_WIDEVINE_PTA ?= n
1253$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK))
1254
1255# When enabled, CFG_VERAISON_ATTESTATION_PTA embeds remote attestation PTA
1256# service. Note: This is an experimental feature and should be used
1257# with caution in production environments.
1258CFG_VERAISON_ATTESTATION_PTA ?= n
1259ifeq ($(CFG_VERAISON_ATTESTATION_PTA),y)
1260$(call force,CFG_QCBOR,y)
1261endif
1262
1263# When enabled, CFG_VERAISON_ATTESTATION_PTA_TEST_KEY embeds a test key.
1264# Note: CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled for
1265# CFG_VERAISON_ATTESTATION_PTA to work.
1266CFG_VERAISON_ATTESTATION_PTA_TEST_KEY ?= y
1267ifneq ($(CFG_VERAISON_ATTESTATION_PTA_TEST_KEY),y)
1268$(error "CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled")
1269endif
1270
1271# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver.
1272# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes
1273# trace messages from/to the debug terminal of the semihosting host computer.
1274# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console
1275# outputs trace messages to that file. Output to "optee.log" by default.
1276CFG_SEMIHOSTING_CONSOLE ?= n
1277ifeq ($(CFG_SEMIHOSTING_CONSOLE),y)
1278$(call force,CFG_SEMIHOSTING,y)
1279endif
1280CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log"
1281ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),)
1282$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty)
1283endif
1284
1285# Semihosting is a debugging mechanism that enables code running on an embedded
1286# system (also called the target) to communicate with and use the I/O of the
1287# host computer.
1288CFG_SEMIHOSTING ?= n
1289
1290# CFG_FFA_CONSOLE, when enabled, embeds a FFA console driver. OP-TEE console
1291# writes trace messages via FFA interface to the SPM (Secure Partition Manager)
1292# like hafnium.
1293CFG_FFA_CONSOLE ?= n
1294
1295# CFG_CONSOLE_RUNTIME_SET, when enabled, reduces the trace LOG_LEVEL to the
1296# value set by CFG_CONSOLE_RUNTIME_LOG_LEVEL after OP-TEE has finished booting.
1297# This allows for a different trace level during runtime than used during boot
1298CFG_CONSOLE_RUNTIME_SET ?= n
1299CFG_CONSOLE_RUNTIME_LOG_LEVEL ?= 0
1300
1301# CFG_CORE_UNSAFE_MODEXP, when enabled, makes modular exponentiation on TEE
1302# core use 'unsafe' algorithm having better performance. To resist against
1303# timing attacks, 'safe' one is designed to take constant-time that is
1304# generally much slower.
1305CFG_CORE_UNSAFE_MODEXP ?= n
1306
1307# CFG_TA_MBEDTLS_UNSAFE_MODEXP, similar to CFG_CORE_UNSAFE_MODEXP,
1308# when enabled, makes MBedTLS library for TAs use 'unsafe' modular
1309# exponentiation algorithm.
1310CFG_TA_MBEDTLS_UNSAFE_MODEXP ?= n
1311
1312# CFG_DYN_CONFIG, when enabled, use dynamic memory allocation for translation
1313# tables and stacks. Not supported with pager.
1314ifeq ($(CFG_WITH_PAGER),y)
1315$(call force,CFG_DYN_CONFIG,n,conflicts with CFG_WITH_PAGER)
1316else
1317CFG_DYN_CONFIG ?= y
1318endif
1319
1320# CFG_EXTERNAL_ABORT_PLAT_HANDLER is used to implement platform-specific
1321# handling of external abort implementing the plat_external_abort_handler()
1322# function.
1323CFG_EXTERNAL_ABORT_PLAT_HANDLER ?= n
1324
1325# CFG_TA_LIBGCC, when enabled, links user mode TAs with libgcc. Linking
1326# TAs with libgcc is deprecated, but keep this flag while sorting out the
1327# out remaining issues with supporting C++.
1328CFG_TA_LIBGCC ?= y
1329
1330# CFG_CORE_DYN_PROTMEM, enables dynamic protected memory lending from
1331# normal world.
1332CFG_CORE_DYN_PROTMEM ?= n
1333$(eval $(call cfg-depends-all,CFG_CORE_DYN_PROTMEM,CFG_CORE_DYN_SHM,CFG_SECURE_DATA_PATH))
1334