xref: /optee_os/mk/config.mk (revision 2f4d97e7664270c92f4fd9d35fcddcfa4fd5f667)
1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20CROSS_COMPILE ?= arm-linux-gnueabihf-
21CROSS_COMPILE32 ?= $(CROSS_COMPILE)
22CROSS_COMPILE64 ?= aarch64-linux-gnu-
23COMPILER ?= gcc
24
25# For convenience
26ifdef CFLAGS
27CFLAGS32 ?= $(CFLAGS)
28CFLAGS64 ?= $(CFLAGS)
29endif
30
31# Compiler warning level.
32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
33WARNS ?= 3
34
35# Path to the Python interpreter used by the build system.
36# This variable is set to the default python3 interpreter in the user's
37# path. But build environments that require more explicit control can
38# set the path to a specific interpreter through this variable.
39PYTHON3 ?= python3
40
41# Define DEBUG=1 to compile without optimization (forces -O0)
42# DEBUG=1
43ifeq ($(DEBUG),1)
44# For backwards compatibility
45$(call force,CFG_CC_OPT_LEVEL,0)
46$(call force,CFG_DEBUG_INFO,y)
47endif
48
49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
50# Optimize for size by default, usually gives good performance too.
51CFG_CC_OPT_LEVEL ?= s
52
53# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
54CFG_DEBUG_INFO ?= y
55
56# If y, enable debug features of the TEE core (assertions and lock checks
57# are enabled, panic and assert messages are more verbose, data and prefetch
58# aborts show a stack dump). When disabled, the NDEBUG directive is defined
59# so assertions are disabled.
60CFG_TEE_CORE_DEBUG ?= y
61
62# Log levels for the TEE core. Defines which core messages are displayed
63# on the secure console. Disabling core log (level set to 0) also disables
64# logs from the TAs.
65# 0: none
66# 1: error
67# 2: error + info
68# 3: error + info + debug
69# 4: error + info + debug + flow
70CFG_TEE_CORE_LOG_LEVEL ?= 2
71
72# TA log level
73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
75# when the TA is built.
76CFG_TEE_TA_LOG_LEVEL ?= 1
77
78# TA enablement
79# When defined to "y", TA traces are output according to
80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
81CFG_TEE_CORE_TA_TRACE ?= y
82
83# If y, enable the memory leak detection feature in the bget memory allocator.
84# When this feature is enabled, calling mdbg_check(1) will print a list of all
85# the currently allocated buffers and the location of the allocation (file and
86# line number).
87# Note: make sure the log level is high enough for the messages to show up on
88# the secure console! For instance:
89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
90#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
91# - To debug TEE core allocations: build OP-TEE with:
92#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
93CFG_TEE_CORE_MALLOC_DEBUG ?= n
94CFG_TEE_TA_MALLOC_DEBUG ?= n
95# Prints an error message and dumps the stack on failed memory allocations
96# using malloc() and friends.
97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
98
99# Mask to select which messages are prefixed with long debugging information
100# (severity, core ID, thread ID, component name, function name, line number)
101# based on the message level. If BIT(level) is set, the long prefix is shown.
102# Otherwise a short prefix is used (severity and component name only).
103# Levels: 0=none 1=error 2=info 3=debug 4=flow
104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
105
106# PRNG configuration
107# If CFG_WITH_SOFTWARE_PRNG is enabled, crypto provider provided
108# software PRNG implementation is used.
109# Otherwise, you need to implement hw_get_random_bytes() for your platform
110CFG_WITH_SOFTWARE_PRNG ?= y
111
112# Number of threads
113CFG_NUM_THREADS ?= 2
114
115# API implementation version
116CFG_TEE_API_VERSION ?= GPD-1.1-dev
117
118# Implementation description (implementation-dependent)
119CFG_TEE_IMPL_DESCR ?= OPTEE
120
121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
122# World?
123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
124
125# The following values are not extracted from the "git describe" output because
126# we might be outside of a Git environment, or the tree may have been cloned
127# with limited depth not including any tag, so there is really no guarantee
128# that TEE_IMPL_VERSION contains the major and minor revision numbers.
129CFG_OPTEE_REVISION_MAJOR ?= 3
130CFG_OPTEE_REVISION_MINOR ?= 18
131CFG_OPTEE_REVISION_EXTRA ?=
132
133# Trusted OS implementation version
134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
135		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA)
136ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y)
137TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0)
138else
139TEE_IMPL_GIT_SHA1 := 0x0
140endif
141
142# Trusted OS implementation manufacturer name
143CFG_TEE_MANUFACTURER ?= LINARO
144
145# Trusted firmware version
146CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
147
148# Trusted OS implementation manufacturer name
149CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
150
151# Rich Execution Environment (REE) file system support: normal world OS
152# provides the actual storage.
153# This is the default FS when enabled (i.e., the one used when
154# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
155CFG_REE_FS ?= y
156
157# RPMB file system support
158CFG_RPMB_FS ?= n
159
160# Enable roll-back protection of REE file system using RPMB.
161# Roll-back protection only works if CFG_RPMB_FS = y.
162CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS)
163$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS))
164
165# Device identifier used when CFG_RPMB_FS = y.
166# The exact meaning of this value is platform-dependent. On Linux, the
167# tee-supplicant process will open /dev/mmcblk<id>rpmb
168CFG_RPMB_FS_DEV_ID ?= 0
169
170# This config variable determines the number of entries read in from RPMB at
171# once whenever a function traverses the RPMB FS. Increasing the default value
172# has the following consequences:
173# - More memory required on heap. A single FAT entry currently has a size of
174#   256 bytes.
175# - Potentially significant speed-ups for RPMB I/O. Depending on how many
176#   entries a function needs to traverse, the number of time-consuming RPMB
177#   read-in operations can be reduced.
178# Chosing a proper value is both platform- (available memory) and use-case-
179# dependent (potential number of FAT fs entries), so overwrite in platform
180# config files
181CFG_RPMB_FS_RD_ENTRIES ?= 8
182
183# Enables caching of FAT FS entries when set to a value greater than zero.
184# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
185# entries. The cache is populated when FAT FS entries are initially read in.
186# When traversing the FAT FS entries, we read from the cache instead of reading
187# in the entries from RPMB storage. Consequently, when a FAT FS entry is
188# written, the cache is updated. In scenarios where an estimate of the number
189# of FAT FS entries can be made, the cache may be specifically tailored to
190# store all entries. The caching can improve RPMB I/O at the cost
191# of additional memory.
192# Without caching, we temporarily require
193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
194# while traversing the FAT FS (e.g. in read_fat).
195# For example 8*256 bytes = 2kB while in read_fat.
196# With caching, we constantly require up to
197# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
198# depending on how many elements are in the cache, and additional temporary
199# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
200# in case the cache is too small to hold all elements when traversing.
201CFG_RPMB_FS_CACHE_ENTRIES ?= 0
202
203# Print RPMB data frames sent to and received from the RPMB device
204CFG_RPMB_FS_DEBUG_DATA ?= n
205
206# Clear RPMB content at cold boot
207CFG_RPMB_RESET_FAT ?= n
208
209# Use a hard coded RPMB key instead of deriving it from the platform HUK
210CFG_RPMB_TESTKEY ?= n
211
212# Enables RPMB key programming by the TEE, in case the RPMB partition has not
213# been configured yet.
214# !!! Security warning !!!
215# Do *NOT* enable this in product builds, as doing so would allow the TEE to
216# leak the RPMB key.
217# This option is useful in the following situations:
218# - Testing
219# - RPMB key provisioning in a controlled environment (factory setup)
220CFG_RPMB_WRITE_KEY ?= n
221
222_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
223
224# Signing key for OP-TEE TA's
225# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
226# key and then set TA_PUBLIC_KEY to match public key from the HSM.
227# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
228TA_SIGN_KEY ?= keys/default_ta.pem
229TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
230
231# Include lib/libutils/isoc in the build? Most platforms need this, but some
232# may not because they obtain the isoc functions from elsewhere
233CFG_LIBUTILS_WITH_ISOC ?= y
234
235# Enables floating point support for user TAs
236# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
237#	 hard-float is basically a super set of soft-float. Hard-float
238#	 requires all the support routines provided for soft-float, but the
239#	 compiler may choose to optimize to not use some of them and use
240#	 the floating-point registers instead.
241# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
242#	 nothing with ` -mgeneral-regs-only`)
243# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
244CFG_TA_FLOAT_SUPPORT ?= y
245
246# Stack unwinding: print a stack dump to the console on core or TA abort, or
247# when a TA panics.
248# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
249# unwound (not paged TAs, however).
250# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
251# this option will increase the size of the 32-bit TEE binary by a few KB.
252# Similarly, TAs have to be compiled with -funwind-tables (default when the
253# option is set) otherwise they can't be unwound.
254# Warning: since the unwind sequence for user-mode (TA) code is implemented in
255# the privileged layer of OP-TEE, enabling this feature will weaken the
256# user/kernel isolation. Therefore it should be disabled in release builds.
257ifeq ($(CFG_TEE_CORE_DEBUG),y)
258CFG_UNWIND ?= y
259endif
260
261# Enable support for dynamically loaded user TAs
262CFG_WITH_USER_TA ?= y
263
264# Choosing the architecture(s) of user-mode libraries (used by TAs)
265#
266# Platforms may define a list of supported architectures for user-mode code
267# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
268# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
269# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
270# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
271# The first entry in $(supported-ta-targets) has a special role, see
272# CFG_USER_TA_TARGET_<ta-name> below.
273#
274# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
275# change the order of the values.
276#
277# The list of TA architectures is ultimately stored in $(ta-targets).
278
279# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
280# defined, selects the unique TA architecture mode for building the in-tree TA
281# <ta-name>. Can be either ta_arm32 or ta_arm64.
282# By default, in-tree TAs are built using the first architecture specified in
283# $(ta-targets).
284
285# Address Space Layout Randomization for user-mode Trusted Applications
286#
287# When this flag is enabled, the ELF loader will introduce a random offset
288# when mapping the application in user space. ASLR makes the exploitation of
289# memory corruption vulnerabilities more difficult.
290CFG_TA_ASLR ?= y
291
292# How much ASLR may shift the base address (in pages). The base address is
293# randomly shifted by an integer number of pages comprised between these two
294# values. Bigger ranges are more secure because they make the addresses harder
295# to guess at the expense of using more memory for the page tables.
296CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
297CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
298
299# Address Space Layout Randomization for TEE Core
300#
301# When this flag is enabled, the early init code will introduce a random
302# offset when mapping TEE Core. ASLR makes the exploitation of memory
303# corruption vulnerabilities more difficult.
304CFG_CORE_ASLR ?= y
305
306# Load user TAs from the REE filesystem via tee-supplicant
307CFG_REE_FS_TA ?= y
308
309# Pre-authentication of TA binaries loaded from the REE filesystem
310#
311# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
312#   "Secure DDR" pool, check the signature, then process the file only if it is
313#   valid.
314# - If disabled: hash the binaries as they are being processed and verify the
315#   signature as a last step.
316CFG_REE_FS_TA_BUFFERED ?= n
317$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
318
319# When CFG_REE_FS=y and CFG_RPMB_FS=y:
320# Allow secure storage in the REE FS to be entirely deleted without causing
321# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
322# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
323# can be used to reset the secure storage to a clean, empty state.
324# Typically used for testing only since it weakens storage security.
325CFG_REE_FS_ALLOW_RESET ?= n
326
327# Support for loading user TAs from a special section in the TEE binary.
328# Such TAs are available even before tee-supplicant is available (hence their
329# name), but note that many services exported to TAs may need tee-supplicant,
330# so early use is limited to a subset of the TEE Internal Core API (crypto...)
331# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
332# file(s). For example:
333#   $ make ... \
334#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
335#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
336# Typical build steps:
337#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
338#                                    # headers, makefiles), ready to build TAs.
339#                                    # CFG_EARLY_TA=y is optional, it prevents
340#                                    # later library recompilations.
341#   <build some TAs>
342#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
343#
344# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
345# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
346# <name-of-ta>/<uuid>
347# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
348ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
349$(call force,CFG_EARLY_TA,y)
350else
351CFG_EARLY_TA ?= n
352endif
353
354ifeq ($(CFG_EARLY_TA),y)
355$(call force,CFG_EMBEDDED_TS,y)
356endif
357
358ifneq ($(SP_PATHS),)
359$(call force,CFG_EMBEDDED_TS,y)
360else
361CFG_SECURE_PARTITION ?= n
362endif
363
364ifeq ($(CFG_SECURE_PARTITION),y)
365$(call force,CFG_EMBEDDED_TS,y)
366endif
367
368ifeq ($(CFG_EMBEDDED_TS),y)
369$(call force,CFG_ZLIB,y)
370endif
371
372# By default the early TAs are compressed in the TEE binary, it is possible to
373# not compress them with CFG_EARLY_TA_COMPRESS=n
374CFG_EARLY_TA_COMPRESS ?= y
375
376# Enable paging, requires SRAM, can't be enabled by default
377CFG_WITH_PAGER ?= n
378
379# Use the pager for user TAs
380CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
381
382# If paging of user TAs, that is, R/W paging default to enable paging of
383# TAG and IV in order to reduce heap usage.
384CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
385
386# Runtime lock dependency checker: ensures that a proper locking hierarchy is
387# used in the TEE core when acquiring and releasing mutexes. Any violation will
388# cause a panic as soon as the invalid locking condition is detected. If
389# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
390# records the call stacks when locks are taken, and prints them when a
391# potential deadlock is found.
392# Expect a significant performance impact when enabling this.
393CFG_LOCKDEP ?= n
394CFG_LOCKDEP_RECORD_STACK ?= y
395
396# BestFit algorithm in bget reduces the fragmentation of the heap when running
397# with the pager enabled or lockdep
398CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
399
400# Enable support for detected undefined behavior in C
401# Uses a lot of memory, can't be enabled by default
402CFG_CORE_SANITIZE_UNDEFINED ?= n
403
404# Enable Kernel Address sanitizer, has a huge performance impact, uses a
405# lot of memory and need platform specific adaptations, can't be enabled by
406# default
407CFG_CORE_SANITIZE_KADDRESS ?= n
408
409# Add stack guards before/after stacks and periodically check them
410CFG_WITH_STACK_CANARIES ?= y
411
412# Use compiler instrumentation to troubleshoot stack overflows.
413# When enabled, most C functions check the stack pointer against the current
414# stack limits on entry and panic immediately if it is out of range.
415CFG_CORE_DEBUG_CHECK_STACKS ?= n
416
417# Use when the default stack allocations are not sufficient.
418CFG_STACK_THREAD_EXTRA ?= 0
419CFG_STACK_TMP_EXTRA ?= 0
420
421# Device Tree support
422#
423# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
424# device tree blob (DTB) parsing from the core.
425#
426# When CFG_DT is enabled, the TEE _start function expects to find
427# the address of a DTB in register X2/R2 provided by the early boot stage
428# or value 0 if boot stage provides no DTB.
429#
430# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to
431# be in the secure memory.
432#
433# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
434# relative path of a DTS file located in core/arch/$(ARCH)/dts.
435# The DTS file is compiled into a DTB file which content is embedded in a
436# read-only section of the core.
437ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
438CFG_EMBED_DTB ?= y
439endif
440ifeq ($(CFG_EMBED_DTB),y)
441$(call force,CFG_DT,y)
442endif
443CFG_EMBED_DTB ?= n
444CFG_DT ?= n
445CFG_MAP_EXT_DT_SECURE ?= n
446ifeq ($(CFG_MAP_EXT_DT_SECURE),y)
447$(call force,CFG_DT,y)
448endif
449
450# Maximum size of the Device Tree Blob, has to be large enough to allow
451# editing of the supplied DTB.
452CFG_DTB_MAX_SIZE ?= 0x10000
453
454# Maximum size of the init info data passed to Secure Partitions.
455CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000
456
457# Device Tree Overlay support.
458# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
459# external DTB. The overlay is created when no valid DTB overlay is found.
460# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
461# DTB location.
462# External DTB location (physical address) is provided either by boot
463# argument arg2 or from CFG_DT_ADDR if defined.
464# A subsequent boot stage can then merge the generated overlay DTB into a main
465# DTB using the standard fdt_overlay_apply() method.
466CFG_EXTERNAL_DTB_OVERLAY ?= n
467CFG_GENERATE_DTB_OVERLAY ?= n
468
469ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
470$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
471endif
472_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
473			  CFG_GENERATE_DTB_OVERLAY)
474
475# All embedded tests are supposed to be disabled by default, this flag
476# is used to control the default value of all other embedded tests
477CFG_ENABLE_EMBEDDED_TESTS ?= n
478
479# Enable core self tests and related pseudo TAs
480CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
481
482# Compiles bget_main_test() to be called from a test TA
483CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
484
485# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedb DT driver probing tests.
486# This also requires embeddeding a DTB with expected content.
487# Defautl disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers.
488# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n.
489CFG_DT_DRIVER_EMBEDDED_TEST ?= n
490ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
491CFG_DRIVERS_CLK ?= y
492CFG_DRIVERS_RSTCTRL ?= y
493CFG_DRIVERS_CLK_EARLY_PROBE ?= n
494$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST)
495endif
496
497# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode
498# parsing in the embedded DTB for driver probing. The alternative is
499# an exploration based on compatible drivers found. It is default disabled.
500CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n
501
502# This option enables OP-TEE to respond to SMP boot request: the Rich OS
503# issues this to request OP-TEE to release secondaries cores out of reset,
504# with specific core number and non-secure entry address.
505CFG_BOOT_SECONDARY_REQUEST ?= n
506
507# Default heap size for Core, 64 kB
508CFG_CORE_HEAP_SIZE ?= 65536
509
510# Default size of nexus heap. 16 kB. Used only if CFG_VIRTUALIZATION
511# is enabled
512CFG_CORE_NEX_HEAP_SIZE ?= 16384
513
514# TA profiling.
515# When this option is enabled, OP-TEE can execute Trusted Applications
516# instrumented with GCC's -pg flag and will output profiling information
517# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
518# tee-supplicant)
519# Note: this does not work well with shared libraries at the moment for a
520# couple of reasons:
521# 1. The profiling code assumes a unique executable section in the TA VA space.
522# 2. The code used to detect at run time if the TA is intrumented assumes that
523# the TA is linked statically.
524CFG_TA_GPROF_SUPPORT ?= n
525
526# TA function tracing.
527# When this option is enabled, OP-TEE can execute Trusted Applications
528# instrumented with GCC's -pg flag and will output function tracing
529# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is
530# defined in tee-supplicant)
531CFG_FTRACE_SUPPORT ?= n
532
533# How to make room when the function tracing buffer is full?
534# 'shift': shift the previously stored data by the amount needed in order
535#    to always keep the latest logs (slower, especially with big buffer sizes)
536# 'wrap': discard the previous data and start at the beginning of the buffer
537#    again (fast, but can result in a mostly empty buffer)
538# 'stop': stop logging new data
539CFG_FTRACE_BUF_WHEN_FULL ?= shift
540$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap)
541$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y)
542
543# Function tracing: unit to be used when displaying durations
544#  0: always display durations in microseconds
545# >0: if duration is greater or equal to the specified value (in microseconds),
546#     display it in milliseconds
547CFG_FTRACE_US_MS ?= 10000
548
549# Core syscall function tracing.
550# When this option is enabled, OP-TEE core is instrumented with GCC's
551# -pg flag and will output syscall function graph in user TA ftrace
552# buffer
553CFG_SYSCALL_FTRACE ?= n
554$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
555
556# Enable to compile user TA libraries with profiling (-pg).
557# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
558CFG_ULIBS_MCOUNT ?= n
559# Profiling/tracing of syscall wrapper (utee_*)
560CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
561
562ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
563ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
564$(error Cannot instrument user libraries if user mode profiling is disabled)
565endif
566endif
567
568# Build libutee, libutils, libmbedtls as shared libraries.
569# - Static libraries are still generated when this is enabled, but TAs will use
570# the shared libraries unless explicitly linked with the -static flag.
571# - Shared libraries are made of two files: for example, libutee is
572#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
573#   is a totally standard shared object, and should be used to link against.
574#   The '.ta' file is a signed version of the '.so' and should be installed
575#   in the same way as TAs so that they can be found at runtime.
576CFG_ULIBS_SHARED ?= n
577
578ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
579$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
580endif
581
582# CFG_GP_SOCKETS
583# Enable Global Platform Sockets support
584CFG_GP_SOCKETS ?= y
585
586# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
587# invocation parameters referring to specific secure memories).
588CFG_SECURE_DATA_PATH ?= n
589
590# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
591# TA binaries are stored encrypted in the REE FS and are protected by
592# metadata in secure storage.
593CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
594$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
595
596# Enable the pseudo TA that managages TA storage in secure storage
597CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
598$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
599
600# Enable the pseudo TA for misc. auxilary services, extending existing
601# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
602# pool etc...)
603CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
604$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
605
606# Enable the pseudo TA for enumeration of TEE based devices for the normal
607# world OS.
608CFG_DEVICE_ENUM_PTA ?= y
609
610# The attestation pseudo TA provides an interface to request measurements of
611# a TA or the TEE binary.
612CFG_ATTESTATION_PTA ?= n
613$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE))
614
615# RSA key size (in bits) for the attestation PTA. Must be at least 528 given
616# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but
617# note that such a low value is not secure.
618# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and
619# https://tools.ietf.org/html/rfc8017#section-9.1.1
620#  emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66
621#  emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes
622CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072
623
624# Define the number of cores per cluster used in calculating core position.
625# The cluster number is shifted by this value and added to the core ID,
626# so its value represents log2(cores/cluster).
627# Default is 2**(2) = 4 cores per cluster.
628CFG_CORE_CLUSTER_SHIFT ?= 2
629
630# Define the number of threads per core used in calculating processing
631# element's position. The core number is shifted by this value and added to
632# the thread ID, so its value represents log2(threads/core).
633# Default is 2**(0) = 1 threads per core.
634CFG_CORE_THREAD_SHIFT ?= 0
635
636# Enable support for dynamic shared memory (shared memory anywhere in
637# non-secure memory).
638CFG_CORE_DYN_SHM ?= y
639
640# Enable support for reserved shared memory (shared memory in a carved out
641# memory area).
642CFG_CORE_RESERVED_SHM ?= y
643
644# Enables support for larger physical addresses, that is, it will define
645# paddr_t as a 64-bit type.
646CFG_CORE_LARGE_PHYS_ADDR ?= n
647
648# Define the maximum size, in bits, for big numbers in the Internal Core API
649# Arithmetical functions. This does *not* influence the key size that may be
650# manipulated through the Cryptographic API.
651# Set this to a lower value to reduce the TA memory footprint.
652CFG_TA_BIGNUM_MAX_BITS ?= 2048
653
654# Define the maximum size, in bits, for big numbers in the TEE core (privileged
655# layer).
656# This value is an upper limit for the key size in any cryptographic algorithm
657# implemented by the TEE core.
658# Set this to a lower value to reduce the memory footprint.
659CFG_CORE_BIGNUM_MAX_BITS ?= 4096
660
661# Not used since libmpa was removed. Force the values to catch build scripts
662# that would set = n.
663$(call force,CFG_TA_MBEDTLS_MPI,y)
664$(call force,CFG_TA_MBEDTLS,y)
665
666# Compile the TA library mbedTLS with self test functions, the functions
667# need to be called to test anything
668CFG_TA_MBEDTLS_SELF_TEST ?= y
669
670# By default use tomcrypt as the main crypto lib providing an implementation
671# for the API in <crypto/crypto.h>
672# CFG_CRYPTOLIB_NAME is used as libname and
673# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
674#
675# It's also possible to configure to use mbedtls instead of tomcrypt.
676# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
677# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
678CFG_CRYPTOLIB_NAME ?= tomcrypt
679CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
680
681# Not used since libmpa was removed. Force the value to catch build scripts
682# that would set = n.
683$(call force,CFG_CORE_MBEDTLS_MPI,y)
684
685# Enable virtualization support. OP-TEE will not work without compatible
686# hypervisor if this option is enabled.
687CFG_VIRTUALIZATION ?= n
688
689ifeq ($(CFG_VIRTUALIZATION),y)
690$(call force,CFG_CORE_RODATA_NOEXEC,y)
691$(call force,CFG_CORE_RWDATA_NOEXEC,y)
692
693# Default number of virtual guests
694CFG_VIRT_GUEST_COUNT ?= 2
695endif
696
697# Enables backwards compatible derivation of RPMB and SSK keys
698CFG_CORE_HUK_SUBKEY_COMPAT ?= y
699
700# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
701# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
702CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
703
704# Compress and encode conf.mk into the TEE core, and show the encoded string on
705# boot (with severity TRACE_INFO).
706CFG_SHOW_CONF_ON_BOOT ?= n
707
708# Enables support for passing a TPM Event Log stored in secure memory
709# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement
710# taken before the service was up and running.
711CFG_CORE_TPM_EVENT_LOG ?= n
712
713# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
714# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
715#
716# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
717# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
718# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers
719# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
720# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory
721# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory
722# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory
723# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer
724CFG_SCMI_MSG_DRIVERS ?= n
725ifeq ($(CFG_SCMI_MSG_DRIVERS),y)
726CFG_SCMI_MSG_CLOCK ?= n
727CFG_SCMI_MSG_RESET_DOMAIN ?= n
728CFG_SCMI_MSG_SHM_MSG ?= n
729CFG_SCMI_MSG_SMT ?= n
730CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n
731CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n
732CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n
733CFG_SCMI_MSG_THREAD_ENTRY ?= n
734CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
735$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT))
736$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT))
737$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG))
738endif
739
740# Enable SCMI PTA interface for REE SCMI agents
741CFG_SCMI_PTA ?= n
742
743ifneq ($(CFG_STMM_PATH),)
744$(call force,CFG_WITH_STMM_SP,y)
745else
746CFG_WITH_STMM_SP ?= n
747endif
748ifeq ($(CFG_WITH_STMM_SP),y)
749$(call force,CFG_ZLIB,y)
750endif
751
752# When enabled checks that buffers passed to the GP Internal Core API
753# comply with the rules added as annotations as part of the definition of
754# the API. For example preventing buffers in non-secure shared memory when
755# not allowed.
756CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
757
758# When enabled accepts the DES key sizes excluding parity bits as in
759# the GP Internal API Specification v1.0
760CFG_COMPAT_GP10_DES ?= y
761
762# Defines a limit for many levels TAs may call each others.
763CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
764
765# Pseudo-TA to export hardware RNG output to Normal World
766# RNG characteristics are platform specific
767CFG_HWRNG_PTA ?= n
768ifeq ($(CFG_HWRNG_PTA),y)
769# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
770CFG_HWRNG_RATE ?= 0
771# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
772ifeq (,$(CFG_HWRNG_QUALITY))
773$(error CFG_HWRNG_QUALITY not defined)
774endif
775endif
776
777# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
778# shared memory for each secure thread. When disabled, RPC shared
779# memory is released once the secure thread has completed is execution.
780ifeq ($(CFG_WITH_PAGER),y)
781CFG_PREALLOC_RPC_CACHE ?= n
782endif
783CFG_PREALLOC_RPC_CACHE ?= y
784
785# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
786# This clock framework allows to describe clock tree and provides functions to
787# get and configure the clocks.
788# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
789# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
790# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level.
791CFG_DRIVERS_CLK ?= n
792CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
793CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
794CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT)
795
796$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
797$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
798
799# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
800# OP-TEE core to provide reset controls on subsystems of the devices.
801CFG_DRIVERS_RSTCTRL ?= n
802
803# The purpose of this flag is to show a print when booting up the device that
804# indicates whether the board runs a standard developer configuration or not.
805# A developer configuration doesn't necessarily has to be secure. The intention
806# is that the one making products based on OP-TEE should override this flag in
807# plat-xxx/conf.mk for the platform they're basing their products on after
808# they've finalized implementing stubbed functionality (see OP-TEE
809# documentation/Porting guidelines) as well as vendor specific security
810# configuration.
811CFG_WARN_INSECURE ?= y
812
813# Enables warnings for declarations mixed with statements
814CFG_WARN_DECL_AFTER_STATEMENT ?= y
815
816# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
817# mechanism to limit the set of locations to which computed branch instructions
818# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
819# that support it, enable this option. A GCC toolchain built with
820# --enable-standard-branch-protection is needed to use this option.
821CFG_CORE_BTI ?= n
822
823$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
824
825# To make use of BTI in user space libraries and TA's on CPU's that support it,
826# enable this option.
827CFG_TA_BTI ?= $(CFG_CORE_BTI)
828
829$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
830
831ifeq (y-y,$(CFG_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
832$(error CFG_VIRTUALIZATION and BTI are currently incompatible)
833endif
834
835ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
836$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
837endif
838
839# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock
840# and key access to memory. This is a hardware supported alternative to
841# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0.
842CFG_MEMTAG ?= n
843
844$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core))
845ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG))
846$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible)
847endif
848ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG))
849$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible)
850endif
851
852# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable enables support
853# for sending asynchronous notifications to normal world. Note that an
854# interrupt ID must be configurged by the platform too. Currently is only
855# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
856CFG_CORE_ASYNC_NOTIF ?= n
857
858$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
859	 CFG_WITH_STATS))
860
861# Pointer Authentication (part of ARMv8.3 Extensions) provides
862# instructions for signing and authenticating pointers against secret keys.
863# These can be used to mitigate ROP (Return oriented programming) attacks.
864# This option enables these instructions for TA's at EL0. When this option is
865# enabled , TEE core will initialize secret keys per TA.
866CFG_TA_PAUTH ?= n
867
868$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core))
869
870ifeq (y-y,$(CFG_VIRTUALIZATION)-$(CFG_TA_PAUTH))
871$(error CFG_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible)
872endif
873
874ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH))
875$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible)
876endif
877
878ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH))
879$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible)
880endif
881
882# Enable support for generic watchdog registration
883# This watchdog will then be usable by non-secure world through SMC calls.
884CFG_WDT ?= n
885
886# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver
887# When enabled, CFG_WDT_SM_HANDLER_ID must be defined with a SMC ID
888CFG_WDT_SM_HANDLER ?= n
889
890$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT))
891ifeq (y-,$(CFG_WDT_SM_HANDLER)-$(CFG_WDT_SM_HANDLER_ID))
892$(error CFG_WDT_SM_HANDLER_ID must be defined when enabling CFG_WDT_SM_HANDLER)
893endif
894
895# Allow using the udelay/mdelay function for platforms without ARM generic timer
896# extension. When set to 'n', the plat_get_freq() function must be defined by
897# the platform code
898CFG_CORE_HAS_GENERIC_TIMER ?= y
899
900# Enable RTC API
901CFG_DRIVERS_RTC ?= n
902
903# Enable PTA for RTC access from non-secure world
904CFG_RTC_PTA ?= n
905
906# Enable TPM2
907CFG_DRIVERS_TPM2 ?= n
908CFG_DRIVERS_TPM2_MMIO ?= n
909ifeq ($(CFG_CORE_TPM_EVENT_LOG),y)
910CFG_CORE_TCG_PROVIDER ?= $(CFG_DRIVERS_TPM2)
911endif
912