1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20ifeq ($(ARCH),arm) 21CROSS_COMPILE ?= arm-linux-gnueabihf- 22CROSS_COMPILE64 ?= aarch64-linux-gnu- 23endif 24ifeq ($(ARCH),riscv) 25CROSS_COMPILE ?= riscv-linux-gnu- 26CROSS_COMPILE64 ?= riscv64-linux-gnu- 27endif 28CROSS_COMPILE32 ?= $(CROSS_COMPILE) 29COMPILER ?= gcc 30 31# For convenience 32ifdef CFLAGS 33CFLAGS32 ?= $(CFLAGS) 34CFLAGS64 ?= $(CFLAGS) 35endif 36 37# Compiler warning level. 38# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 39WARNS ?= 3 40 41# Path to the Python interpreter used by the build system. 42# This variable is set to the default python3 interpreter in the user's 43# path. But build environments that require more explicit control can 44# set the path to a specific interpreter through this variable. 45PYTHON3 ?= python3 46 47# Define DEBUG=1 to compile without optimization (forces -O0) 48# DEBUG=1 49ifeq ($(DEBUG),1) 50# For backwards compatibility 51$(call force,CFG_CC_OPT_LEVEL,0) 52$(call force,CFG_DEBUG_INFO,y) 53endif 54 55# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 56# Optimize for size by default, usually gives good performance too. 57CFG_CC_OPT_LEVEL ?= s 58 59# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 60CFG_DEBUG_INFO ?= y 61 62# If y, enable debug features of the TEE core (assertions and lock checks 63# are enabled, panic and assert messages are more verbose, data and prefetch 64# aborts show a stack dump). When disabled, the NDEBUG directive is defined 65# so assertions are disabled. 66CFG_TEE_CORE_DEBUG ?= y 67 68# Log levels for the TEE core. Defines which core messages are displayed 69# on the secure console. Disabling core log (level set to 0) also disables 70# logs from the TAs. 71# 0: none 72# 1: error 73# 2: error + info 74# 3: error + info + debug 75# 4: error + info + debug + flow 76CFG_TEE_CORE_LOG_LEVEL ?= 2 77 78# TA log level 79# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 80# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 81# when the TA is built. 82CFG_TEE_TA_LOG_LEVEL ?= 1 83 84# TA enablement 85# When defined to "y", TA traces are output according to 86# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 87CFG_TEE_CORE_TA_TRACE ?= y 88 89# If y, enable the memory leak detection feature in the bget memory allocator. 90# When this feature is enabled, calling mdbg_check(1) will print a list of all 91# the currently allocated buffers and the location of the allocation (file and 92# line number). 93# Note: make sure the log level is high enough for the messages to show up on 94# the secure console! For instance: 95# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 96# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 97# - To debug TEE core allocations: build OP-TEE with: 98# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 99CFG_TEE_CORE_MALLOC_DEBUG ?= n 100CFG_TEE_TA_MALLOC_DEBUG ?= n 101# Prints an error message and dumps the stack on failed memory allocations 102# using malloc() and friends. 103CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 104 105# Mask to select which messages are prefixed with long debugging information 106# (severity, core ID, thread ID, component name, function name, line number) 107# based on the message level. If BIT(level) is set, the long prefix is shown. 108# Otherwise a short prefix is used (severity and component name only). 109# Levels: 0=none 1=error 2=info 3=debug 4=flow 110CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 111 112# Number of threads 113CFG_NUM_THREADS ?= 2 114 115# API implementation version 116CFG_TEE_API_VERSION ?= GPD-1.1-dev 117 118# Implementation description (implementation-dependent) 119CFG_TEE_IMPL_DESCR ?= OPTEE 120 121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 122# World? 123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 124 125# The following values are not extracted from the "git describe" output because 126# we might be outside of a Git environment, or the tree may have been cloned 127# with limited depth not including any tag, so there is really no guarantee 128# that TEE_IMPL_VERSION contains the major and minor revision numbers. 129CFG_OPTEE_REVISION_MAJOR ?= 4 130CFG_OPTEE_REVISION_MINOR ?= 1 131CFG_OPTEE_REVISION_EXTRA ?= 132 133# Trusted OS implementation version 134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 135 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 136ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y) 137TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0) 138else 139TEE_IMPL_GIT_SHA1 := 0x0 140endif 141 142# Trusted OS implementation manufacturer name 143CFG_TEE_MANUFACTURER ?= LINARO 144 145# Trusted firmware version 146CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 147 148# Trusted OS implementation manufacturer name 149CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 150 151# Rich Execution Environment (REE) file system support: normal world OS 152# provides the actual storage. 153# This is the default FS when enabled (i.e., the one used when 154# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 155CFG_REE_FS ?= y 156 157# RPMB file system support 158CFG_RPMB_FS ?= n 159 160# Enable roll-back protection of REE file system using RPMB. 161# Roll-back protection only works if CFG_RPMB_FS = y. 162CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 163$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 164 165# Device identifier used when CFG_RPMB_FS = y. 166# The exact meaning of this value is platform-dependent. On Linux, the 167# tee-supplicant process will open /dev/mmcblk<id>rpmb 168CFG_RPMB_FS_DEV_ID ?= 0 169 170# This config variable determines the number of entries read in from RPMB at 171# once whenever a function traverses the RPMB FS. Increasing the default value 172# has the following consequences: 173# - More memory required on heap. A single FAT entry currently has a size of 174# 256 bytes. 175# - Potentially significant speed-ups for RPMB I/O. Depending on how many 176# entries a function needs to traverse, the number of time-consuming RPMB 177# read-in operations can be reduced. 178# Chosing a proper value is both platform- (available memory) and use-case- 179# dependent (potential number of FAT fs entries), so overwrite in platform 180# config files 181CFG_RPMB_FS_RD_ENTRIES ?= 8 182 183# Enables caching of FAT FS entries when set to a value greater than zero. 184# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 185# entries. The cache is populated when FAT FS entries are initially read in. 186# When traversing the FAT FS entries, we read from the cache instead of reading 187# in the entries from RPMB storage. Consequently, when a FAT FS entry is 188# written, the cache is updated. In scenarios where an estimate of the number 189# of FAT FS entries can be made, the cache may be specifically tailored to 190# store all entries. The caching can improve RPMB I/O at the cost 191# of additional memory. 192# Without caching, we temporarily require 193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 194# while traversing the FAT FS (e.g. in read_fat). 195# For example 8*256 bytes = 2kB while in read_fat. 196# With caching, we constantly require up to 197# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 198# depending on how many elements are in the cache, and additional temporary 199# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 200# in case the cache is too small to hold all elements when traversing. 201CFG_RPMB_FS_CACHE_ENTRIES ?= 0 202 203# Print RPMB data frames sent to and received from the RPMB device 204CFG_RPMB_FS_DEBUG_DATA ?= n 205 206# Clear RPMB content at cold boot 207CFG_RPMB_RESET_FAT ?= n 208 209# Use a hard coded RPMB key instead of deriving it from the platform HUK 210CFG_RPMB_TESTKEY ?= n 211 212# Enables RPMB key programming by the TEE, in case the RPMB partition has not 213# been configured yet. 214# !!! Security warning !!! 215# Do *NOT* enable this in product builds, as doing so would allow the TEE to 216# leak the RPMB key. 217# This option is useful in the following situations: 218# - Testing 219# - RPMB key provisioning in a controlled environment (factory setup) 220CFG_RPMB_WRITE_KEY ?= n 221 222_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 223 224# Signing key for OP-TEE TA's 225# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 226# key and then set TA_PUBLIC_KEY to match public key from the HSM. 227# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 228TA_SIGN_KEY ?= keys/default_ta.pem 229TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 230 231# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used 232# to verify a TA instead. To sign a TA using a previously prepared subkey 233# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS. It is 234# typically used by assigning the following in the TA Makefile: 235# BINARY = <TA-uuid-string> 236# TA_SIGN_KEY = subkey.pem 237# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta 238# TA_SUBKEY_DEPS = subkey.bin 239# See the documentation for more details on subkeys. 240 241# Include lib/libutils/isoc in the build? Most platforms need this, but some 242# may not because they obtain the isoc functions from elsewhere 243CFG_LIBUTILS_WITH_ISOC ?= y 244 245# Enables floating point support for user TAs 246# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 247# hard-float is basically a super set of soft-float. Hard-float 248# requires all the support routines provided for soft-float, but the 249# compiler may choose to optimize to not use some of them and use 250# the floating-point registers instead. 251# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 252# nothing with ` -mgeneral-regs-only`) 253# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 254CFG_TA_FLOAT_SUPPORT ?= y 255 256# Stack unwinding: print a stack dump to the console on core or TA abort, or 257# when a TA panics. 258# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 259# unwound (not paged TAs, however). 260# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 261# this option will increase the size of the 32-bit TEE binary by a few KB. 262# Similarly, TAs have to be compiled with -funwind-tables (default when the 263# option is set) otherwise they can't be unwound. 264# Warning: since the unwind sequence for user-mode (TA) code is implemented in 265# the privileged layer of OP-TEE, enabling this feature will weaken the 266# user/kernel isolation. Therefore it should be disabled in release builds. 267ifeq ($(CFG_TEE_CORE_DEBUG),y) 268CFG_UNWIND ?= y 269endif 270 271# Enable support for dynamically loaded user TAs 272CFG_WITH_USER_TA ?= y 273 274# Build user TAs included in this source tree 275CFG_BUILD_IN_TREE_TA ?= y 276 277# Choosing the architecture(s) of user-mode libraries (used by TAs) 278# 279# Platforms may define a list of supported architectures for user-mode code 280# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 281# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 282# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 283# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 284# The first entry in $(supported-ta-targets) has a special role, see 285# CFG_USER_TA_TARGET_<ta-name> below. 286# 287# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 288# change the order of the values. 289# 290# The list of TA architectures is ultimately stored in $(ta-targets). 291 292# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 293# defined, selects the unique TA architecture mode for building the in-tree TA 294# <ta-name>. Can be either ta_arm32 or ta_arm64. 295# By default, in-tree TAs are built using the first architecture specified in 296# $(ta-targets). 297 298# Address Space Layout Randomization for user-mode Trusted Applications 299# 300# When this flag is enabled, the ELF loader will introduce a random offset 301# when mapping the application in user space. ASLR makes the exploitation of 302# memory corruption vulnerabilities more difficult. 303CFG_TA_ASLR ?= y 304 305# How much ASLR may shift the base address (in pages). The base address is 306# randomly shifted by an integer number of pages comprised between these two 307# values. Bigger ranges are more secure because they make the addresses harder 308# to guess at the expense of using more memory for the page tables. 309CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 310CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 311 312# Address Space Layout Randomization for TEE Core 313# 314# When this flag is enabled, the early init code will introduce a random 315# offset when mapping TEE Core. ASLR makes the exploitation of memory 316# corruption vulnerabilities more difficult. 317CFG_CORE_ASLR ?= y 318 319# Stack Protection for TEE Core 320# This flag enables the compiler stack protection mechanisms -fstack-protector. 321# It will check the stack canary value before returning from a function to 322# prevent buffer overflow attacks. Stack protector canary logic will be added 323# for vulnerable functions that contain: 324# - A character array larger than 8 bytes. 325# - An 8-bit integer array larger than 8 bytes. 326# - A call to alloca() with either a variable size or a constant size bigger 327# than 8 bytes. 328CFG_CORE_STACK_PROTECTOR ?= n 329# This enable stack protector flag -fstack-protector-strong. Stack protector 330# canary logic will be added for vulnerable functions that contain: 331# - An array of any size and type. 332# - A call to alloca(). 333# - A local variable that has its address taken. 334CFG_CORE_STACK_PROTECTOR_STRONG ?= y 335# This enable stack protector flag -fstack-protector-all. Stack protector canary 336# logic will be added to all functions regardless of their vulnerability. 337CFG_CORE_STACK_PROTECTOR_ALL ?= n 338# Stack Protection for TA 339CFG_TA_STACK_PROTECTOR ?= n 340CFG_TA_STACK_PROTECTOR_STRONG ?= y 341CFG_TA_STACK_PROTECTOR_ALL ?= n 342 343_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \ 344 CFG_CORE_STACK_PROTECTOR_STRONG \ 345 CFG_CORE_STACK_PROTECTOR_ALL) 346_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \ 347 CFG_TA_STACK_PROTECTOR_STRONG \ 348 CFG_TA_STACK_PROTECTOR_ALL) 349 350# Load user TAs from the REE filesystem via tee-supplicant 351CFG_REE_FS_TA ?= y 352 353# Pre-authentication of TA binaries loaded from the REE filesystem 354# 355# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 356# "Secure DDR" pool, check the signature, then process the file only if it is 357# valid. 358# - If disabled: hash the binaries as they are being processed and verify the 359# signature as a last step. 360CFG_REE_FS_TA_BUFFERED ?= n 361$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 362 363# When CFG_REE_FS=y: 364# Allow secure storage in the REE FS to be entirely deleted without causing 365# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 366# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 367# can be used to reset the secure storage to a clean, empty state. 368# Intended to be used for testing only since it weakens storage security. 369# Warning: If enabled for release build then it will break rollback protection 370# of TAs and the entire REE FS secure storage. 371CFG_REE_FS_ALLOW_RESET ?= n 372 373# Support for loading user TAs from a special section in the TEE binary. 374# Such TAs are available even before tee-supplicant is available (hence their 375# name), but note that many services exported to TAs may need tee-supplicant, 376# so early use is limited to a subset of the TEE Internal Core API (crypto...) 377# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 378# file(s). For example: 379# $ make ... \ 380# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 381# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 382# Typical build steps: 383# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 384# # headers, makefiles), ready to build TAs. 385# # CFG_EARLY_TA=y is optional, it prevents 386# # later library recompilations. 387# <build some TAs> 388# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 389# 390# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 391# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 392# <name-of-ta>/<uuid> 393# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 394ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 395$(call force,CFG_EARLY_TA,y) 396else 397CFG_EARLY_TA ?= n 398endif 399 400ifeq ($(CFG_EARLY_TA),y) 401$(call force,CFG_EMBEDDED_TS,y) 402endif 403 404ifneq ($(SP_PATHS),) 405$(call force,CFG_EMBEDDED_TS,y) 406else 407CFG_SECURE_PARTITION ?= n 408endif 409 410ifeq ($(CFG_SECURE_PARTITION),y) 411$(call force,CFG_EMBEDDED_TS,y) 412endif 413 414ifeq ($(CFG_EMBEDDED_TS),y) 415$(call force,CFG_ZLIB,y) 416endif 417 418# By default the early TAs are compressed in the TEE binary, it is possible to 419# not compress them with CFG_EARLY_TA_COMPRESS=n 420CFG_EARLY_TA_COMPRESS ?= y 421 422# Enable paging, requires SRAM, can't be enabled by default 423CFG_WITH_PAGER ?= n 424 425# Use the pager for user TAs 426CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 427 428# If paging of user TAs, that is, R/W paging default to enable paging of 429# TAG and IV in order to reduce heap usage. 430CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 431 432# Runtime lock dependency checker: ensures that a proper locking hierarchy is 433# used in the TEE core when acquiring and releasing mutexes. Any violation will 434# cause a panic as soon as the invalid locking condition is detected. If 435# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 436# records the call stacks when locks are taken, and prints them when a 437# potential deadlock is found. 438# Expect a significant performance impact when enabling this. 439CFG_LOCKDEP ?= n 440CFG_LOCKDEP_RECORD_STACK ?= y 441 442# BestFit algorithm in bget reduces the fragmentation of the heap when running 443# with the pager enabled or lockdep 444CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 445 446# Enable support for detected undefined behavior in C 447# Uses a lot of memory, can't be enabled by default 448CFG_CORE_SANITIZE_UNDEFINED ?= n 449 450# Enable Kernel Address sanitizer, has a huge performance impact, uses a 451# lot of memory and need platform specific adaptations, can't be enabled by 452# default 453CFG_CORE_SANITIZE_KADDRESS ?= n 454 455ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR)) 456$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible) 457endif 458 459# Add stack guards before/after stacks and periodically check them 460CFG_WITH_STACK_CANARIES ?= y 461 462# Use compiler instrumentation to troubleshoot stack overflows. 463# When enabled, most C functions check the stack pointer against the current 464# stack limits on entry and panic immediately if it is out of range. 465CFG_CORE_DEBUG_CHECK_STACKS ?= n 466 467# Use when the default stack allocations are not sufficient. 468CFG_STACK_THREAD_EXTRA ?= 0 469CFG_STACK_TMP_EXTRA ?= 0 470 471# Device Tree support 472# 473# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 474# device tree blob (DTB) parsing from the core. 475# 476# When CFG_DT is enabled, the TEE _start function expects to find 477# the address of a DTB in register X2/R2 provided by the early boot stage 478# or value 0 if boot stage provides no DTB. 479# 480# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 481# and the external device tree is expected to be used/modified. Its value 482# defaults to CFG_DT. 483# 484# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 485# be in the secure memory. 486# 487# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 488# relative path of a DTS file located in core/arch/$(ARCH)/dts. 489# The DTS file is compiled into a DTB file which content is embedded in a 490# read-only section of the core. 491ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 492CFG_EMBED_DTB ?= y 493endif 494ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 495 $(CFG_CORE_EL3_SPMC)),y) 496$(call force,CFG_DT,y) 497endif 498CFG_EMBED_DTB ?= n 499CFG_DT ?= n 500CFG_EXTERNAL_DT ?= $(CFG_DT) 501CFG_MAP_EXT_DT_SECURE ?= n 502ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 503$(call force,CFG_DT,y) 504endif 505 506# This option enables OP-TEE to support boot arguments handover via Transfer 507# List defined in Firmware Handoff specification. 508# Note: This is an experimental feature and incompatible ABI changes can be 509# expected. It should be off by default until Firmware Handoff specification 510# has a stable release. 511# This feature requires the support of Device Tree. 512CFG_TRANSFER_LIST ?= n 513ifeq ($(CFG_TRANSFER_LIST),y) 514$(call force,CFG_DT,y) 515$(call force,CFG_EXTERNAL_DT,y) 516$(call force,CFG_MAP_EXT_DT_SECURE,y) 517endif 518 519# Maximum size of the Device Tree Blob, has to be large enough to allow 520# editing of the supplied DTB. 521CFG_DTB_MAX_SIZE ?= 0x10000 522 523# Maximum size of the init info data passed to Secure Partitions. 524CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 525 526# Device Tree Overlay support. 527# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 528# external DTB. The overlay is created when no valid DTB overlay is found. 529# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 530# DTB location. 531# External DTB location (physical address) is provided either by boot 532# argument arg2 or from CFG_DT_ADDR if defined. 533# A subsequent boot stage can then merge the generated overlay DTB into a main 534# DTB using the standard fdt_overlay_apply() method. 535CFG_EXTERNAL_DTB_OVERLAY ?= n 536CFG_GENERATE_DTB_OVERLAY ?= n 537 538ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 539$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 540endif 541_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 542 CFG_GENERATE_DTB_OVERLAY) 543 544# All embedded tests are supposed to be disabled by default, this flag 545# is used to control the default value of all other embedded tests 546CFG_ENABLE_EMBEDDED_TESTS ?= n 547 548# Enable core self tests and related pseudo TAs 549CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 550 551# Compiles bget_main_test() to be called from a test TA 552CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 553 554# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests. 555# This also requires embedding a DTB with expected content. 556# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 557# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 558CFG_DT_DRIVER_EMBEDDED_TEST ?= n 559ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 560CFG_DRIVERS_CLK ?= y 561CFG_DRIVERS_GPIO ?= y 562CFG_DRIVERS_RSTCTRL ?= y 563CFG_DRIVERS_CLK_EARLY_PROBE ?= n 564$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 565endif 566 567# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure 568# clients to retrieve debug and statistics information on core and loaded TAs. 569CFG_WITH_STATS ?= n 570 571# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 572# parsing in the embedded DTB for driver probing. The alternative is 573# an exploration based on compatible drivers found. It is default disabled. 574CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 575 576# This option enables OP-TEE to respond to SMP boot request: the Rich OS 577# issues this to request OP-TEE to release secondaries cores out of reset, 578# with specific core number and non-secure entry address. 579CFG_BOOT_SECONDARY_REQUEST ?= n 580 581# Default heap size for Core, 64 kB 582CFG_CORE_HEAP_SIZE ?= 65536 583 584# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION 585# is enabled 586CFG_CORE_NEX_HEAP_SIZE ?= 16384 587 588# TA profiling. 589# When this option is enabled, OP-TEE can execute Trusted Applications 590# instrumented with GCC's -pg flag and will output profiling information 591# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 592# tee-supplicant) 593# Note: this does not work well with shared libraries at the moment for a 594# couple of reasons: 595# 1. The profiling code assumes a unique executable section in the TA VA space. 596# 2. The code used to detect at run time if the TA is intrumented assumes that 597# the TA is linked statically. 598CFG_TA_GPROF_SUPPORT ?= n 599 600# TA function tracing. 601# When this option is enabled, OP-TEE can execute Trusted Applications 602# instrumented with GCC's -pg flag and will output function tracing 603# information for all functions compiled with -pg to 604# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant). 605CFG_FTRACE_SUPPORT ?= n 606 607# Core syscall function tracing. 608# When this option is enabled, OP-TEE core is instrumented with GCC's 609# -pg flag and will output syscall function graph in user TA ftrace 610# buffer 611CFG_SYSCALL_FTRACE ?= n 612$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 613 614# Enable to compile user TA libraries with profiling (-pg). 615# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 616CFG_ULIBS_MCOUNT ?= n 617# Profiling/tracing of syscall wrapper (utee_*) 618CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 619 620ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 621ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 622$(error Cannot instrument user libraries if user mode profiling is disabled) 623endif 624endif 625 626# Build libutee, libutils, libmbedtls as shared libraries. 627# - Static libraries are still generated when this is enabled, but TAs will use 628# the shared libraries unless explicitly linked with the -static flag. 629# - Shared libraries are made of two files: for example, libutee is 630# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 631# is a totally standard shared object, and should be used to link against. 632# The '.ta' file is a signed version of the '.so' and should be installed 633# in the same way as TAs so that they can be found at runtime. 634CFG_ULIBS_SHARED ?= n 635 636ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 637$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 638endif 639 640# CFG_GP_SOCKETS 641# Enable Global Platform Sockets support 642CFG_GP_SOCKETS ?= y 643 644# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 645# invocation parameters referring to specific secure memories). 646CFG_SECURE_DATA_PATH ?= n 647 648# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 649# TA binaries are stored encrypted in the REE FS and are protected by 650# metadata in secure storage. 651CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 652$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 653 654# Enable the pseudo TA that managages TA storage in secure storage 655CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 656$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 657 658# Enable the pseudo TA for misc. auxilary services, extending existing 659# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 660# pool etc...) 661CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 662$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 663 664# Enable the pseudo TA for enumeration of TEE based devices for the normal 665# world OS. 666CFG_DEVICE_ENUM_PTA ?= y 667 668# The attestation pseudo TA provides an interface to request measurements of 669# a TA or the TEE binary. 670CFG_ATTESTATION_PTA ?= n 671$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 672 673# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 674# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 675# note that such a low value is not secure. 676# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 677# https://tools.ietf.org/html/rfc8017#section-9.1.1 678# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 679# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 680CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 681 682# Define the number of cores per cluster used in calculating core position. 683# The cluster number is shifted by this value and added to the core ID, 684# so its value represents log2(cores/cluster). 685# Default is 2**(2) = 4 cores per cluster. 686CFG_CORE_CLUSTER_SHIFT ?= 2 687 688# Define the number of threads per core used in calculating processing 689# element's position. The core number is shifted by this value and added to 690# the thread ID, so its value represents log2(threads/core). 691# Default is 2**(0) = 1 threads per core. 692CFG_CORE_THREAD_SHIFT ?= 0 693 694# Enable support for dynamic shared memory (shared memory anywhere in 695# non-secure memory). 696CFG_CORE_DYN_SHM ?= y 697 698# Enable support for reserved shared memory (shared memory in a carved out 699# memory area). 700CFG_CORE_RESERVED_SHM ?= y 701 702# Enables support for larger physical addresses, that is, it will define 703# paddr_t as a 64-bit type. 704CFG_CORE_LARGE_PHYS_ADDR ?= n 705 706# Define the maximum size, in bits, for big numbers in the Internal Core API 707# Arithmetical functions. This does *not* influence the key size that may be 708# manipulated through the Cryptographic API. 709# Set this to a lower value to reduce the TA memory footprint. 710CFG_TA_BIGNUM_MAX_BITS ?= 2048 711 712# Not used since libmpa was removed. Force the values to catch build scripts 713# that would set = n. 714$(call force,CFG_TA_MBEDTLS_MPI,y) 715$(call force,CFG_TA_MBEDTLS,y) 716 717# Compile the TA library mbedTLS with self test functions, the functions 718# need to be called to test anything 719CFG_TA_MBEDTLS_SELF_TEST ?= y 720 721# By default use tomcrypt as the main crypto lib providing an implementation 722# for the API in <crypto/crypto.h> 723# CFG_CRYPTOLIB_NAME is used as libname and 724# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 725# 726# It's also possible to configure to use mbedtls instead of tomcrypt. 727# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 728# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 729CFG_CRYPTOLIB_NAME ?= tomcrypt 730CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 731 732# Not used since libmpa was removed. Force the value to catch build scripts 733# that would set = n. 734$(call force,CFG_CORE_MBEDTLS_MPI,y) 735 736# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in 737# the non-secure world. OP-TEE will not work without a compatible hypervisor 738# in the non-secure world if this option is enabled. 739# 740# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is 741# deprecated as the configuration switch name was ambiguous regarding which 742# world has virtualization enabled. 743ifneq (undefined,$(flavor CFG_VIRTUALIZATION)) 744$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead) 745CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION) 746ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION)) 747$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION)) 748endif 749endif # CFG_VIRTUALIZATION defined 750CFG_NS_VIRTUALIZATION ?= n 751 752ifeq ($(CFG_NS_VIRTUALIZATION),y) 753$(call force,CFG_CORE_RODATA_NOEXEC,y) 754$(call force,CFG_CORE_RWDATA_NOEXEC,y) 755 756# Default number of virtual guests 757CFG_VIRT_GUEST_COUNT ?= 2 758endif 759 760# Enables backwards compatible derivation of RPMB and SSK keys 761CFG_CORE_HUK_SUBKEY_COMPAT ?= y 762 763# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 764# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 765CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 766 767# Compress and encode conf.mk into the TEE core, and show the encoded string on 768# boot (with severity TRACE_INFO). 769CFG_SHOW_CONF_ON_BOOT ?= n 770 771# Enables support for passing a TPM Event Log stored in secure memory 772# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 773# taken before the service was up and running. 774CFG_CORE_TPM_EVENT_LOG ?= n 775 776# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 777# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 778# 779# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 780# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 781# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 782# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 783# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 784# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 785# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 786# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 787CFG_SCMI_MSG_DRIVERS ?= n 788ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 789CFG_SCMI_MSG_CLOCK ?= n 790CFG_SCMI_MSG_RESET_DOMAIN ?= n 791CFG_SCMI_MSG_SHM_MSG ?= n 792CFG_SCMI_MSG_SMT ?= n 793CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 794CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 795CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 796CFG_SCMI_MSG_THREAD_ENTRY ?= n 797CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 798$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 799$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 800$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 801ifeq ($(CFG_SCMI_MSG_SMT),y) 802_CFG_SCMI_PTA_SMT_HEADER := y 803endif 804ifeq ($(CFG_SCMI_MSG_SHM_MSG),y) 805_CFG_SCMI_PTA_MSG_HEADER := y 806endif 807endif 808 809# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation 810# from SCP-firmware package as an built-in SCMI stack in core. This 811# configuration mandates target product identifier is configured with 812# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with 813# CFG_SCP_FIRMWARE. 814CFG_SCMI_SCPFW ?= n 815 816ifeq ($(CFG_SCMI_SCPFW),y) 817$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW) 818ifeq (,$(CFG_SCMI_SCPFW_PRODUCT)) 819$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration) 820endif 821ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt)) 822$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration) 823endif 824endif #CFG_SCMI_SCPFW 825 826ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y) 827$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive) 828endif 829 830# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for 831# the platform SCMI server and implements the platform plat_scmi_clock_*() 832# functions. 833CFG_SCMI_MSG_USE_CLK ?= n 834$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS)) 835 836# Enable SCMI PTA interface for REE SCMI agents 837CFG_SCMI_PTA ?= n 838ifeq ($(CFG_SCMI_PTA),y) 839_CFG_SCMI_PTA_SMT_HEADER ?= n 840_CFG_SCMI_PTA_MSG_HEADER ?= n 841endif 842 843ifneq ($(CFG_STMM_PATH),) 844$(call force,CFG_WITH_STMM_SP,y) 845else 846CFG_WITH_STMM_SP ?= n 847endif 848ifeq ($(CFG_WITH_STMM_SP),y) 849$(call force,CFG_ZLIB,y) 850endif 851 852# When enabled checks that buffers passed to the GP Internal Core API 853# comply with the rules added as annotations as part of the definition of 854# the API. For example preventing buffers in non-secure shared memory when 855# not allowed. 856CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 857 858# When enabled accepts the DES key sizes excluding parity bits as in 859# the GP Internal API Specification v1.0 860CFG_COMPAT_GP10_DES ?= y 861 862# Defines a limit for many levels TAs may call each others. 863CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 864 865# Pseudo-TA to export hardware RNG output to Normal World 866# RNG characteristics are platform specific 867CFG_HWRNG_PTA ?= n 868ifeq ($(CFG_HWRNG_PTA),y) 869# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 870CFG_HWRNG_RATE ?= 0 871# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 872ifeq (,$(CFG_HWRNG_QUALITY)) 873$(error CFG_HWRNG_QUALITY not defined) 874endif 875endif 876 877# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 878# shared memory for each secure thread. When disabled, RPC shared 879# memory is released once the secure thread has completed is execution. 880ifeq ($(CFG_WITH_PAGER),y) 881CFG_PREALLOC_RPC_CACHE ?= n 882endif 883CFG_PREALLOC_RPC_CACHE ?= y 884 885# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 886# This clock framework allows to describe clock tree and provides functions to 887# get and configure the clocks. 888# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 889# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 890# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 891# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree 892# state on OP-TEE core console with the debug trace level. 893CFG_DRIVERS_CLK ?= n 894CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 895CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 896CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 897CFG_DRIVERS_CLK_PRINT_TREE ?= n 898 899$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 900$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 901 902# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 903# OP-TEE core to provide reset controls on subsystems of the devices. 904CFG_DRIVERS_RSTCTRL ?= n 905 906# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in 907# OP-TEE core to provide GPIO support for drivers. 908CFG_DRIVERS_GPIO ?= n 909 910# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support. 911CFG_DRIVERS_I2C ?= n 912 913# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem 914# providers and allow consumer drivers to get NVMEM cells using the Device Tree. 915CFG_DRIVERS_NVMEM ?= n 916 917# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in 918# OP-TEE core to provide drivers a way to apply pin muxing configurations based 919# on device-tree. 920CFG_DRIVERS_PINCTRL ?= n 921 922# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in 923# OP-TEE core to provide drivers a common regulator interface and describe 924# the regulators dependencies using an embedded device tree. 925# 926# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for 927# DT compatible "regulator-fixed" devices. 928# 929# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for 930# DT compatible "regulator-gpio" devices. 931# 932# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the 933# regulator tree state on OP-TEE core console with the info trace level. 934CFG_DRIVERS_REGULATOR ?= n 935CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n 936CFG_REGULATOR_FIXED ?= n 937CFG_REGULATOR_GPIO ?= n 938 939$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \ 940 CFG_DRIVERS_REGULATOR CFG_DT)) 941$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \ 942 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO)) 943 944# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core 945# and shows a print (info level) when booting up the device that 946# indicates that the board runs a standard developer configuration. 947# 948# A developer configuration doesn't necessarily have to be secure. The intention 949# is that the one making products based on OP-TEE should override this flag in 950# plat-xxx/conf.mk for the platform they're basing their products on after 951# they've finalized implementing stubbed functionality (see OP-TEE 952# documentation/Porting guidelines) as well as vendor specific security 953# configuration. 954# 955# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated. 956ifneq (undefined,$(flavor CFG_WARN_INSECURE)) 957$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead) 958CFG_INSECURE ?= $(CFG_WARN_INSECURE) 959ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE)) 960$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE)) 961endif 962endif # CFG_WARN_INSECURE defined 963CFG_INSECURE ?= y 964 965# Enables warnings for declarations mixed with statements 966CFG_WARN_DECL_AFTER_STATEMENT ?= y 967 968# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 969# mechanism to limit the set of locations to which computed branch instructions 970# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 971# that support it, enable this option. A GCC toolchain built with 972# --enable-standard-branch-protection is needed to use this option. 973CFG_CORE_BTI ?= n 974 975$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 976 977# To make use of BTI in user space libraries and TA's on CPU's that support it, 978# enable this option. 979CFG_TA_BTI ?= $(CFG_CORE_BTI) 980 981$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 982 983ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 984$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible) 985endif 986 987ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 988$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 989endif 990 991# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 992# and key access to memory. This is a hardware supported alternative to 993# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 994CFG_MEMTAG ?= n 995 996$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 997ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 998$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 999endif 1000ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 1001$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 1002endif 1003 1004# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be 1005# used to restrict accesses to unprivileged memory from privileged mode. 1006# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN. 1007CFG_PAN ?= n 1008 1009$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core)) 1010 1011ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 1012 $(CFG_CORE_EL3_SPMC)),y) 1013# FF-A case, handled via the FF-A ABI 1014CFG_CORE_ASYNC_NOTIF ?= y 1015$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n) 1016else 1017# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support 1018# for sending asynchronous notifications to normal world. 1019# Interrupt ID must be configurged by the platform too. Currently is only 1020# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 1021CFG_CORE_ASYNC_NOTIF ?= n 1022$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF)) 1023endif 1024 1025# Enable callout service 1026CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF) 1027 1028# Enable notification based test watchdog 1029CFG_NOTIF_TEST_WD ?= $(CFG_ENABLE_EMBEDDED_TESTS) 1030$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \ 1031 CFG_CORE_ASYNC_NOTIF)) 1032 1033$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 1034 CFG_WITH_STATS)) 1035 1036# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 1037# for signing and authenticating pointers against secret keys. These can 1038# be used to mitigate ROP (Return oriented programming) attacks. This is 1039# currently done by instructing the compiler to add paciasp/autiasp at the 1040# begging and end of functions to sign and verify ELR. 1041# 1042# The CFG_CORE_PAUTH enables these instructions for the core parts 1043# executing at EL1, with one secret key per thread and one secret key per 1044# physical CPU. 1045# 1046# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 1047# this option is enabled, TEE core will initialize secret keys per TA. 1048CFG_CORE_PAUTH ?= n 1049CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 1050 1051$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 1052$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 1053 1054ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 1055$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 1056endif 1057ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 1058$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 1059endif 1060 1061ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 1062$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1063endif 1064 1065ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 1066$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1067endif 1068 1069# Enable support for generic watchdog registration 1070# This watchdog will then be usable by non-secure world through SMC calls. 1071CFG_WDT ?= n 1072 1073# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 1074CFG_WDT_SM_HANDLER ?= n 1075 1076$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 1077 1078# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements 1079# arm-smc-wdt service. Platform can also override this ID with a platform 1080# specific SMC function ID to access arm-smc-wdt service thanks to 1081# optional config switch CFG_WDT_SM_HANDLER_ID. 1082CFG_WDT_SM_HANDLER_ID ?= 0x82003D06 1083 1084# Allow using the udelay/mdelay function for platforms without ARM generic timer 1085# extension. When set to 'n', the plat_get_freq() function must be defined by 1086# the platform code 1087CFG_CORE_HAS_GENERIC_TIMER ?= y 1088 1089# Enable RTC API 1090CFG_DRIVERS_RTC ?= n 1091 1092# Enable PTA for RTC access from non-secure world 1093CFG_RTC_PTA ?= n 1094 1095# Enable the FF-A SPMC tests in xtests 1096CFG_SPMC_TESTS ?= n 1097 1098# Allocate the translation tables needed to map the S-EL0 application 1099# loaded 1100CFG_CORE_PREALLOC_EL0_TBLS ?= n 1101ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 1102$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 1103endif 1104 1105# User TA runtime context dump. 1106# When this option is enabled, OP-TEE provides a debug method for 1107# developer to dump user TA's runtime context, including TA's heap stats. 1108# Developer can open a stats PTA session and then invoke command 1109# STATS_CMD_TA_STATS to get the context of loaded TAs. 1110CFG_TA_STATS ?= n 1111 1112# Enables best effort mitigations against fault injected when the hardware 1113# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h 1114CFG_FAULT_MITIGATION ?= y 1115 1116# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note 1117# that this doesn't affect libutee itself, it's only the TAs compiled with 1118# this set that are affected. Each out-of-tree must set this if to enable 1119# compatibility with version v1.1 as the value of this variable is not 1120# preserved in the TA dev-kit. 1121CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n 1122 1123# Change supported HMAC key size range, from 64 to 1024. 1124# This is needed to pass AOSP Keymaster VTS tests: 1125# Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp 1126# Module: VtsHalKeymasterV3_0TargetTest 1127# Testcases: - PerInstance/SigningOperationsTest# 1128# - PerInstance/NewKeyGenerationTest# 1129# - PerInstance/ImportKeyTest# 1130# - PerInstance/EncryptionOperationsTest# 1131# - PerInstance/AttestationTest# 1132# Note that this violates GP requirements of HMAC size range. 1133CFG_HMAC_64_1024_RANGE ?= n 1134 1135# Enable a hardware pbkdf2 function 1136# By default use standard pbkdf2 implementation 1137CFG_CRYPTO_HW_PBKDF2 ?= n 1138$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2)) 1139 1140# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the 1141# other cores. The feature currently relies on GIC device to trap the other 1142# cores using an SGI interrupt specified by CFG_HALT_CORES_ON_PANIC_SGI. 1143CFG_HALT_CORES_ON_PANIC ?= n 1144CFG_HALT_CORES_ON_PANIC_SGI ?= 15 1145$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_GIC)) 1146 1147# Enable automatic discovery of maximal PA supported by the hardware and 1148# use that. Provides easier configuration of virtual platforms where the 1149# maximal PA can vary. 1150CFG_AUTO_MAX_PA_BITS ?= n 1151 1152# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor 1153# management including generic DT bindings for the configuration. 1154CFG_DRIVERS_REMOTEPROC ?= n 1155 1156# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA 1157# service. 1158CFG_REMOTEPROC_PTA ?= n 1159 1160# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure 1161# DTB as OP-TEE HUK. 1162CFG_WIDEVINE_HUK ?= n 1163$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT)) 1164 1165# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under 1166# DT node "/options/op-tee/widevine" to some specific TAs. 1167CFG_WIDEVINE_PTA ?= n 1168$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK)) 1169 1170# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver. 1171# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes 1172# trace messages from/to the debug terminal of the semihosting host computer. 1173# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console 1174# outputs trace messages to that file. Output to "optee.log" by default. 1175CFG_SEMIHOSTING_CONSOLE ?= n 1176ifeq ($(CFG_SEMIHOSTING_CONSOLE),y) 1177$(call force,CFG_SEMIHOSTING,y) 1178endif 1179CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log" 1180ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),) 1181$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty) 1182endif 1183 1184# Semihosting is a debugging mechanism that enables code running on an embedded 1185# system (also called the target) to communicate with and use the I/O of the 1186# host computer. 1187CFG_SEMIHOSTING ?= n 1188