xref: /optee_os/core/include/dt-bindings/reset/stm32mp1-resets.h (revision b46e2b4d1375760a7683d75081ee6d6cb586eb04)
112941fdcSEtienne Carriere /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
212941fdcSEtienne Carriere /*
312941fdcSEtienne Carriere  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
412941fdcSEtienne Carriere  * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
512941fdcSEtienne Carriere  */
612941fdcSEtienne Carriere 
712941fdcSEtienne Carriere #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
812941fdcSEtienne Carriere #define _DT_BINDINGS_STM32MP1_RESET_H_
912941fdcSEtienne Carriere 
108500b618SLionel Debieve #define MCU_HOLD_BOOT_R	2144
1112941fdcSEtienne Carriere #define LTDC_R		3072
1212941fdcSEtienne Carriere #define DSI_R		3076
1312941fdcSEtienne Carriere #define DDRPERFM_R	3080
1412941fdcSEtienne Carriere #define USBPHY_R	3088
1512941fdcSEtienne Carriere #define SPI6_R		3136
1612941fdcSEtienne Carriere #define I2C4_R		3138
1712941fdcSEtienne Carriere #define I2C6_R		3139
1812941fdcSEtienne Carriere #define USART1_R	3140
1912941fdcSEtienne Carriere #define STGEN_R		3156
2012941fdcSEtienne Carriere #define GPIOZ_R		3200
2112941fdcSEtienne Carriere #define CRYP1_R		3204
2212941fdcSEtienne Carriere #define HASH1_R		3205
2312941fdcSEtienne Carriere #define RNG1_R		3206
2412941fdcSEtienne Carriere #define AXIM_R		3216
2512941fdcSEtienne Carriere #define GPU_R		3269
2612941fdcSEtienne Carriere #define ETHMAC_R	3274
2712941fdcSEtienne Carriere #define FMC_R		3276
2812941fdcSEtienne Carriere #define QSPI_R		3278
2912941fdcSEtienne Carriere #define SDMMC1_R	3280
3012941fdcSEtienne Carriere #define SDMMC2_R	3281
3112941fdcSEtienne Carriere #define CRC1_R		3284
3212941fdcSEtienne Carriere #define USBH_R		3288
3312941fdcSEtienne Carriere #define MDMA_R		3328
34*b46e2b4dSEtienne Carriere #define MPSYST_R	8224
3512941fdcSEtienne Carriere #define MCU_R		8225
3612941fdcSEtienne Carriere #define TIM2_R		19456
3712941fdcSEtienne Carriere #define TIM3_R		19457
3812941fdcSEtienne Carriere #define TIM4_R		19458
3912941fdcSEtienne Carriere #define TIM5_R		19459
4012941fdcSEtienne Carriere #define TIM6_R		19460
4112941fdcSEtienne Carriere #define TIM7_R		19461
4212941fdcSEtienne Carriere #define TIM12_R		16462
4312941fdcSEtienne Carriere #define TIM13_R		16463
4412941fdcSEtienne Carriere #define TIM14_R		16464
4512941fdcSEtienne Carriere #define LPTIM1_R	19465
4612941fdcSEtienne Carriere #define SPI2_R		19467
4712941fdcSEtienne Carriere #define SPI3_R		19468
4812941fdcSEtienne Carriere #define USART2_R	19470
4912941fdcSEtienne Carriere #define USART3_R	19471
5012941fdcSEtienne Carriere #define UART4_R		19472
5112941fdcSEtienne Carriere #define UART5_R		19473
5212941fdcSEtienne Carriere #define UART7_R		19474
5312941fdcSEtienne Carriere #define UART8_R		19475
5412941fdcSEtienne Carriere #define I2C1_R		19477
5512941fdcSEtienne Carriere #define I2C2_R		19478
5612941fdcSEtienne Carriere #define I2C3_R		19479
5712941fdcSEtienne Carriere #define I2C5_R		19480
5812941fdcSEtienne Carriere #define SPDIF_R		19482
5912941fdcSEtienne Carriere #define CEC_R		19483
6012941fdcSEtienne Carriere #define DAC12_R		19485
6112941fdcSEtienne Carriere #define MDIO_R		19847
6212941fdcSEtienne Carriere #define TIM1_R		19520
6312941fdcSEtienne Carriere #define TIM8_R		19521
6412941fdcSEtienne Carriere #define TIM15_R		19522
6512941fdcSEtienne Carriere #define TIM16_R		19523
6612941fdcSEtienne Carriere #define TIM17_R		19524
6712941fdcSEtienne Carriere #define SPI1_R		19528
6812941fdcSEtienne Carriere #define SPI4_R		19529
6912941fdcSEtienne Carriere #define SPI5_R		19530
7012941fdcSEtienne Carriere #define USART6_R	19533
7112941fdcSEtienne Carriere #define SAI1_R		19536
7212941fdcSEtienne Carriere #define SAI2_R		19537
7312941fdcSEtienne Carriere #define SAI3_R		19538
7412941fdcSEtienne Carriere #define DFSDM_R		19540
7512941fdcSEtienne Carriere #define FDCAN_R		19544
7612941fdcSEtienne Carriere #define LPTIM2_R	19584
7712941fdcSEtienne Carriere #define LPTIM3_R	19585
7812941fdcSEtienne Carriere #define LPTIM4_R	19586
7912941fdcSEtienne Carriere #define LPTIM5_R	19587
8012941fdcSEtienne Carriere #define SAI4_R		19592
8112941fdcSEtienne Carriere #define SYSCFG_R	19595
8212941fdcSEtienne Carriere #define VREF_R		19597
8312941fdcSEtienne Carriere #define TMPSENS_R	19600
8412941fdcSEtienne Carriere #define PMBCTRL_R	19601
8512941fdcSEtienne Carriere #define DMA1_R		19648
8612941fdcSEtienne Carriere #define DMA2_R		19649
8712941fdcSEtienne Carriere #define DMAMUX_R	19650
8812941fdcSEtienne Carriere #define ADC12_R		19653
8912941fdcSEtienne Carriere #define USBO_R		19656
9012941fdcSEtienne Carriere #define SDMMC3_R	19664
9112941fdcSEtienne Carriere #define CAMITF_R	19712
9212941fdcSEtienne Carriere #define CRYP2_R		19716
9312941fdcSEtienne Carriere #define HASH2_R		19717
9412941fdcSEtienne Carriere #define RNG2_R		19718
9512941fdcSEtienne Carriere #define CRC2_R		19719
9612941fdcSEtienne Carriere #define HSEM_R		19723
9712941fdcSEtienne Carriere #define MBOX_R		19724
9812941fdcSEtienne Carriere #define GPIOA_R		19776
9912941fdcSEtienne Carriere #define GPIOB_R		19777
10012941fdcSEtienne Carriere #define GPIOC_R		19778
10112941fdcSEtienne Carriere #define GPIOD_R		19779
10212941fdcSEtienne Carriere #define GPIOE_R		19780
10312941fdcSEtienne Carriere #define GPIOF_R		19781
10412941fdcSEtienne Carriere #define GPIOG_R		19782
10512941fdcSEtienne Carriere #define GPIOH_R		19783
10612941fdcSEtienne Carriere #define GPIOI_R		19784
10712941fdcSEtienne Carriere #define GPIOJ_R		19785
10812941fdcSEtienne Carriere #define GPIOK_R		19786
10912941fdcSEtienne Carriere 
1105055cc12SEtienne Carriere /* SCMI reset domain identifiers */
1113a5e9803SGatien Chevallier #define RST_SCMI_SPI6		0
1123a5e9803SGatien Chevallier #define RST_SCMI_I2C4		1
1133a5e9803SGatien Chevallier #define RST_SCMI_I2C6		2
1143a5e9803SGatien Chevallier #define RST_SCMI_USART1	3
1153a5e9803SGatien Chevallier #define RST_SCMI_STGEN		4
1163a5e9803SGatien Chevallier #define RST_SCMI_GPIOZ		5
1173a5e9803SGatien Chevallier #define RST_SCMI_CRYP1		6
1183a5e9803SGatien Chevallier #define RST_SCMI_HASH1		7
1193a5e9803SGatien Chevallier #define RST_SCMI_RNG1		8
1203a5e9803SGatien Chevallier #define RST_SCMI_MDMA		9
1213a5e9803SGatien Chevallier #define RST_SCMI_MCU		10
1223a5e9803SGatien Chevallier #define RST_SCMI_MCU_HOLD_BOOT	11
1235055cc12SEtienne Carriere 
12412941fdcSEtienne Carriere #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */
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