| #
b46e2b4d |
| 22-Aug-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
dt-bindings: define system reset controller for stm32mp1 flavors
Define DT binding ID related to system reset controller, for both
STM32MP15 and STM32MP13 variants.
Acked-by: Jens Wiklander <jens.w
dt-bindings: define system reset controller for stm32mp1 flavors
Define DT binding ID related to system reset controller, for both
STM32MP15 and STM32MP13 variants.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
3a5e9803 |
| 07-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: remove SCMI0 channel index
Removes index 0 from SCMI DT binding ID macros and driver labels to
synchronize with Linux kernel 5.18 that considers a single SCMI
channel, see [1] and [2]
plat-stm32mp1: remove SCMI0 channel index
Removes index 0 from SCMI DT binding ID macros and driver labels to
synchronize with Linux kernel 5.18 that considers a single SCMI
channel, see [1] and [2].
Link: [1] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-4-alexandre.torgue@foss.st.com
Link: [2] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-5-alexandre.torgue@foss.st.com
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
8500b618 |
| 02-Oct-2020 |
Lionel Debieve <lionel.debieve@st.com> |
plat-stm32mp1: use SCMI reset to manage MCU hold boot
Adding the MCU hold boot management through a SCMI dedicated
reset domain. MCU hold boot controls the MCU reboot sequence together
with MCU rese
plat-stm32mp1: use SCMI reset to manage MCU hold boot
Adding the MCU hold boot management through a SCMI dedicated
reset domain. MCU hold boot controls the MCU reboot sequence together
with MCU reset controller already exposed to SCMI agent 0.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
show more ...
|
| #
5055cc12 |
| 02-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
dt-bindings: stm32mp1: define SCMI reset domains
Define the platform SCMI reset domains for stm32mp1 family.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <je
dt-bindings: stm32mp1: define SCMI reset domains
Define the platform SCMI reset domains for stm32mp1 family.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
show more ...
|
| #
12941fdc |
| 30-Nov-2018 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: device tree platform description
This change introduces the device tree source files describing boards
EV1 and ED1 and the related bindings.
The stm32mp1 DTS files and bindings header fil
stm32mp1: device tree platform description
This change introduces the device tree source files describing boards
EV1 and ED1 and the related bindings.
The stm32mp1 DTS files and bindings header files are dumped from
latest Linux kernel (v4.19). Bindings documentation is not stored in
OP-TEE OS source tree, one shall refer to the bindings documentation
from latest Linux kernel source tree.
Note that license terms where changed for binding header file gpio.h
to release them under dual 2-Clause DSB/GPLv2.0 instead of GPLv2.0 as
release in the Linux kernel.
Platform relies on DT source file (CFG_EMBED_DTB_SOURCE_FILE) to
distinguish between the platform flavors for the few configuration
directive that are static and cannot be provided only through FDT.
Default configuration locates the secure DDR area (TZDRAM) from
the base address of the last 32MBytes of the DDR over 30Mbyte.
The last 2MBytes of the DDR are the OP-TEE static shared memory.
Many contributors not listed below.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|