1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) STMicroelectronics 2024 - All Rights Reserved 4 */ 5 6 #ifndef _DT_BINDINGS_CLOCK_ST_STM32MP25_RCC_H_ 7 #define _DT_BINDINGS_CLOCK_ST_STM32MP25_RCC_H_ 8 9 /* INTERNAL/EXTERNAL OSCILLATORS */ 10 #define HSI_CK 0 11 #define HSE_CK 1 12 #define MSI_CK 2 13 #define LSI_CK 3 14 #define LSE_CK 4 15 #define I2S_CK 5 16 #define RTC_CK 6 17 #define SPDIF_CK_SYMB 7 18 19 /* PLL CLOCKS */ 20 #define PLL1_CK 8 21 #define PLL2_CK 9 22 #define PLL3_CK 10 23 #define PLL4_CK 11 24 #define PLL5_CK 12 25 #define PLL6_CK 13 26 #define PLL7_CK 14 27 #define PLL8_CK 15 28 29 #define CK_CPU1 16 30 31 /* APB DIV CLOCKS */ 32 #define CK_ICN_APB1 17 33 #define CK_ICN_APB2 18 34 #define CK_ICN_APB3 19 35 #define CK_ICN_APB4 20 36 #define CK_ICN_APBDBG 21 37 38 /* GLOBAL TIMER */ 39 #define TIMG1_CK 22 40 #define TIMG2_CK 23 41 42 /* FLEXGEN CLOCKS */ 43 #define CK_ICN_HS_MCU 24 44 #define CK_ICN_SDMMC 25 45 #define CK_ICN_DDR 26 46 #define CK_ICN_DISPLAY 27 47 #define CK_ICN_HSL 28 48 #define CK_ICN_NIC 29 49 #define CK_ICN_VID 30 50 #define CK_FLEXGEN_07 31 51 #define CK_FLEXGEN_08 32 52 #define CK_FLEXGEN_09 33 53 #define CK_FLEXGEN_10 34 54 #define CK_FLEXGEN_11 35 55 #define CK_FLEXGEN_12 36 56 #define CK_FLEXGEN_13 37 57 #define CK_FLEXGEN_14 38 58 #define CK_FLEXGEN_15 39 59 #define CK_FLEXGEN_16 40 60 #define CK_FLEXGEN_17 41 61 #define CK_FLEXGEN_18 42 62 #define CK_FLEXGEN_19 43 63 #define CK_FLEXGEN_20 44 64 #define CK_FLEXGEN_21 45 65 #define CK_FLEXGEN_22 46 66 #define CK_FLEXGEN_23 47 67 #define CK_FLEXGEN_24 48 68 #define CK_FLEXGEN_25 49 69 #define CK_FLEXGEN_26 50 70 #define CK_FLEXGEN_27 51 71 #define CK_FLEXGEN_28 52 72 #define CK_FLEXGEN_29 53 73 #define CK_FLEXGEN_30 54 74 #define CK_FLEXGEN_31 55 75 #define CK_FLEXGEN_32 56 76 #define CK_FLEXGEN_33 57 77 #define CK_FLEXGEN_34 58 78 #define CK_FLEXGEN_35 59 79 #define CK_FLEXGEN_36 60 80 #define CK_FLEXGEN_37 61 81 #define CK_FLEXGEN_38 62 82 #define CK_FLEXGEN_39 63 83 #define CK_FLEXGEN_40 64 84 #define CK_FLEXGEN_41 65 85 #define CK_FLEXGEN_42 66 86 #define CK_FLEXGEN_43 67 87 #define CK_FLEXGEN_44 68 88 #define CK_FLEXGEN_45 69 89 #define CK_FLEXGEN_46 70 90 #define CK_FLEXGEN_47 71 91 #define CK_FLEXGEN_48 72 92 #define CK_FLEXGEN_49 73 93 #define CK_FLEXGEN_50 74 94 #define CK_FLEXGEN_51 75 95 #define CK_FLEXGEN_52 76 96 #define CK_FLEXGEN_53 77 97 #define CK_FLEXGEN_54 78 98 #define CK_FLEXGEN_55 79 99 #define CK_FLEXGEN_56 80 100 #define CK_FLEXGEN_57 81 101 #define CK_FLEXGEN_58 82 102 #define CK_FLEXGEN_59 83 103 #define CK_FLEXGEN_60 84 104 #define CK_FLEXGEN_61 85 105 #define CK_FLEXGEN_62 86 106 #define CK_FLEXGEN_63 87 107 108 /* LOW SPEED MCU CLOCK */ 109 #define CK_ICN_LS_MCU 88 110 111 #define CK_BUS_STM 89 112 #define CK_BUS_FMC 90 113 #define CK_BUS_GPU 91 114 #define CK_BUS_ETH1 92 115 #define CK_BUS_ETH2 93 116 #define CK_BUS_PCIE 94 117 #define CK_BUS_DDRPHYC 95 118 #define CK_BUS_SYSCPU1 96 119 #define CK_BUS_ETHSW 97 120 #define CK_BUS_HPDMA1 98 121 #define CK_BUS_HPDMA2 99 122 #define CK_BUS_HPDMA3 100 123 #define CK_BUS_ADC12 101 124 #define CK_BUS_ADC3 102 125 #define CK_BUS_IPCC1 103 126 #define CK_BUS_CCI 104 127 #define CK_BUS_CRC 105 128 #define CK_BUS_MDF1 106 129 #define CK_BUS_OSPIIOM 107 130 #define CK_BUS_BKPSRAM 108 131 #define CK_BUS_HASH 109 132 #define CK_BUS_RNG 110 133 #define CK_BUS_CRYP1 111 134 #define CK_BUS_CRYP2 112 135 #define CK_BUS_SAES 113 136 #define CK_BUS_PKA 114 137 #define CK_BUS_GPIOA 115 138 #define CK_BUS_GPIOB 116 139 #define CK_BUS_GPIOC 117 140 #define CK_BUS_GPIOD 118 141 #define CK_BUS_GPIOE 119 142 #define CK_BUS_GPIOF 120 143 #define CK_BUS_GPIOG 121 144 #define CK_BUS_GPIOH 122 145 #define CK_BUS_GPIOI 123 146 #define CK_BUS_GPIOJ 124 147 #define CK_BUS_GPIOK 125 148 #define CK_BUS_LPSRAM1 126 149 #define CK_BUS_LPSRAM2 127 150 #define CK_BUS_LPSRAM3 128 151 #define CK_BUS_GPIOZ 129 152 #define CK_BUS_LPDMA 130 153 #define CK_BUS_HSEM 131 154 #define CK_BUS_IPCC2 132 155 #define CK_BUS_RTC 133 156 #define CK_BUS_SPI8 134 157 #define CK_BUS_LPUART1 135 158 #define CK_BUS_I2C8 136 159 #define CK_BUS_LPTIM3 137 160 #define CK_BUS_LPTIM4 138 161 #define CK_BUS_LPTIM5 139 162 #define CK_BUS_IWDG5 140 163 #define CK_BUS_WWDG2 141 164 #define CK_BUS_I3C4 142 165 #define CK_BUS_TIM2 143 166 #define CK_BUS_TIM3 144 167 #define CK_BUS_TIM4 145 168 #define CK_BUS_TIM5 146 169 #define CK_BUS_TIM6 147 170 #define CK_BUS_TIM7 148 171 #define CK_BUS_TIM10 149 172 #define CK_BUS_TIM11 150 173 #define CK_BUS_TIM12 151 174 #define CK_BUS_TIM13 152 175 #define CK_BUS_TIM14 153 176 #define CK_BUS_LPTIM1 154 177 #define CK_BUS_LPTIM2 155 178 #define CK_BUS_SPI2 156 179 #define CK_BUS_SPI3 157 180 #define CK_BUS_SPDIFRX 158 181 #define CK_BUS_USART2 159 182 #define CK_BUS_USART3 160 183 #define CK_BUS_UART4 161 184 #define CK_BUS_UART5 162 185 #define CK_BUS_I2C1 163 186 #define CK_BUS_I2C2 164 187 #define CK_BUS_I2C3 165 188 #define CK_BUS_I2C4 166 189 #define CK_BUS_I2C5 167 190 #define CK_BUS_I2C6 168 191 #define CK_BUS_I2C7 169 192 #define CK_BUS_I3C1 170 193 #define CK_BUS_I3C2 171 194 #define CK_BUS_I3C3 172 195 #define CK_BUS_TIM1 173 196 #define CK_BUS_TIM8 174 197 #define CK_BUS_TIM15 175 198 #define CK_BUS_TIM16 176 199 #define CK_BUS_TIM17 177 200 #define CK_BUS_TIM20 178 201 #define CK_BUS_SAI1 179 202 #define CK_BUS_SAI2 180 203 #define CK_BUS_SAI3 181 204 #define CK_BUS_SAI4 182 205 #define CK_BUS_USART1 183 206 #define CK_BUS_USART6 184 207 #define CK_BUS_UART7 185 208 #define CK_BUS_UART8 186 209 #define CK_BUS_UART9 187 210 #define CK_BUS_FDCAN 188 211 #define CK_BUS_SPI1 189 212 #define CK_BUS_SPI4 190 213 #define CK_BUS_SPI5 191 214 #define CK_BUS_SPI6 192 215 #define CK_BUS_SPI7 193 216 #define CK_BUS_BSEC 194 217 #define CK_BUS_IWDG1 195 218 #define CK_BUS_IWDG2 196 219 #define CK_BUS_IWDG3 197 220 #define CK_BUS_IWDG4 198 221 #define CK_BUS_WWDG1 199 222 #define CK_BUS_VREF 200 223 #define CK_BUS_DTS 201 224 #define CK_BUS_SERC 202 225 #define CK_BUS_HDP 203 226 #define CK_BUS_IS2M 204 227 #define CK_BUS_DSI 205 228 #define CK_BUS_LTDC 206 229 #define CK_BUS_CSI 207 230 #define CK_BUS_DCMIPP 208 231 #define CK_BUS_DDRC 209 232 #define CK_BUS_DDRCFG 210 233 #define CK_BUS_GICV2M 211 234 #define CK_BUS_USBTC 212 235 #define CK_BUS_USB3PCIEPHY 214 236 #define CK_BUS_STGEN 215 237 #define CK_BUS_VDEC 216 238 #define CK_BUS_VENC 217 239 #define CK_SYSDBG 218 240 #define CK_KER_TIM2 219 241 #define CK_KER_TIM3 220 242 #define CK_KER_TIM4 221 243 #define CK_KER_TIM5 222 244 #define CK_KER_TIM6 223 245 #define CK_KER_TIM7 224 246 #define CK_KER_TIM10 225 247 #define CK_KER_TIM11 226 248 #define CK_KER_TIM12 227 249 #define CK_KER_TIM13 228 250 #define CK_KER_TIM14 229 251 #define CK_KER_TIM1 230 252 #define CK_KER_TIM8 231 253 #define CK_KER_TIM15 232 254 #define CK_KER_TIM16 233 255 #define CK_KER_TIM17 234 256 #define CK_KER_TIM20 235 257 #define CK_BUS_SYSRAM 236 258 #define CK_BUS_VDERAM 237 259 #define CK_BUS_RETRAM 238 260 #define CK_BUS_OSPI1 239 261 #define CK_BUS_OSPI2 240 262 #define CK_BUS_OTFD1 241 263 #define CK_BUS_OTFD2 242 264 #define CK_BUS_SRAM1 243 265 #define CK_BUS_SRAM2 244 266 #define CK_BUS_SDMMC1 245 267 #define CK_BUS_SDMMC2 246 268 #define CK_BUS_SDMMC3 247 269 #define CK_BUS_DDR 248 270 #define CK_BUS_RISAF4 249 271 #define CK_BUS_USB2OHCI 250 272 #define CK_BUS_USB2EHCI 251 273 #define CK_BUS_USB3DR 252 274 #define CK_KER_LPTIM1 253 275 #define CK_KER_LPTIM2 254 276 #define CK_KER_USART2 255 277 #define CK_KER_UART4 256 278 #define CK_KER_USART3 257 279 #define CK_KER_UART5 258 280 #define CK_KER_SPI2 259 281 #define CK_KER_SPI3 260 282 #define CK_KER_SPDIFRX 261 283 #define CK_KER_I2C1 262 284 #define CK_KER_I2C2 263 285 #define CK_KER_I3C1 264 286 #define CK_KER_I3C2 265 287 #define CK_KER_I2C3 266 288 #define CK_KER_I2C5 267 289 #define CK_KER_I3C3 268 290 #define CK_KER_I2C4 269 291 #define CK_KER_I2C6 270 292 #define CK_KER_I2C7 271 293 #define CK_KER_SPI1 272 294 #define CK_KER_SPI4 273 295 #define CK_KER_SPI5 274 296 #define CK_KER_SPI6 275 297 #define CK_KER_SPI7 276 298 #define CK_KER_USART1 277 299 #define CK_KER_USART6 278 300 #define CK_KER_UART7 279 301 #define CK_KER_UART8 280 302 #define CK_KER_UART9 281 303 #define CK_KER_MDF1 282 304 #define CK_KER_SAI1 283 305 #define CK_KER_SAI2 284 306 #define CK_KER_SAI3 285 307 #define CK_KER_SAI4 286 308 #define CK_KER_FDCAN 287 309 #define CK_KER_DSIBLANE 288 310 #define CK_KER_DSIPHY 289 311 #define CK_KER_CSI 290 312 #define CK_KER_CSITXESC 291 313 #define CK_KER_CSIPHY 292 314 #define CK_KER_LVDSPHY 293 315 #define CK_KER_STGEN 294 316 #define CK_KER_USB3PCIEPHY 295 317 #define CK_KER_USB2PHY2EN 296 318 #define CK_KER_I3C4 297 319 #define CK_KER_SPI8 298 320 #define CK_KER_I2C8 299 321 #define CK_KER_LPUART1 300 322 #define CK_KER_LPTIM3 301 323 #define CK_KER_LPTIM4 302 324 #define CK_KER_LPTIM5 303 325 #define CK_KER_TSDBG 304 326 #define CK_KER_TPIU 305 327 #define CK_BUS_ETR 306 328 #define CK_BUS_SYSATB 307 329 #define CK_KER_ADC12 308 330 #define CK_KER_ADC3 309 331 #define CK_KER_OSPI1 310 332 #define CK_KER_OSPI2 311 333 #define CK_KER_FMC 312 334 #define CK_KER_SDMMC1 313 335 #define CK_KER_SDMMC2 314 336 #define CK_KER_SDMMC3 315 337 #define CK_KER_ETH1 316 338 #define CK_KER_ETH2 317 339 #define CK_KER_ETH1PTP 318 340 #define CK_KER_ETH2PTP 319 341 #define CK_KER_USB2PHY1 320 342 #define CK_KER_USB2PHY2 321 343 #define CK_KER_ETHSW 322 344 #define CK_KER_ETHSWREF 323 345 #define CK_MCO1 324 346 #define CK_MCO2 325 347 #define CK_KER_DTS 326 348 #define CK_ETH1_RX 327 349 #define CK_ETH1_TX 328 350 #define CK_ETH1_MAC 329 351 #define CK_ETH2_RX 330 352 #define CK_ETH2_TX 331 353 #define CK_ETH2_MAC 332 354 #define CK_ETH1_STP 333 355 #define CK_ETH2_STP 334 356 #define CK_KER_USBTC 335 357 #define CK_BUS_ADF1 336 358 #define CK_KER_ADF1 337 359 #define CK_BUS_LVDS 338 360 #define CK_KER_LTDC 339 361 #define CK_KER_GPU 340 362 #define CK_BUS_ETHSWACMCFG 341 363 #define CK_BUS_ETHSWACMMSG 342 364 #define HSE_DIV2_CK 343 365 #define CK_KER_ETR 344 366 #define CK_KER_STM 345 367 368 #define STM32MP25_LAST_CLK 346 369 370 #define CK_SCMI_ICN_HS_MCU 0 371 #define CK_SCMI_ICN_SDMMC 1 372 #define CK_SCMI_ICN_DDR 2 373 #define CK_SCMI_ICN_DISPLAY 3 374 #define CK_SCMI_ICN_HSL 4 375 #define CK_SCMI_ICN_NIC 5 376 #define CK_SCMI_ICN_VID 6 377 #define CK_SCMI_FLEXGEN_07 7 378 #define CK_SCMI_FLEXGEN_08 8 379 #define CK_SCMI_FLEXGEN_09 9 380 #define CK_SCMI_FLEXGEN_10 10 381 #define CK_SCMI_FLEXGEN_11 11 382 #define CK_SCMI_FLEXGEN_12 12 383 #define CK_SCMI_FLEXGEN_13 13 384 #define CK_SCMI_FLEXGEN_14 14 385 #define CK_SCMI_FLEXGEN_15 15 386 #define CK_SCMI_FLEXGEN_16 16 387 #define CK_SCMI_FLEXGEN_17 17 388 #define CK_SCMI_FLEXGEN_18 18 389 #define CK_SCMI_FLEXGEN_19 19 390 #define CK_SCMI_FLEXGEN_20 20 391 #define CK_SCMI_FLEXGEN_21 21 392 #define CK_SCMI_FLEXGEN_22 22 393 #define CK_SCMI_FLEXGEN_23 23 394 #define CK_SCMI_FLEXGEN_24 24 395 #define CK_SCMI_FLEXGEN_25 25 396 #define CK_SCMI_FLEXGEN_26 26 397 #define CK_SCMI_FLEXGEN_27 27 398 #define CK_SCMI_FLEXGEN_28 28 399 #define CK_SCMI_FLEXGEN_29 29 400 #define CK_SCMI_FLEXGEN_30 30 401 #define CK_SCMI_FLEXGEN_31 31 402 #define CK_SCMI_FLEXGEN_32 32 403 #define CK_SCMI_FLEXGEN_33 33 404 #define CK_SCMI_FLEXGEN_34 34 405 #define CK_SCMI_FLEXGEN_35 35 406 #define CK_SCMI_FLEXGEN_36 36 407 #define CK_SCMI_FLEXGEN_37 37 408 #define CK_SCMI_FLEXGEN_38 38 409 #define CK_SCMI_FLEXGEN_39 39 410 #define CK_SCMI_FLEXGEN_40 40 411 #define CK_SCMI_FLEXGEN_41 41 412 #define CK_SCMI_FLEXGEN_42 42 413 #define CK_SCMI_FLEXGEN_43 43 414 #define CK_SCMI_FLEXGEN_44 44 415 #define CK_SCMI_FLEXGEN_45 45 416 #define CK_SCMI_FLEXGEN_46 46 417 #define CK_SCMI_FLEXGEN_47 47 418 #define CK_SCMI_FLEXGEN_48 48 419 #define CK_SCMI_FLEXGEN_49 49 420 #define CK_SCMI_FLEXGEN_50 50 421 #define CK_SCMI_FLEXGEN_51 51 422 #define CK_SCMI_FLEXGEN_52 52 423 #define CK_SCMI_FLEXGEN_53 53 424 #define CK_SCMI_FLEXGEN_54 54 425 #define CK_SCMI_FLEXGEN_55 55 426 #define CK_SCMI_FLEXGEN_56 56 427 #define CK_SCMI_FLEXGEN_57 57 428 #define CK_SCMI_FLEXGEN_58 58 429 #define CK_SCMI_FLEXGEN_59 59 430 #define CK_SCMI_FLEXGEN_60 60 431 #define CK_SCMI_FLEXGEN_61 61 432 #define CK_SCMI_FLEXGEN_62 62 433 #define CK_SCMI_FLEXGEN_63 63 434 #define CK_SCMI_ICN_LS_MCU 64 435 #define CK_SCMI_HSE 65 436 #define CK_SCMI_LSE 66 437 #define CK_SCMI_HSI 67 438 #define CK_SCMI_LSI 68 439 #define CK_SCMI_MSI 69 440 #define CK_SCMI_HSE_DIV2 70 441 #define CK_SCMI_CPU1 71 442 #define CK_SCMI_SYSCPU1 72 443 #define CK_SCMI_PLL2 73 444 #define CK_SCMI_PLL3 74 445 #define CK_SCMI_RTC 75 446 #define CK_SCMI_RTCCK 76 447 #define CK_SCMI_ICN_APB1 77 448 #define CK_SCMI_ICN_APB2 78 449 #define CK_SCMI_ICN_APB3 79 450 #define CK_SCMI_ICN_APB4 80 451 #define CK_SCMI_ICN_APBDBG 81 452 #define CK_SCMI_TIMG1 82 453 #define CK_SCMI_TIMG2 83 454 #define CK_SCMI_BKPSRAM 84 455 #define CK_SCMI_BSEC 85 456 #define CK_SCMI_BUS_ETR 87 457 #define CK_SCMI_FMC 88 458 #define CK_SCMI_GPIOA 89 459 #define CK_SCMI_GPIOB 90 460 #define CK_SCMI_GPIOC 91 461 #define CK_SCMI_GPIOD 92 462 #define CK_SCMI_GPIOE 93 463 #define CK_SCMI_GPIOF 94 464 #define CK_SCMI_GPIOG 95 465 #define CK_SCMI_GPIOH 96 466 #define CK_SCMI_GPIOI 97 467 #define CK_SCMI_GPIOJ 98 468 #define CK_SCMI_GPIOK 99 469 #define CK_SCMI_GPIOZ 100 470 #define CK_SCMI_HPDMA1 101 471 #define CK_SCMI_HPDMA2 102 472 #define CK_SCMI_HPDMA3 103 473 #define CK_SCMI_HSEM 104 474 #define CK_SCMI_IPCC1 105 475 #define CK_SCMI_IPCC2 106 476 #define CK_SCMI_LPDMA 107 477 #define CK_SCMI_RETRAM 108 478 #define CK_SCMI_SRAM1 109 479 #define CK_SCMI_SRAM2 110 480 #define CK_SCMI_LPSRAM1 111 481 #define CK_SCMI_LPSRAM2 112 482 #define CK_SCMI_LPSRAM3 113 483 #define CK_SCMI_VDERAM 114 484 #define CK_SCMI_SYSRAM 115 485 #define CK_SCMI_OSPI1 116 486 #define CK_SCMI_OSPI2 117 487 #define CK_SCMI_TPIU 118 488 #define CK_SCMI_SYSDBG 119 489 #define CK_SCMI_SYSATB 120 490 #define CK_SCMI_TSDBG 121 491 #define CK_SCMI_BUS_STM 122 492 #define CK_SCMI_KER_STM 123 493 #define CK_SCMI_KER_ETR 124 494 495 #endif /* _DT_BINDINGS_CLOCK_ST_STM32MP25_RCC_H_ */ 496