xref: /optee_os/core/include/dt-bindings/clock/st,stm32mp21-rcc.h (revision b2ceba5a8fc9aa384d26c6d4a35f331e7900dc0c)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
4  */
5 
6 #ifndef _DT_BINDINGS_CLOCK_ST_STM32MP21_RCC_H_
7 #define _DT_BINDINGS_CLOCK_ST_STM32MP21_RCC_H_
8 
9 /* INTERNAL/EXTERNAL OSCILLATORS */
10 #define HSI_CK			0
11 #define HSE_CK			1
12 #define MSI_CK			2
13 #define LSI_CK			3
14 #define LSE_CK			4
15 #define I2S_CK			5
16 #define RTC_CK			6
17 #define SPDIF_CK_SYMB		7
18 
19 /* PLL CLOCKS */
20 #define PLL1_CK			8
21 #define PLL2_CK			9
22 #define PLL4_CK			10
23 #define PLL5_CK			11
24 #define PLL6_CK			12
25 #define PLL7_CK			13
26 #define PLL8_CK			14
27 
28 #define CK_CPU1			15
29 
30 /* APB DIV CLOCKS */
31 #define CK_ICN_APB1		16
32 #define CK_ICN_APB2		17
33 #define CK_ICN_APB3		18
34 #define CK_ICN_APB4		19
35 #define CK_ICN_APB5		20
36 #define CK_ICN_APBDBG		21
37 
38 /* GLOBAL TIMER */
39 #define TIMG1_CK		22
40 #define TIMG2_CK		23
41 
42 /* FLEXGEN CLOCKS */
43 #define CK_ICN_HS_MCU		24
44 #define CK_ICN_SDMMC		25
45 #define CK_ICN_DDR		26
46 #define CK_ICN_DISPLAY		27
47 #define CK_ICN_HSL		28
48 #define CK_ICN_NIC		29
49 #define CK_ICN_VID		30
50 #define CK_FLEXGEN_07		31
51 #define CK_FLEXGEN_08		32
52 #define CK_FLEXGEN_09		33
53 #define CK_FLEXGEN_10		34
54 #define CK_FLEXGEN_11		35
55 #define CK_FLEXGEN_12		36
56 #define CK_FLEXGEN_13		37
57 #define CK_FLEXGEN_14		38
58 #define CK_FLEXGEN_15		39
59 #define CK_FLEXGEN_16		40
60 #define CK_FLEXGEN_17		41
61 #define CK_FLEXGEN_18		42
62 #define CK_FLEXGEN_19		43
63 #define CK_FLEXGEN_20		44
64 #define CK_FLEXGEN_21		45
65 #define CK_FLEXGEN_22		46
66 #define CK_FLEXGEN_23		47
67 #define CK_FLEXGEN_24		48
68 #define CK_FLEXGEN_25		49
69 #define CK_FLEXGEN_26		50
70 #define CK_FLEXGEN_27		51
71 #define CK_FLEXGEN_28		52
72 #define CK_FLEXGEN_29		53
73 #define CK_FLEXGEN_30		54
74 #define CK_FLEXGEN_31		55
75 #define CK_FLEXGEN_32		56
76 #define CK_FLEXGEN_33		57
77 #define CK_FLEXGEN_34		58
78 #define CK_FLEXGEN_35		59
79 #define CK_FLEXGEN_36		60
80 #define CK_FLEXGEN_37		61
81 #define CK_FLEXGEN_38		62
82 #define CK_FLEXGEN_39		63
83 #define CK_FLEXGEN_40		64
84 #define CK_FLEXGEN_41		65
85 #define CK_FLEXGEN_42		66
86 #define CK_FLEXGEN_43		67
87 #define CK_FLEXGEN_44		68
88 #define CK_FLEXGEN_45		69
89 #define CK_FLEXGEN_46		70
90 #define CK_FLEXGEN_47		71
91 #define CK_FLEXGEN_48		72
92 #define CK_FLEXGEN_49		73
93 #define CK_FLEXGEN_50		74
94 #define CK_FLEXGEN_51		75
95 #define CK_FLEXGEN_52		76
96 #define CK_FLEXGEN_53		77
97 #define CK_FLEXGEN_54		78
98 #define CK_FLEXGEN_55		79
99 #define CK_FLEXGEN_56		80
100 #define CK_FLEXGEN_57		81
101 #define CK_FLEXGEN_58		82
102 #define CK_FLEXGEN_59		83
103 #define CK_FLEXGEN_60		84
104 #define CK_FLEXGEN_61		85
105 #define CK_FLEXGEN_62		86
106 #define CK_FLEXGEN_63		87
107 
108 /* LOW SPEED MCU CLOCK */
109 #define CK_ICN_LS_MCU		88
110 
111 #define CK_BUS_STM		89
112 #define CK_BUS_FMC		90
113 #define CK_BUS_ETH1		91
114 #define CK_BUS_ETH2		92
115 #define CK_BUS_DDRPHYC		93
116 #define CK_BUS_SYSCPU1		94
117 #define CK_BUS_HPDMA1		95
118 #define CK_BUS_HPDMA2		96
119 #define CK_BUS_HPDMA3		97
120 #define CK_BUS_ADC1		98
121 #define CK_BUS_ADC2		99
122 #define CK_BUS_IPCC1		100
123 #define CK_BUS_DCMIPSSI		101
124 #define CK_BUS_CRC		102
125 #define CK_BUS_MDF1		103
126 #define CK_BUS_BKPSRAM		104
127 #define CK_BUS_HASH1		105
128 #define CK_BUS_HASH2		106
129 #define CK_BUS_RNG1		107
130 #define CK_BUS_RNG2		108
131 #define CK_BUS_CRYP1		109
132 #define CK_BUS_CRYP2		110
133 #define CK_BUS_SAES		111
134 #define CK_BUS_PKA		112
135 #define CK_BUS_GPIOA		113
136 #define CK_BUS_GPIOB		114
137 #define CK_BUS_GPIOC		115
138 #define CK_BUS_GPIOD		116
139 #define CK_BUS_GPIOE		117
140 #define CK_BUS_GPIOF		118
141 #define CK_BUS_GPIOG		119
142 #define CK_BUS_GPIOH		120
143 #define CK_BUS_GPIOI		121
144 #define CK_BUS_GPIOZ		122
145 #define CK_BUS_RTC		124
146 #define CK_BUS_LPUART1		125
147 #define CK_BUS_LPTIM3		126
148 #define CK_BUS_LPTIM4		127
149 #define CK_BUS_LPTIM5		128
150 #define CK_BUS_TIM2		129
151 #define CK_BUS_TIM3		130
152 #define CK_BUS_TIM4		131
153 #define CK_BUS_TIM5		132
154 #define CK_BUS_TIM6		133
155 #define CK_BUS_TIM7		134
156 #define CK_BUS_TIM10		135
157 #define CK_BUS_TIM11		136
158 #define CK_BUS_TIM12		137
159 #define CK_BUS_TIM13		138
160 #define CK_BUS_TIM14		139
161 #define CK_BUS_LPTIM1		140
162 #define CK_BUS_LPTIM2		141
163 #define CK_BUS_SPI2		142
164 #define CK_BUS_SPI3		143
165 #define CK_BUS_SPDIFRX		144
166 #define CK_BUS_USART2		145
167 #define CK_BUS_USART3		146
168 #define CK_BUS_UART4		147
169 #define CK_BUS_UART5		148
170 #define CK_BUS_I2C1		149
171 #define CK_BUS_I2C2		150
172 #define CK_BUS_I2C3		151
173 #define CK_BUS_I3C1		152
174 #define CK_BUS_I3C2		153
175 #define CK_BUS_I3C3		154
176 #define CK_BUS_TIM1		155
177 #define CK_BUS_TIM8		156
178 #define CK_BUS_TIM15		157
179 #define CK_BUS_TIM16		158
180 #define CK_BUS_TIM17		159
181 #define CK_BUS_SAI1		160
182 #define CK_BUS_SAI2		161
183 #define CK_BUS_SAI3		162
184 #define CK_BUS_SAI4		163
185 #define CK_BUS_USART1		164
186 #define CK_BUS_USART6		165
187 #define CK_BUS_UART7		166
188 #define CK_BUS_FDCAN		167
189 #define CK_BUS_SPI1		168
190 #define CK_BUS_SPI4		169
191 #define CK_BUS_SPI5		170
192 #define CK_BUS_SPI6		171
193 #define CK_BUS_BSEC		172
194 #define CK_BUS_IWDG1		173
195 #define CK_BUS_IWDG2		174
196 #define CK_BUS_IWDG3		175
197 #define CK_BUS_IWDG4		176
198 #define CK_BUS_WWDG1		177
199 #define CK_BUS_VREF		178
200 #define CK_BUS_DTS		179
201 #define CK_BUS_SERC		180
202 #define CK_BUS_HDP		181
203 #define CK_BUS_DDRPERFM		182
204 #define CK_BUS_OTG		183
205 #define CK_BUS_LTDC		184
206 #define CK_BUS_CSI		185
207 #define CK_BUS_DCMIPP		186
208 #define CK_BUS_DDRC		187
209 #define CK_BUS_DDRCFG		188
210 #define CK_BUS_STGEN		189
211 #define CK_SYSDBG		190
212 #define CK_KER_TIM2		191
213 #define CK_KER_TIM3		192
214 #define CK_KER_TIM4		193
215 #define CK_KER_TIM5		194
216 #define CK_KER_TIM6		195
217 #define CK_KER_TIM7		196
218 #define CK_KER_TIM10		197
219 #define CK_KER_TIM11		198
220 #define CK_KER_TIM12		199
221 #define CK_KER_TIM13		200
222 #define CK_KER_TIM14		201
223 #define CK_KER_TIM1		202
224 #define CK_KER_TIM8		203
225 #define CK_KER_TIM15		204
226 #define CK_KER_TIM16		205
227 #define CK_KER_TIM17		206
228 #define CK_BUS_SYSRAM		207
229 #define CK_BUS_RETRAM		208
230 #define CK_BUS_OSPI1		209
231 #define CK_BUS_OTFD1		210
232 #define CK_BUS_SRAM1		211
233 #define CK_BUS_SDMMC1		212
234 #define CK_BUS_SDMMC2		213
235 #define CK_BUS_SDMMC3		214
236 #define CK_BUS_DDR		215
237 #define CK_BUS_RISAF4		216
238 #define CK_BUS_USBHOHCI		217
239 #define CK_BUS_USBHEHCI		218
240 #define CK_KER_LPTIM1		219
241 #define CK_KER_LPTIM2		220
242 #define CK_KER_USART2		221
243 #define CK_KER_UART4		222
244 #define CK_KER_USART3		223
245 #define CK_KER_UART5		224
246 #define CK_KER_SPI2		225
247 #define CK_KER_SPI3		226
248 #define CK_KER_SPDIFRX		227
249 #define CK_KER_I2C1		228
250 #define CK_KER_I2C2		229
251 #define CK_KER_I3C1		230
252 #define CK_KER_I3C2		231
253 #define CK_KER_I2C3		232
254 #define CK_KER_I3C3		233
255 #define CK_KER_SPI1		234
256 #define CK_KER_SPI4		235
257 #define CK_KER_SPI5		236
258 #define CK_KER_SPI6		237
259 #define CK_KER_USART1		238
260 #define CK_KER_USART6		239
261 #define CK_KER_UART7		240
262 #define CK_KER_MDF1		241
263 #define CK_KER_SAI1		242
264 #define CK_KER_SAI2		243
265 #define CK_KER_SAI3		244
266 #define CK_KER_SAI4		245
267 #define CK_KER_FDCAN		246
268 #define CK_KER_CSI		247
269 #define CK_KER_CSITXESC		248
270 #define CK_KER_CSIPHY		249
271 #define CK_KER_STGEN		250
272 #define CK_KER_USB2PHY2EN	251
273 #define CK_KER_LPUART1		252
274 #define CK_KER_LPTIM3		253
275 #define CK_KER_LPTIM4		254
276 #define CK_KER_LPTIM5		255
277 #define CK_KER_TSDBG		256
278 #define CK_KER_TPIU		257
279 #define CK_BUS_ETR		258
280 #define CK_BUS_SYSATB		259
281 #define CK_KER_ADC1		260
282 #define CK_KER_ADC2		261
283 #define CK_KER_OSPI1		262
284 #define CK_KER_FMC		263
285 #define CK_KER_SDMMC1		264
286 #define CK_KER_SDMMC2		265
287 #define CK_KER_SDMMC3		266
288 #define CK_KER_ETH1		267
289 #define CK_KER_ETH2		268
290 #define CK_KER_ETH1PTP		269
291 #define CK_KER_ETH2PTP		270
292 #define CK_KER_USB2PHY1		271
293 #define CK_KER_USB2PHY2		272
294 #define CK_MCO1			273
295 #define CK_MCO2			274
296 #define CK_KER_DTS		275
297 #define CK_ETH1_RX		276
298 #define CK_ETH1_TX		277
299 #define CK_ETH1_MAC		278
300 #define CK_ETH2_RX		279
301 #define CK_ETH2_TX		280
302 #define CK_ETH2_MAC		281
303 #define CK_ETH1_STP		282
304 #define CK_ETH2_STP		283
305 #define CK_KER_LTDC		284
306 #define HSE_DIV2_CK		285
307 #define CK_DBGMCU		286
308 #define CK_DAP			287
309 #define CK_KER_ETR		288
310 #define CK_KER_STM		289
311 #define HSI_KER_CK		290
312 #define HSE_KER_CK		291
313 #define MSI_KER_CK		292
314 
315 #define STM32MP21_LAST_CLK	293
316 
317 #define CK_SCMI_ICN_HS_MCU	0
318 #define CK_SCMI_ICN_SDMMC	1
319 #define CK_SCMI_ICN_DDR		2
320 #define CK_SCMI_ICN_DISPLAY	3
321 #define CK_SCMI_ICN_HSL		4
322 #define CK_SCMI_ICN_NIC		5
323 #define CK_SCMI_FLEXGEN_07	7
324 #define CK_SCMI_FLEXGEN_08	8
325 #define CK_SCMI_FLEXGEN_09	9
326 #define CK_SCMI_FLEXGEN_10	10
327 #define CK_SCMI_FLEXGEN_11	11
328 #define CK_SCMI_FLEXGEN_12	12
329 #define CK_SCMI_FLEXGEN_13	13
330 #define CK_SCMI_FLEXGEN_14	14
331 #define CK_SCMI_FLEXGEN_15	15
332 #define CK_SCMI_FLEXGEN_16	16
333 #define CK_SCMI_FLEXGEN_17	17
334 #define CK_SCMI_FLEXGEN_18	18
335 #define CK_SCMI_FLEXGEN_19	19
336 #define CK_SCMI_FLEXGEN_20	20
337 #define CK_SCMI_FLEXGEN_21	21
338 #define CK_SCMI_FLEXGEN_22	22
339 #define CK_SCMI_FLEXGEN_23	23
340 #define CK_SCMI_FLEXGEN_24	24
341 #define CK_SCMI_FLEXGEN_25	25
342 #define CK_SCMI_FLEXGEN_26	26
343 #define CK_SCMI_FLEXGEN_27	27
344 #define CK_SCMI_FLEXGEN_28	28
345 #define CK_SCMI_FLEXGEN_29	29
346 #define CK_SCMI_FLEXGEN_30	30
347 #define CK_SCMI_FLEXGEN_31	31
348 #define CK_SCMI_FLEXGEN_32	32
349 #define CK_SCMI_FLEXGEN_33	33
350 #define CK_SCMI_FLEXGEN_34	34
351 #define CK_SCMI_FLEXGEN_35	35
352 #define CK_SCMI_FLEXGEN_36	36
353 #define CK_SCMI_FLEXGEN_37	37
354 #define CK_SCMI_FLEXGEN_38	38
355 #define CK_SCMI_FLEXGEN_39	39
356 #define CK_SCMI_FLEXGEN_40	40
357 #define CK_SCMI_FLEXGEN_41	41
358 #define CK_SCMI_FLEXGEN_42	42
359 #define CK_SCMI_FLEXGEN_43	43
360 #define CK_SCMI_FLEXGEN_44	44
361 #define CK_SCMI_FLEXGEN_45	45
362 #define CK_SCMI_FLEXGEN_46	46
363 #define CK_SCMI_FLEXGEN_47	47
364 #define CK_SCMI_FLEXGEN_48	48
365 #define CK_SCMI_FLEXGEN_49	49
366 #define CK_SCMI_FLEXGEN_50	50
367 #define CK_SCMI_FLEXGEN_51	51
368 #define CK_SCMI_FLEXGEN_52	52
369 #define CK_SCMI_FLEXGEN_53	53
370 #define CK_SCMI_FLEXGEN_54	54
371 #define CK_SCMI_FLEXGEN_55	55
372 #define CK_SCMI_FLEXGEN_56	56
373 #define CK_SCMI_FLEXGEN_57	57
374 #define CK_SCMI_FLEXGEN_58	58
375 #define CK_SCMI_FLEXGEN_59	59
376 #define CK_SCMI_FLEXGEN_60	60
377 #define CK_SCMI_FLEXGEN_61	61
378 #define CK_SCMI_FLEXGEN_62	62
379 #define CK_SCMI_FLEXGEN_63	63
380 #define CK_SCMI_ICN_LS_MCU	64
381 #define CK_SCMI_HSE		65
382 #define CK_SCMI_LSE		66
383 #define CK_SCMI_HSI		67
384 #define CK_SCMI_LSI		68
385 #define CK_SCMI_MSI		69
386 #define CK_SCMI_HSE_DIV2	70
387 #define CK_SCMI_CPU1		71
388 #define CK_SCMI_SYSCPU1		72
389 #define CK_SCMI_PLL2		73
390 #define CK_SCMI_RTC		74
391 #define CK_SCMI_RTCCK		75
392 #define CK_SCMI_ICN_APB1	76
393 #define CK_SCMI_ICN_APB2	77
394 #define CK_SCMI_ICN_APB3	78
395 #define CK_SCMI_ICN_APB4	79
396 #define CK_SCMI_ICN_APB5	80
397 #define CK_SCMI_ICN_APBDBG	81
398 #define CK_SCMI_TIMG1		82
399 #define CK_SCMI_TIMG2		83
400 #define CK_SCMI_BKPSRAM		84
401 #define CK_SCMI_BSEC		85
402 #define CK_SCMI_BUS_ETR		86
403 #define CK_SCMI_FMC		87
404 #define CK_SCMI_GPIOA		88
405 #define CK_SCMI_GPIOB		89
406 #define CK_SCMI_GPIOC		90
407 #define CK_SCMI_GPIOD		91
408 #define CK_SCMI_GPIOE		92
409 #define CK_SCMI_GPIOF		93
410 #define CK_SCMI_GPIOG		94
411 #define CK_SCMI_GPIOH		95
412 #define CK_SCMI_GPIOI		96
413 #define CK_SCMI_GPIOZ		97
414 #define CK_SCMI_HPDMA1		98
415 #define CK_SCMI_HPDMA2		99
416 #define CK_SCMI_HPDMA3		100
417 #define CK_SCMI_IPCC1		101
418 #define CK_SCMI_RETRAM		102
419 #define CK_SCMI_SRAM1		103
420 #define CK_SCMI_SYSRAM		104
421 #define CK_SCMI_OSPI1		105
422 #define CK_SCMI_TPIU		106
423 #define CK_SCMI_SYSDBG		107
424 #define CK_SCMI_SYSATB		108
425 #define CK_SCMI_TSDBG		109
426 #define CK_SCMI_BUS_STM		110
427 #define CK_SCMI_KER_STM		111
428 #define CK_SCMI_KER_ETR		112
429 #define CK_SCMI_HSI_KER_CK	113
430 #define CK_SCMI_HSE_KER_CK	114
431 #define CK_SCMI_MSI_KER_CK	115
432 
433 #endif /* _DT_BINDINGS_CLOCK_ST_STM32MP21_RCC_H_ */
434