1 /* SPDX-License-Identifier: GPL-2.0-or-later or BSD-3-Clause */ 2 /* 3 * Copyright (C) 2021 Microchip 4 * 5 * This header provides constants for AT91 pmc status. 6 * 7 * The constants defined in this header are being used in dts. 8 */ 9 10 #ifndef _DT_BINDINGS_CLK_AT91_H 11 #define _DT_BINDINGS_CLK_AT91_H 12 13 #define PMC_TYPE_CORE 0 14 #define PMC_TYPE_SYSTEM 1 15 #define PMC_TYPE_PERIPHERAL 2 16 #define PMC_TYPE_GCK 3 17 #define PMC_TYPE_PROGRAMMABLE 4 18 19 #define PMC_SLOW 0 20 #define PMC_MCK 1 21 #define PMC_UTMI 2 22 #define PMC_MAIN 3 23 #define PMC_MCK2 4 24 #define PMC_I2S0_MUX 5 25 #define PMC_I2S1_MUX 6 26 #define PMC_PLLACK 7 27 #define PMC_PLLBCK 8 28 #define PMC_AUDIOPLLCK 9 29 #define PMC_MCK_PRES 10 30 31 /* SAMA7G5 */ 32 #define PMC_CPUPLL (PMC_MAIN + 1) 33 #define PMC_SYSPLL (PMC_MAIN + 2) 34 #define PMC_DDRPLL (PMC_MAIN + 3) 35 #define PMC_IMGPLL (PMC_MAIN + 4) 36 #define PMC_BAUDPLL (PMC_MAIN + 5) 37 #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) 38 #define PMC_AUDIOIOPLL (PMC_MAIN + 7) 39 #define PMC_ETHPLL (PMC_MAIN + 8) 40 #define PMC_CPU (PMC_MAIN + 9) 41 42 #ifndef AT91_PMC_MOSCS 43 /* MOSCS Flag */ 44 #define AT91_PMC_MOSCS 0 45 /* PLLA Lock */ 46 #define AT91_PMC_LOCKA 1 47 /* PLLB Lock */ 48 #define AT91_PMC_LOCKB 2 49 /* Master Clock */ 50 #define AT91_PMC_MCKRDY 3 51 /* UPLL Lock */ 52 #define AT91_PMC_LOCKU 6 53 /* Programmable Clock */ 54 #define AT91_PMC_PCKRDY(id) (8 + (id)) 55 /* Main Oscillator Selection */ 56 #define AT91_PMC_MOSCSELS 16 57 /* Main On-Chip RC */ 58 #define AT91_PMC_MOSCRCS 17 59 /* Clock Failure Detector Event */ 60 #define AT91_PMC_CFDEV 18 61 /* Generated Clocks */ 62 #define AT91_PMC_GCKRDY 24 63 #endif 64 65 #endif 66