12305544bSClément Léger /* SPDX-License-Identifier: BSD-2-Clause */ 22305544bSClément Léger /* 32305544bSClément Léger * Copyright (c) 2021, Bootlin 42305544bSClément Léger */ 52305544bSClément Léger 62305544bSClément Léger #ifndef __DRIVERS_CLK_H 72305544bSClément Léger #define __DRIVERS_CLK_H 82305544bSClément Léger 92305544bSClément Léger #include <kernel/refcount.h> 102305544bSClément Léger #include <stdint.h> 11*cd04d138SEtienne Carriere #include <sys/queue.h> 122305544bSClément Léger #include <tee_api_types.h> 132305544bSClément Léger 142305544bSClément Léger /* Flags for clock */ 152305544bSClément Léger #define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ 162305544bSClément Léger #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ 172305544bSClément Léger 182305544bSClément Léger /** 192305544bSClément Léger * struct clk - Clock structure 202305544bSClément Léger * 212305544bSClément Léger * @name: Clock name 222305544bSClément Léger * @priv: Private data for the clock provider 232305544bSClément Léger * @ops: Clock operations 242305544bSClément Léger * @parent: Current parent 252305544bSClément Léger * @rate: Current clock rate (cached after init or rate change) 262305544bSClément Léger * @flags: Specific clock flags 272305544bSClément Léger * @enabled_count: Enable/disable reference counter 282305544bSClément Léger * @num_parents: Number of parents 292305544bSClément Léger * @parents: Array of possible parents of the clock 30*cd04d138SEtienne Carriere * @link: Link the clock list 312305544bSClément Léger */ 322305544bSClément Léger struct clk { 332305544bSClément Léger const char *name; 342305544bSClément Léger void *priv; 352305544bSClément Léger const struct clk_ops *ops; 362305544bSClément Léger struct clk *parent; 372305544bSClément Léger unsigned long rate; 382305544bSClément Léger unsigned int flags; 392305544bSClément Léger struct refcount enabled_count; 40*cd04d138SEtienne Carriere #ifdef CFG_DRIVERS_CLK_PRINT_TREE 41*cd04d138SEtienne Carriere STAILQ_ENTRY(clk) link; 42*cd04d138SEtienne Carriere #endif 432305544bSClément Léger size_t num_parents; 442305544bSClément Léger struct clk *parents[]; 452305544bSClément Léger }; 462305544bSClément Léger 472305544bSClément Léger /** 482305544bSClément Léger * struct clk_ops 492305544bSClément Léger * 502305544bSClément Léger * @enable: Enable the clock 512305544bSClément Léger * @disable: Disable the clock 522305544bSClément Léger * @set_parent: Set the clock parent based on index 532305544bSClément Léger * @get_parent: Get the current parent index of the clock 542305544bSClément Léger * @set_rate: Set the clock rate 552305544bSClément Léger * @get_rate: Get the clock rate 565df61a5dSClément Léger * @get_rates_array: Get the supported clock rates as array 572305544bSClément Léger */ 582305544bSClément Léger struct clk_ops { 592305544bSClément Léger TEE_Result (*enable)(struct clk *clk); 602305544bSClément Léger void (*disable)(struct clk *clk); 612305544bSClément Léger TEE_Result (*set_parent)(struct clk *clk, size_t index); 622305544bSClément Léger size_t (*get_parent)(struct clk *clk); 632305544bSClément Léger TEE_Result (*set_rate)(struct clk *clk, unsigned long rate, 642305544bSClément Léger unsigned long parent_rate); 652305544bSClément Léger unsigned long (*get_rate)(struct clk *clk, 662305544bSClément Léger unsigned long parent_rate); 675df61a5dSClément Léger TEE_Result (*get_rates_array)(struct clk *clk, size_t start_index, 685df61a5dSClément Léger unsigned long *rates, size_t *nb_elts); 692305544bSClément Léger }; 702305544bSClément Léger 712305544bSClément Léger /** 722305544bSClément Léger * Return the clock name 732305544bSClément Léger * 742305544bSClément Léger * @clk: Clock for which the name is needed 752305544bSClément Léger * Return a const char * pointing to the clock name 762305544bSClément Léger */ 772305544bSClément Léger static inline const char *clk_get_name(struct clk *clk) 782305544bSClément Léger { 792305544bSClément Léger return clk->name; 802305544bSClément Léger } 812305544bSClément Léger 822305544bSClément Léger /** 832305544bSClément Léger * clk_alloc - Allocate a clock structure 842305544bSClément Léger * 852305544bSClément Léger * @name: Clock name 862305544bSClément Léger * @ops: Clock operations 872305544bSClément Léger * @parent_clks: Parents of the clock 882305544bSClément Léger * @parent_count: Number of parents of the clock 892305544bSClément Léger * 902305544bSClément Léger * Return a clock struct properly initialized or NULL if allocation failed 912305544bSClément Léger */ 922305544bSClément Léger struct clk *clk_alloc(const char *name, const struct clk_ops *ops, 932305544bSClément Léger struct clk **parent_clks, size_t parent_count); 942305544bSClément Léger 952305544bSClément Léger /** 962305544bSClément Léger * clk_free - Free a clock structure 972305544bSClément Léger * 982305544bSClément Léger * @clk: Clock to be freed or NULL 992305544bSClément Léger */ 1002305544bSClément Léger void clk_free(struct clk *clk); 1012305544bSClément Léger 1022305544bSClément Léger /** 1032305544bSClément Léger * clk_register - Register a clock within the clock framework 1042305544bSClément Léger * 1052305544bSClément Léger * @clk: Clock struct to be registered 1062305544bSClément Léger * Return a TEE_Result compliant value 1072305544bSClément Léger */ 1082305544bSClément Léger TEE_Result clk_register(struct clk *clk); 1092305544bSClément Léger 1102305544bSClément Léger /** 1112305544bSClément Léger * clk_get_rate - Get clock rate 1122305544bSClément Léger * 1132305544bSClément Léger * @clk: Clock for which the rate is needed 1142305544bSClément Léger * Return the clock rate in Hz 1152305544bSClément Léger */ 1162305544bSClément Léger unsigned long clk_get_rate(struct clk *clk); 1172305544bSClément Léger 1182305544bSClément Léger /** 1192305544bSClément Léger * clk_set_rate - Set a clock rate 1202305544bSClément Léger * 1212305544bSClément Léger * @clk: Clock to be set with the rate 1222305544bSClément Léger * @rate: Rate to set in Hz 1232305544bSClément Léger * Return a TEE_Result compliant value 1242305544bSClément Léger */ 1252305544bSClément Léger TEE_Result clk_set_rate(struct clk *clk, unsigned long rate); 1262305544bSClément Léger 1272305544bSClément Léger /** 1282305544bSClément Léger * clk_enable - Enable a clock and its ascendance 1292305544bSClément Léger * 1302305544bSClément Léger * @clk: Clock to be enabled 1312305544bSClément Léger * Return a TEE_Result compliant value 1322305544bSClément Léger */ 1332305544bSClément Léger TEE_Result clk_enable(struct clk *clk); 1342305544bSClément Léger 1352305544bSClément Léger /** 1362305544bSClément Léger * clk_disable - Disable a clock 1372305544bSClément Léger * 1382305544bSClément Léger * @clk: Clock to be disabled 1392305544bSClément Léger */ 1402305544bSClément Léger void clk_disable(struct clk *clk); 1412305544bSClément Léger 1422305544bSClément Léger /** 1436c9ed842SEtienne Carriere * clk_is_enabled - Informative state on the clock 1446c9ed842SEtienne Carriere * 1456c9ed842SEtienne Carriere * This function is useful during specific system sequences where core 1466c9ed842SEtienne Carriere * executes atomically (primary core boot, some low power sequences). 1476c9ed842SEtienne Carriere * 1486c9ed842SEtienne Carriere * @clk: Clock refernece 1496c9ed842SEtienne Carriere */ 1506c9ed842SEtienne Carriere bool clk_is_enabled(struct clk *clk); 1516c9ed842SEtienne Carriere 1526c9ed842SEtienne Carriere /** 1532305544bSClément Léger * clk_get_parent - Get the current clock parent 1542305544bSClément Léger * 1552305544bSClément Léger * @clk: Clock for which the parent is needed 1562305544bSClément Léger * Return the clock parent or NULL if there is no parent 1572305544bSClément Léger */ 1582305544bSClément Léger struct clk *clk_get_parent(struct clk *clk); 1592305544bSClément Léger 1602305544bSClément Léger /** 1612305544bSClément Léger * clk_get_num_parents - Get the number of parents for a clock 1622305544bSClément Léger * 1632305544bSClément Léger * @clk: Clock for which the number of parents is needed 1642305544bSClément Léger * Return the number of parents 1652305544bSClément Léger */ 1662305544bSClément Léger static inline size_t clk_get_num_parents(struct clk *clk) 1672305544bSClément Léger { 1682305544bSClément Léger return clk->num_parents; 1692305544bSClément Léger } 1702305544bSClément Léger 1712305544bSClément Léger /** 1722305544bSClément Léger * Get a clock parent by its index 1732305544bSClément Léger * 1742305544bSClément Léger * @clk: Clock for which the parent is needed 1752305544bSClément Léger * @pidx: Parent index for the clock 1762305544bSClément Léger * Return the clock parent at index @pidx or NULL if out of bound 1772305544bSClément Léger */ 1782305544bSClément Léger struct clk *clk_get_parent_by_index(struct clk *clk, size_t pidx); 1792305544bSClément Léger 1802305544bSClément Léger /** 1812305544bSClément Léger * clk_set_parent - Set the current clock parent 1822305544bSClément Léger * 1832305544bSClément Léger * @clk: Clock for which the parent should be set 1842305544bSClément Léger * @parent: Parent clock to set 1852305544bSClément Léger * Return a TEE_Result compliant value 1862305544bSClément Léger */ 1872305544bSClément Léger TEE_Result clk_set_parent(struct clk *clk, struct clk *parent); 1882305544bSClément Léger 1895df61a5dSClément Léger /** 1905df61a5dSClément Léger * clk_get_rates_array - Get supported rates as an array 1915df61a5dSClément Léger * 1925df61a5dSClément Léger * @clk: Clock for which the rates are requested 1935df61a5dSClément Léger * @start_index: start index of requested rates 1945df61a5dSClément Léger * @rates: Array of rates allocated by caller or NULL to query count of rates 1955df61a5dSClément Léger * @nb_elts: Max number of elements that the array can hold as input. Contains 1965df61a5dSClément Léger * the number of elements that was added in the array as output. 1975df61a5dSClément Léger * Returns a TEE_Result compliant value 1985df61a5dSClément Léger */ 1995df61a5dSClément Léger TEE_Result clk_get_rates_array(struct clk *clk, size_t start_index, 2005df61a5dSClément Léger unsigned long *rates, size_t *nb_elts); 2015df61a5dSClément Léger 202*cd04d138SEtienne Carriere /* Print current clock tree summary on output console (info trace level) */ 203*cd04d138SEtienne Carriere void clk_print_tree(void); 204*cd04d138SEtienne Carriere 2052305544bSClément Léger #endif /* __DRIVERS_CLK_H */ 206