1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* Copyright (c) 2022-2024 HiSilicon Limited. */ 3 4 #ifndef __SEC_CIPHER_H__ 5 #define __SEC_CIPHER_H__ 6 7 #include <stdbool.h> 8 #include <stdint.h> 9 10 #include "hisi_qm.h" 11 12 #define DES_KEY_SIZE 8 13 #define SEC_3DES_2KEY_SIZE (2 * DES_KEY_SIZE) 14 #define SEC_3DES_3KEY_SIZE (3 * DES_KEY_SIZE) 15 #define SEC_SM4_XTS_KEY_SIZE 32 16 #define SEC_SM4_ECB_KEY_SIZE 16 17 #define SEC_MAX_CIPHER_KEY_SIZE 64 18 #define MAX_CIPHER_LENGTH 16776704 19 #define MIN_CIPHER_LENGTH 16 20 #define XTS_KEYSIZE_128 32 21 #define XTS_KEYSIZE_256 64 22 #define DES_CBC_IV_SIZE 8 23 #define AES_SM4_IV_SIZE 16 24 #define SEC_MAX_IV_SIZE 2 25 #define CTR_MODE_LEN_SHIFT 4 26 #define CTR_128BIT_COUNTER 16 27 #define AES_SM4_BLOCK_SIZE 16 28 #define LEFT_MOST_BIT 7 29 #define CTR_SRC_ALIGN_MASK 0xf 30 #define CTR_SRC_BLOCK_SIZE 0x10 31 32 #define CKEY_LEN_128_BIT 0x1 33 #define CKEY_LEN_192_BIT 0x2 34 #define CKEY_LEN_256_BIT 0x3 35 #define CKEY_LEN_SM4 0x0 36 #define CKEY_LEN_DES 0x1 37 #define CKEY_LEN_3DES_3KEY 0x1 38 #define CKEY_LEN_3DES_2KEY 0x3 39 40 enum sec_c_alg { 41 C_ALG_DES = 0x0, 42 C_ALG_3DES = 0x1, 43 C_ALG_AES = 0x2, 44 C_ALG_SM4 = 0x3, 45 }; 46 47 enum sec_c_mode { 48 C_MODE_ECB = 0x0, 49 C_MODE_CBC = 0x1, 50 C_MODE_CFB = 0x2, 51 C_MODE_OFB = 0x3, 52 C_MODE_CTR = 0x4, 53 C_MODE_CCM = 0x5, 54 C_MODE_GCM = 0x6, 55 C_MODE_XTS = 0x7, 56 C_MODE_CTS = 0x9, 57 }; 58 59 enum sec_cipher_dir { 60 NO_CIPHER, 61 CIPHER_ENCRYPT, 62 CIPHER_DECRYPT, 63 HARDWARE_COPY, 64 }; 65 66 struct sec_cipher_ctx { 67 uint8_t key[SEC_MAX_CIPHER_KEY_SIZE]; 68 uint64_t iv[SEC_MAX_IV_SIZE]; 69 uint64_t key_dma; 70 uint64_t iv_dma; 71 uint8_t *in; 72 uint64_t in_dma; 73 uint8_t *out; 74 uint64_t out_dma; 75 struct hisi_qp *qp; 76 size_t offs; 77 uint32_t len; 78 uint8_t alg; 79 uint8_t mode; 80 uint8_t iv_len; 81 uint8_t key_len; 82 uint8_t c_key_len; 83 bool encrypt; 84 }; 85 #endif /* __SEC_CIPHER_H__ */ 86