1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright 2018-2021, 2023 NXP 4 * 5 * Brief CAAM Descriptor defines. 6 */ 7 #ifndef __CAAM_DESC_DEFINES_H__ 8 #define __CAAM_DESC_DEFINES_H__ 9 10 #include <util.h> 11 12 /* 13 * Common Command constants 14 */ 15 #define CMD_TYPE(cmd) SHIFT_U32((cmd) & 0x1F, 27) 16 #define GET_CMD_TYPE(op) ((op) & (SHIFT_U32(0x1F, 27))) 17 #define CMD_CLASS(val) SHIFT_U32((val) & 0x3, 25) 18 #define CLASS_NO 0x0 19 #define CLASS_1 0x1 20 #define CLASS_2 0x2 21 #define CLASS_DECO 0x3 22 23 #define CMD_SGT BIT32(24) 24 #define CMD_IMM BIT32(23) 25 26 /* 27 * HEADER Job Descriptor Header format 28 */ 29 #define CMD_HDR_JD_TYPE CMD_TYPE(0x16) 30 31 /* Must be ONE */ 32 #define HDR_JD_ONE BIT32(23) 33 34 /* Start Index if SHR = 0 */ 35 #define HDR_JD_START_IDX(line) SHIFT_U32((line) & 0x3F, 16) 36 37 /* Descriptor Length */ 38 #define HDR_JD_DESCLEN(len) SHIFT_U32((len) & 0x7F, 0) 39 #define GET_JD_DESCLEN(entry) ((entry) & 0x7F) 40 41 /* 42 * KEY Command fields 43 */ 44 #define CMD_KEY_TYPE CMD_TYPE(0x00) 45 46 /* Key Destination */ 47 #define KEY_DEST(val) SHIFT_U32((KEY_DEST_##val) & 0x3, 16) 48 #define KEY_DEST_REG 0x0 49 #define KEY_DEST_PKHA_E 0x1 50 #define KEY_DEST_AFHA_SBOX 0x2 51 #define KEY_DEST_MDHA_SPLIT 0x3 52 53 /* Plaintext Store */ 54 #define KEY_PTS BIT32(14) 55 56 /* Key Length */ 57 #define KEY_LENGTH(len) SHIFT_U32((len) & 0x3FF, 0) 58 59 /* 60 * LOAD Command fields 61 */ 62 #define CMD_LOAD_TYPE CMD_TYPE(0x02) 63 64 /* Load Destination */ 65 #define LOAD_DST(reg) SHIFT_U32((reg) & 0x7F, 16) 66 67 /* Offset in destination register */ 68 #define LOAD_OFFSET(off) SHIFT_U32((off) & 0xFF, 8) 69 70 /* Length */ 71 #define LOAD_LENGTH(len) SHIFT_U32((len) & 0xFF, 0) 72 73 /* 74 * STORE Command fields 75 */ 76 #define CMD_STORE_TYPE CMD_TYPE(0x0A) 77 #define CMD_STORE_SEQ_TYPE CMD_TYPE(0x0B) 78 79 /* Store Source */ 80 #define STORE_SRC(reg) SHIFT_U32((reg) & 0x7F, 16) 81 82 /* Offset in source register */ 83 #define STORE_OFFSET(off) SHIFT_U32((off) & 0xFF, 8) 84 85 /* Length */ 86 #define STORE_LENGTH(len) SHIFT_U32((len) & 0xFF, 0) 87 88 /* 89 * Define the Load/Store Registers Source and Destination 90 */ 91 #define REG_MODE 0x00 92 #define REG_KEY_SIZE 0x01 93 #define REG_DATA_SIZE 0x02 94 #define REG_ICV_SIZE 0x03 95 #define REG_DECO_MID_STATUS 0x04 96 #define REG_DECO_CTRL2 0x05 97 #define REG_CHA_CTRL 0x06 98 #define REG_DECO_CTRL 0x06 99 #define REG_IRQ_CTRL 0x07 100 #define REG_DECO_PROT_OVERWRITE 0x07 101 #define REG_CLEAR_WRITTEN 0x08 102 #define REG_MATH0 0x08 103 #define REG_MATH1 0x09 104 #define REG_MATH2 0x0A 105 #define REG_CHA_INST_SELECT 0x0A 106 #define REG_AAD_SIZE 0x0B 107 #define REG_MATH3 0x0B 108 #define REG_ALT_DATA_SIZE_C1 0x0F 109 #define REG_PKHA_A_SIZE 0x10 110 #define REG_PKHA_B_SIZE 0x11 111 #define REG_PKHA_N_SIZE 0x12 112 #define REG_PKHA_E_SIZE 0x13 113 #define REG_CTX 0x20 114 #define REG_MATH0_DW 0x30 115 #define REG_MATH1_DW 0x31 116 #define REG_MATH2_DW 0x32 117 #define REG_MATH3_DW 0x33 118 #define REG_MATH0_B 0x38 119 #define REG_MATH1_B 0x39 120 #define REG_MATH2_B 0x3A 121 #define REG_MATH3_B 0x3B 122 #define REG_KEY 0x40 123 #define REG_DECO_DESC 0x40 124 #define REG_NFIFO_n_SIZE 0x70 125 #define REG_NFIFO_MATH 0x73 126 #define REG_SIZE 0x74 127 #define REG_SIZE_MATH 0x75 128 #define REG_IFIFO_SHIFT 0x76 129 #define REG_OFIFO_SHIFT 0x77 130 #define REG_AUX_FIFO 0x78 131 #define REG_NFIFO 0x7A 132 #define REG_IFIFO 0x7C 133 #define REG_OFIFO 0x7E 134 135 /* 136 * FIFO LOAD Command fields 137 */ 138 #define CMD_FIFO_LOAD_TYPE CMD_TYPE(0x04) 139 #define CMD_SEQ_FIFO_LOAD_TYPE CMD_TYPE(0x05) 140 141 /* Extended Length */ 142 #define FIFO_LOAD_EXT BIT32(22) 143 144 /* Input data */ 145 #define FIFO_LOAD_INPUT(reg) SHIFT_U32((FIFO_LOAD_##reg) & 0x3F, 16) 146 #define FIFO_LOAD_ACTION(act) SHIFT_U32((FIFO_LOAD_##act) & 0x3F, 16) 147 148 /* Length */ 149 #define FIFO_LOAD_MAX 0xFFFF 150 #define FIFO_LOAD_LENGTH(len) SHIFT_U32((len) & FIFO_LOAD_MAX, 0) 151 152 /* 153 * Define the FIFO Load Type Input 154 */ 155 #define FIFO_LOAD_PKHA_A0 0x00 156 #define FIFO_LOAD_PKHA_A1 0x01 157 #define FIFO_LOAD_PKHA_A2 0x02 158 #define FIFO_LOAD_PKHA_A3 0x03 159 #define FIFO_LOAD_PKHA_B0 0x04 160 #define FIFO_LOAD_PKHA_B1 0x05 161 #define FIFO_LOAD_PKHA_B2 0x06 162 #define FIFO_LOAD_PKHA_B3 0x07 163 #define FIFO_LOAD_PKHA_N 0x08 164 #define FIFO_LOAD_PKHA_A 0x0C 165 #define FIFO_LOAD_PKHA_B 0x0D 166 #define FIFO_LOAD_NO_INFO_NFIFO 0x0F 167 #define FIFO_LOAD_MSG 0x10 168 #define FIFO_LOAD_MSG_C1_OUT_C2 0x18 169 #define FIFO_LOAD_IV 0x20 170 #define FIFO_LOAD_BITDATA 0x2C 171 #define FIFO_LOAD_AAD 0x30 172 #define FIFO_LOAD_ICV 0x38 173 174 /* Define Action of some FIFO Data */ 175 #define FIFO_LOAD_NOACTION 0x0 176 #define FIFO_LOAD_FLUSH 0x1 177 #define FIFO_LOAD_LAST_C1 0x2 178 #define FIFO_LOAD_LAST_C2 0x4 179 180 /* 181 * FIFO STORE Command fields 182 */ 183 #define CMD_FIFO_STORE_TYPE CMD_TYPE(0x0C) 184 #define CMD_SEQ_FIFO_STORE_TYPE CMD_TYPE(0x0D) 185 186 /* Extended Length */ 187 #define FIFO_STORE_EXT BIT32(22) 188 189 /* Output data */ 190 #define FIFO_STORE_OUTPUT(reg) SHIFT_U32((FIFO_STORE_##reg) & 0x3F, 16) 191 192 /* Length */ 193 #define FIFO_STORE_MAX 0xFFFF 194 #define FIFO_STORE_LENGTH(len) SHIFT_U32((len) & FIFO_STORE_MAX, 0) 195 196 /* 197 * Define the FIFO Store Type Output 198 */ 199 #define FIFO_STORE_PKHA_A0 0x00 200 #define FIFO_STORE_PKHA_A1 0x01 201 #define FIFO_STORE_PKHA_A2 0x02 202 #define FIFO_STORE_PKHA_A3 0x03 203 #define FIFO_STORE_PKHA_B0 0x04 204 #define FIFO_STORE_PKHA_B1 0x05 205 #define FIFO_STORE_PKHA_B2 0x06 206 #define FIFO_STORE_PKHA_B3 0x07 207 #define FIFO_STORE_PKHA_N 0x08 208 #define FIFO_STORE_PKHA_A 0x0C 209 #define FIFO_STORE_PKHA_B 0x0D 210 #define FIFO_STORE_AFHA_SBOX_AES_CCM_JKEK 0x10 211 #define FIFO_STORE_AFHA_SBOX_AES_CCM_TKEK 0x11 212 #define FIFO_STORE_PKHA_E_AES_CCM_JKEK 0x12 213 #define FIFO_STORE_PKHA_E_AES_CCM_TKEK 0x13 214 #define FIFO_STORE_KEY_AES_CCM_JKEK 0x14 215 #define FIFO_STORE_KEY_AES_CCM_TKEK 0x15 216 #define FIFO_STORE_C2_MDHA_SPLIT_KEY_AES_CCM_JKEK 0x16 217 #define FIFO_STORE_C2_MDHA_SPLIT_KEY_AES_CCM_TKEK 0x17 218 #define FIFO_STORE_AFHA_SBOX_AES_ECB_JKEK 0x20 219 #define FIFO_STORE_AFHA_SBOX_AES_ECB_TKEK 0x21 220 #define FIFO_STORE_PKHA_E_AES_ECB_JKEK 0x22 221 #define FIFO_STORE_PKHA_E_AES_ECB_TKEK 0x23 222 #define FIFO_STORE_KEY_AES_ECB_JKEK 0x24 223 #define FIFO_STORE_KEY_AES_ECB_TKEK 0x25 224 #define FIFO_STORE_C2_MDHA_SPLIT_KEY_AES_ECB_JKEK 0x26 225 #define FIFO_STORE_C2_MDHA_SPLIT_KEY_AES_ECB_TKEK 0x27 226 #define FIFO_STORE_MSG_DATA 0x30 227 #define FIFO_STORE_RNG_TO_MEM 0x34 228 #define FIFO_STORE_RNG_STAY_FIFO 0x35 229 #define FIFO_STORE_SKIP 0x3F 230 231 /* 232 * MOVE Command fields 233 */ 234 #define CMD_MOVE_TYPE CMD_TYPE(0x0F) 235 236 /* Auxiliary */ 237 #define MOVE_AUX(val) SHIFT_U32((val) & 0x3, 25) 238 239 /* Wait for completion */ 240 #define MOVE_WC BIT32(24) 241 242 /* Source */ 243 #define MOVE_SRC(src) MOVE_SRC_##src 244 #define MOVE_REG_SRC(reg) SHIFT_U32((reg) & 0xF, 20) 245 #define MOVE_SRC_C1_CTX_REG MOVE_REG_SRC(0x0) 246 #define MOVE_SRC_C2_CTX_REG MOVE_REG_SRC(0x1) 247 #define MOVE_SRC_OFIFO MOVE_REG_SRC(0x2) 248 #define MOVE_SRC_DESC_BUF MOVE_REG_SRC(0x3) 249 #define MOVE_SRC_MATH_REG0 MOVE_REG_SRC(0x4) 250 #define MOVE_SRC_MATH_REG1 MOVE_REG_SRC(0x5) 251 #define MOVE_SRC_MATH_REG2 MOVE_REG_SRC(0x6) 252 #define MOVE_SRC_MATH_REG3 MOVE_REG_SRC(0x7) 253 #define MOVE_SRC_NFIFO_DECO_ALIGN MOVE_REG_SRC(0x8) 254 #define MOVE_SRC_NFIFO_C1_ALIGN (MOVE_REG_SRC(0x9) | MOVE_AUX(0x1)) 255 #define MOVE_SRC_NFIFO_C2_ALIGN (MOVE_REG_SRC(0x9) | MOVE_AUX(0x0)) 256 #define MOVE_SRC_DECO_ALIGN (MOVE_REG_SRC(0xA) | MOVE_AUX(0x0)) 257 #define MOVE_SRC_C1_ALIGN (MOVE_REG_SRC(0xA) | MOVE_AUX(0x1)) 258 #define MOVE_SRC_C2_ALIGN (MOVE_REG_SRC(0xA) | MOVE_AUX(0x2)) 259 #define MOVE_SRC_C1_KEY MOVE_REG_SRC(0xD) 260 #define MOVE_SRC_C2_KEY MOVE_REG_SRC(0xE) 261 262 /* Destination */ 263 #define MOVE_DST(dst) SHIFT_U32((MOVE_DST_##dst), 16) 264 #define MOVE_DST_C1_CTX_REG 0x0 265 #define MOVE_DST_C2_CTX_REG 0x1 266 #define MOVE_DST_OFIFO 0x2 267 #define MOVE_DST_DESC_BUF 0x3 268 #define MOVE_DST_MATH_REG0 0x4 269 #define MOVE_DST_MATH_REG1 0x5 270 #define MOVE_DST_MATH_REG2 0x6 271 #define MOVE_DST_MATH_REG3 0x7 272 #define MOVE_DST_IFIFO_C1 0x8 273 #define MOVE_DST_IFIFO_C2 0x9 274 #define MOVE_DST_IFIFO_C2_LC2 ((0x9 << 16 | MOVE_AUX(0x1)) >> 16) 275 #define MOVE_DST_IFIFO 0xA 276 #define MOVE_DST_PKHA_A 0xC 277 #define MOVE_DST_C1_KEY 0xD 278 #define MOVE_DST_C2_KEY 0xE 279 #define MOVE_DST_AUX_FIFO 0xF 280 281 /* Offset */ 282 #define MOVE_OFFSET(off) SHIFT_U32((off) & 0xFF, 8) 283 284 /* Length */ 285 #define MOVE_LENGTH(len) SHIFT_U32((len) & 0xFF, 0) 286 287 /* 288 * Operation Command fields 289 * Algorithm/Protocol/PKHA 290 */ 291 #define CMD_OP_TYPE CMD_TYPE(0x10) 292 293 /* Operation Type */ 294 #define OP_TYPE(type) SHIFT_U32((OP_TYPE_##type) & 0x7, 24) 295 #define OP_TYPE_UNI 0x0 296 #define OP_TYPE_PKHA 0x1 297 #define OP_TYPE_CLASS1 0x2 298 #define OP_TYPE_CLASS2 0x4 299 #define OP_TYPE_DECAPS 0x6 300 #define OP_TYPE_ENCAPS 0x7 301 302 /* Protocol Identifier */ 303 #define PROTID(id) SHIFT_U32((PROTID_##id) & 0xFF, 16) 304 #define PROTID_BLOB 0x0D 305 #define PROTID_MPKEY 0x14 306 #define PROTID_PKKEY 0x14 307 #define PROTID_MPSIGN 0x15 308 #define PROTID_DSASIGN 0x15 309 #define PROTID_DSAVERIFY 0x16 310 #define PROTID_SHARED_SECRET 0x17 311 #define PROTID_RSA_ENC 0x18 312 #define PROTID_RSA_DEC 0x19 313 #define PROTID_RSA_FINISH_KEY 0x1A 314 315 /* 316 * RSA Protocol Information 317 */ 318 #define PROT_RSA_FMT(format) SHIFT_U32((PROT_RSA_FMT_##format) & 0x1, 12) 319 #define PROT_RSA_FMT_NO 0 320 #define PROT_RSA_FMT_PKCS_V1_5 1 321 #define PROT_RSA_FMT_MASK SHIFT_U32(0x1, 12) 322 323 #define PROT_RSA_DEC_KEYFORM(format) SHIFT_U32(((format) - 1) & 0x3, 0) 324 325 /* RSA Key Protocol Information */ 326 #define PROT_RSA_KEY(format) SHIFT_U32((PROT_RSA_KEY_##format) & 0x3, 0) 327 #define PROT_RSA_KEY_ALL 0 328 #define PROT_RSA_KEY_N_D 2 329 330 #define PROT_RSA_FINISH_KEY_ENC_OUT(alg) PROT_RSA_FINISH_KEY_ENC_OUT_##alg 331 #define PROT_RSA_FINISH_KEY_ENC_OUT_ECB BIT32(6) 332 #define PROT_RSA_FINISH_KEY_ENC_OUT_CCM BIT32(6) 333 334 #define PROT_RSA_FINISH_KEY_ENC(alg) PROT_RSA_FINISH_KEY_ENC_##alg 335 #define PROT_RSA_FINISH_KEY_ENC_ECB 0 336 #define PROT_RSA_FINISH_KEY_ENC_CCM BIT32(4) 337 338 #define PROT_RSA_FINISH_KEY(alg) PROT_RSA_FINISH_KEY_##alg 339 #define PROT_RSA_FINISH_KEY_NONE 0 340 #define PROT_RSA_FINISH_KEY_ECB (PROT_RSA_FINISH_KEY_ENC_OUT_ECB | \ 341 PROT_RSA_FINISH_KEY_ENC_ECB) 342 #define PROT_RSA_FINISH_KEY_CCM (PROT_RSA_FINISH_KEY_ENC_OUT_CCM | \ 343 PROT_RSA_FINISH_KEY_ENC_CCM) 344 345 #define PROT_RSA_KEY_ENC(format) SHIFT_U32((PROT_RSA_KEY_ENC_##format) & 0x3, 8) 346 #define PROT_RSA_KEY_ENC_NONE 0 347 #define PROT_RSA_KEY_ENC_ECB 1 348 #define PROT_RSA_KEY_ENC_CCM 3 349 350 /* 351 * ECC Protocol Information 352 */ 353 #define PROT_PK_MSG(type) SHIFT_U32(PROT_PK_MSG_##type, 10) 354 #define PROT_PK_MSG_MES_REP 0 355 #define PROT_PK_MSG_HASHED 2 356 #define PROT_PK_TYPE(type) SHIFT_U32(PROT_PK_##type, 1) 357 #define PROT_PK_DL 0 358 #define PROT_PK_ECC 1 359 #define PROT_PRI_ENC(alg) PROT_PRI_ENC_##alg 360 #define PROT_PRI_ENC_ECB BIT32(2) 361 #define PROT_PRI_ENC_CCM BIT32(2) 362 #define PROT_PRI_EXT(type) PROT_PRI_EXT_##type 363 #define PROT_PRI_EXT_ECB 0 364 #define PROT_PRI_EXT_CCM BIT32(4) 365 #define PROT_PRI(alg) PROT_PRI_##alg 366 #define PROT_PRI_NONE 0 367 #define PROT_PRI_ECB (PROT_PRI_ENC(ECB) | PROT_PRI_EXT(ECB)) 368 #define PROT_PRI_CCM (PROT_PRI_ENC(CCM) | PROT_PRI_EXT(CCM)) 369 370 /* 371 * BLOB Protocol Information 372 */ 373 #define PROT_BLOB_FMT_MSTR BIT32(1) 374 #define PROT_BLOB_TYPE(type) SHIFT_U32(1, PROT_BLOB_TYPE_##type) 375 #define PROT_BLOB_TYPE_BLACK_KEY 2 376 #define PROT_BLOB_SEC_MEM BIT32(3) 377 #define PROT_BLOB_EKT 8 378 #define PROT_BLOB_INFO(aes) SHIFT_U32(PROT_BLOB_AES_##aes, \ 379 PROT_BLOB_EKT) 380 #define PROT_BLOB_AES_CCM 1 381 #define PROT_BLOB_AES_ECB 0 382 #define PROT_BLOB_FORMAT(format) SHIFT_U32(0, PROT_BLOB_FORMAT_##format) 383 #define PROT_BLOB_FORMAT_NORMAL 0 384 385 /* 386 * MP Protocol Information 387 */ 388 #define PROT_MP_PUBK_SGT BIT32(31) 389 #define PROT_MP_CURVE(curve) SHIFT_U32((curve) & 0xF, 17) 390 391 /* 392 * Algorithm Identifier 393 */ 394 #define OP_ALGO(algo) SHIFT_U32((ALGO_##algo) & 0xFF, 16) 395 #define ALGO_AES 0x10 396 #define ALGO_DES 0x20 397 #define ALGO_3DES 0x21 398 #define ALGO_ARC4 0x30 399 #define ALGO_RNG 0x50 400 #define ALGO_MD5 0x40 401 #define ALGO_SHA1 0x41 402 #define ALGO_SHA224 0x42 403 #define ALGO_SHA256 0x43 404 #define ALGO_SHA384 0x44 405 #define ALGO_SHA512 0x45 406 #define ALGO_SHA512_224 0x46 407 #define ALGO_SHA512_256 0x47 408 409 /* Algorithm Additional Information */ 410 #define ALGO_AAI(info) SHIFT_U32((AAI_##info) & 0x1FF, 4) 411 412 /* AES AAI */ 413 #define AAI_AES_CTR_MOD128 0x00 414 #define AAI_AES_CBC 0x10 415 #define AAI_AES_ECB 0x20 416 #define AAI_AES_CFB 0x30 417 #define AAI_AES_OFB 0x40 418 #define AAI_AES_CMAC 0x60 419 #define AAI_AES_XCBC_MAC 0x70 420 #define AAI_AES_CCM 0x80 421 #define AAI_AES_GCM 0x90 422 423 /* DES AAI */ 424 #define AAI_DES_CBC 0x10 425 #define AAI_DES_ECB 0x20 426 #define AAI_DES_CFB 0x30 427 #define AAI_DES_OFB 0x40 428 429 /* Digest MD5/SHA AAI */ 430 #define AAI_DIGEST_HASH 0x00 431 #define AAI_DIGEST_HMAC 0x01 432 #define AAI_DIGEST_SMAC 0x02 433 #define AAI_DIGEST_HMAC_PRECOMP 0x04 434 435 /* Algorithm State */ 436 #define ALGO_AS(state) SHIFT_U32((AS_##state) & 0x3, 2) 437 #define AS_UPDATE 0x0 438 #define AS_INIT 0x1 439 #define AS_FINAL 0x2 440 #define AS_INIT_FINAL 0x3 441 442 /* Algorithm Encrypt/Decrypt */ 443 #define ALGO_DECRYPT SHIFT_U32(0x0, 0) 444 #define ALGO_ENCRYPT SHIFT_U32(0x1, 0) 445 446 /* 447 * Specific RNG Algorithm bits 12-0 448 */ 449 /* Secure Key */ 450 #define ALGO_RNG_SK BIT32(12) 451 452 /* State Handle */ 453 #define ALGO_RNG_SH(sh) SHIFT_U32((sh) & 0x3, 4) 454 455 /* Prediction Resistance */ 456 #define ALGO_RNG_PR BIT32(1) 457 458 /* State */ 459 #define AS_RNG_GENERATE 0x0 460 #define AS_RNG_INSTANTIATE 0x1 461 #define AS_RNG_RESEED 0x2 462 #define AS_RNG_UNINSTANTIATE 0x3 463 464 /* 465 * JUMP Command fields 466 */ 467 #define CMD_JUMP_TYPE CMD_TYPE(0x14) 468 469 /* Jump Select Type */ 470 #define JMP_JSL BIT32(24) 471 472 /* Jump Type */ 473 #define JUMP_TYPE(type) SHIFT_U32((JMP_##type) & 0xF, 20) 474 #define JMP_LOCAL 0x0 475 #define JMP_LOCAL_INC 0x1 476 #define JMP_SUBROUTINE_CALL 0x2 477 #define JMP_LOCAL_DEC 0x3 478 #define JMP_NON_LOCAL 0x4 479 #define JMP_SUBROUTINE_RET 0x6 480 #define JMP_HALT 0x8 481 #define JMP_HALT_USER_STATUS 0xC 482 483 /* Test Type */ 484 #define JUMP_TST_TYPE(type) SHIFT_U32((JMP_TST_##type) & 0x3, 16) 485 #define JMP_TST_ALL_COND_TRUE 0x0 486 #define JMP_TST_ALL_COND_FALSE 0x1 487 #define JMP_TST_ANY_COND_TRUE 0x2 488 #define JMP_TST_ANY_COND_FALSE 0x3 489 490 /* Jump Source to increment/decrement */ 491 #define JMP_SRC(src) SHIFT_U32((JMP_SRC_##src) & 0xF, 12) 492 #define JMP_SRC_MATH_0 0x0 493 494 /* Test Condition */ 495 #define JMP_COND(cond) SHIFT_U32((JMP_COND_##cond) & 0xFF, 8) 496 #define JMP_COND_MATH(cond) SHIFT_U32((JMP_COND_MATH_##cond) & 0xF, 8) 497 #define JMP_COND_NONE 0x00 498 #define JMP_COND_PKHA_IS_ZERO 0x80 499 #define JMP_COND_PKHA_GCD_1 0x40 500 #define JMP_COND_PKHA_IS_PRIME 0x20 501 #define JMP_COND_MATH_N 0x08 502 #define JMP_COND_MATH_Z 0x04 503 #define JMP_COND_NIFP 0x04 504 #define JMP_COND_MATH_C 0x02 505 #define JMP_COND_MATH_NV 0x01 506 507 /* Local Offset */ 508 #define JMP_LOCAL_OFFSET(off) SHIFT_U32((off) & 0xFF, 0) 509 510 /* 511 * MATH Command fields 512 */ 513 #define CMD_MATH_TYPE CMD_TYPE(0x15) 514 #define CMD_MATHI_TYPE CMD_TYPE(0x1D) 515 516 /* Immediate Four Bytes */ 517 #define MATH_IFB BIT32(26) 518 519 /* Function Mathematical */ 520 #define MATH_FUNC(func) SHIFT_U32((MATH_FUNC_##func) & 0xF, 20) 521 #define MATH_FUNC_ADD 0x0 522 #define MATH_FUNC_ADD_W_CARRY 0x1 523 #define MATH_FUNC_SUB 0x2 524 #define MATH_FUNC_SUB_W_BORROW 0x3 525 #define MATH_FUNC_OR 0x4 526 #define MATH_FUNC_AND 0x5 527 #define MATH_FUNC_XOR 0x6 528 #define MATH_FUNC_SHIFT_L 0x7 529 #define MATH_FUNC_SHIFT_R 0x8 530 #define MATH_FUNC_SHLD 0x9 531 #define MATH_FUNC_ZBYTE 0xA 532 #define MATH_FUNC_SWAP_BYTES 0xB 533 534 /* Source 0 */ 535 #define MATH_SRC0(reg) SHIFT_U32((MATH_SRC0_##reg) & 0xF, 16) 536 #define MATH_SRC0_REG0 0x0 537 #define MATH_SRC0_REG1 0x1 538 #define MATH_SRC0_REG2 0x2 539 #define MATH_SRC0_IMM_DATA 0x4 540 #define MATH_SRC0_DPOVRD 0x7 541 #define MATH_SRC0_SIL 0x8 542 #define MATH_SRC0_SOL 0x9 543 #define MATH_SRC0_VSIL 0xA 544 #define MATH_SRC0_VSOL 0xB 545 #define MATH_SRC0_ZERO 0xC 546 #define MATH_SRC0_ONE 0xF 547 548 /* Source 1 */ 549 #define MATH_SRC1(reg) SHIFT_U32((MATH_SRC1_##reg) & 0xF, 12) 550 #define MATH_SRC1_REG0 0x0 551 #define MATH_SRC1_REG1 0x1 552 #define MATH_SRC1_REG2 0x2 553 #define MATH_SRC1_IMM_DATA 0x4 554 #define MATH_SRC1_DPOVRD 0x7 555 #define MATH_SRC1_VSIL 0x8 556 #define MATH_SRC1_VSOL 0x9 557 #define MATH_SRC1_IFIFO 0xA 558 #define MATH_SRC1_OFIFO 0xB 559 #define MATH_SRC1_ONE 0xC 560 #define MATH_SRC1_ZERO 0xF 561 562 /* Destination */ 563 #define MATH_DST(reg) SHIFT_U32((MATH_DST_##reg) & 0xF, 8) 564 #define MATH_DST_REG0 0x0 565 #define MATH_DST_REG1 0x1 566 #define MATH_DST_REG2 0x2 567 #define MATH_DST_DPOVRD 0x7 568 #define MATH_DST_SIL 0x8 569 #define MATH_DST_SOL 0x9 570 #define MATH_DST_VSIL 0xA 571 #define MATH_DST_VSOL 0xB 572 #define MATH_DST_NODEST 0xF 573 574 /* Length */ 575 #define MATH_LENGTH(len) SHIFT_U32((len) & 0xF, 0) 576 577 /* Immediate Value - MATHI operation */ 578 #define MATHI_SRC(reg) SHIFT_U32((MATH_SRC0_##reg) & 0xF, 16) 579 #define MATHI_DST(reg) SHIFT_U32((MATH_DST_##reg) & 0xF, 12) 580 #define MATHI_IMM_VALUE(val) SHIFT_U32((val) & 0xFF, 4) 581 582 /* 583 * Sequence Input/Output 584 */ 585 #define CMD_SEQ_IN_TYPE CMD_TYPE(0x1E) 586 #define CMD_SEQ_OUT_TYPE CMD_TYPE(0x1F) 587 588 /* Extended Length */ 589 #define SEQ_EXT BIT(22) 590 591 /* Length */ 592 #define SEQ_LENGTH(len) SHIFT_U32((len) & 0xFFFF, 0) 593 594 /* 595 * PKHA Operation 596 */ 597 #define PKHA_ALG SHIFT_U32(0x8, 20) 598 599 #define PKHA_F2M BIT32(17) 600 601 #define PKHA_OUTSEL(dst) SHIFT_U32((PKHA_OUTSEL_##dst) & 0x3, 8) 602 #define PKHA_OUTSEL_B 0x0 603 #define PKHA_OUTSEL_A 0x1 604 605 #define PKHA_FUNC(func) SHIFT_U32((PKHA_FUNC_##func) & 0x3F, 0) 606 #define PKHA_FUNC_CPY_NSIZE 0x10 607 #define PKHA_FUNC_CPY_SSIZE 0x11 608 #define PKHA_FUNC_MOD_ADD_A_B 0x02 609 #define PKHA_FUNC_MOD_SUB_A_B 0x03 610 #define PKHA_FUNC_MOD_SUB_B_A 0x04 611 #define PKHA_FUNC_MOD_MUL_A_B 0x05 612 #define PKHA_FUNC_MOD_EXP_A_E 0x06 613 #define PKHA_FUNC_MOD_AMODN 0x07 614 #define PKHA_FUNC_MOD_INV_A 0x08 615 #define PKHA_FUNC_ECC_POINT_ADD_P1_P2 0x09 616 #define PKHA_FUNC_ECC_POINT_DBL_P1 0x0A 617 #define PKHA_FUNC_ECC_POINT_MUL_E_P1 0x0B 618 #define PKHA_FUNC_MONT_RADIX_R2_MODE_N 0x0C 619 #define PKHA_FUNC_GCD_A_N 0x0E 620 #define PKHA_FUNC_MR_PRIMER_TEST 0x0F 621 #define PKHA_FUNC_MOD_CHECK_POINT 0x1C 622 623 /* PKHA Copy Memory Source and Destination */ 624 #define PKHA_REG_SRC(reg) SHIFT_U32((PKHA_REG_##reg) & 0x7, 17) 625 #define PKHA_REG_DST(reg) SHIFT_U32((PKHA_REG_##reg) & 0x3, 10) 626 #define PKHA_REG_A 0x0 627 #define PKHA_REG_B 0x1 628 #define PKHA_REG_E 0x2 629 #define PKHA_REG_N 0x3 630 631 #define PKHA_SEG_SRC(seg) SHIFT_U32((seg) & 0x3, 8) 632 #define PKHA_SEG_DST(seg) SHIFT_U32((seg) & 0x3, 6) 633 634 #define PKHA_CPY_SRC(src) PKHA_CPY_SRC_##src 635 #define PKHA_CPY_SRC_A0 (PKHA_REG_SRC(A) | PKHA_SEG_SRC(0)) 636 #define PKHA_CPY_SRC_A1 (PKHA_REG_SRC(A) | PKHA_SEG_SRC(1)) 637 #define PKHA_CPY_SRC_A2 (PKHA_REG_SRC(A) | PKHA_SEG_SRC(2)) 638 #define PKHA_CPY_SRC_A3 (PKHA_REG_SRC(A) | PKHA_SEG_SRC(3)) 639 #define PKHA_CPY_SRC_B0 (PKHA_REG_SRC(B) | PKHA_SEG_SRC(0)) 640 #define PKHA_CPY_SRC_B1 (PKHA_REG_SRC(B) | PKHA_SEG_SRC(1)) 641 #define PKHA_CPY_SRC_B2 (PKHA_REG_SRC(B) | PKHA_SEG_SRC(2)) 642 #define PKHA_CPY_SRC_B3 (PKHA_REG_SRC(B) | PKHA_SEG_SRC(3)) 643 #define PKHA_CPY_SRC_N0 (PKHA_REG_SRC(N) | PKHA_SEG_SRC(0)) 644 #define PKHA_CPY_SRC_N1 (PKHA_REG_SRC(N) | PKHA_SEG_SRC(1)) 645 #define PKHA_CPY_SRC_N2 (PKHA_REG_SRC(N) | PKHA_SEG_SRC(2)) 646 #define PKHA_CPY_SRC_N3 (PKHA_REG_SRC(N) | PKHA_SEG_SRC(3)) 647 648 #define PKHA_CPY_DST(dst) PKHA_CPY_DST_##dst 649 #define PKHA_CPY_DST_A0 (PKHA_REG_DST(A) | PKHA_SEG_DST(0)) 650 #define PKHA_CPY_DST_A1 (PKHA_REG_DST(A) | PKHA_SEG_DST(1)) 651 #define PKHA_CPY_DST_A2 (PKHA_REG_DST(A) | PKHA_SEG_DST(2)) 652 #define PKHA_CPY_DST_A3 (PKHA_REG_DST(A) | PKHA_SEG_DST(3)) 653 #define PKHA_CPY_DST_B0 (PKHA_REG_DST(B) | PKHA_SEG_DST(0)) 654 #define PKHA_CPY_DST_B1 (PKHA_REG_DST(B) | PKHA_SEG_DST(1)) 655 #define PKHA_CPY_DST_B2 (PKHA_REG_DST(B) | PKHA_SEG_DST(2)) 656 #define PKHA_CPY_DST_B3 (PKHA_REG_DST(B) | PKHA_SEG_DST(3)) 657 #define PKHA_CPY_DST_N0 (PKHA_REG_DST(N) | PKHA_SEG_DST(0)) 658 #define PKHA_CPY_DST_N1 (PKHA_REG_DST(N) | PKHA_SEG_DST(1)) 659 #define PKHA_CPY_DST_N2 (PKHA_REG_DST(N) | PKHA_SEG_DST(2)) 660 #define PKHA_CPY_DST_N3 (PKHA_REG_DST(N) | PKHA_SEG_DST(3)) 661 #define PKHA_CPY_DST_E (PKHA_REG_DST(E)) 662 663 /* 664 * Descriptor Protocol Data Block 665 */ 666 /* RSA Encryption */ 667 #define PDB_RSA_ENC_SGT_F SHIFT_U32(1, 31) 668 #define PDB_RSA_ENC_SGT_G SHIFT_U32(1, 30) 669 #define PDB_RSA_ENC_E_SIZE(len) SHIFT_U32((len) & 0xFFF, 12) 670 #define PDB_RSA_ENC_N_SIZE(len) SHIFT_U32((len) & 0xFFF, 0) 671 #define PDB_RSA_ENC_F_SIZE(len) SHIFT_U32((len) & 0xFFF, 0) 672 673 /* RSA Decryption */ 674 #define PDB_RSA_DEC_SGT_G SHIFT_U32(1, 31) 675 #define PDB_RSA_DEC_SGT_F SHIFT_U32(1, 30) 676 #define PDB_RSA_DEC_D_SIZE(len) SHIFT_U32((len) & 0xFFF, 12) 677 #define PDB_RSA_DEC_N_SIZE(len) SHIFT_U32((len) & 0xFFF, 0) 678 #define PDB_RSA_DEC_Q_SIZE(len) SHIFT_U32((len) & 0xFFF, 12) 679 #define PDB_RSA_DEC_P_SIZE(len) SHIFT_U32((len) & 0xFFF, 0) 680 681 /* RSA Finalize Key */ 682 #define PDB_RSA_KEY_P_SIZE(len) SHIFT_U32((len) & 0x1FF, 0) 683 #define PDB_RSA_KEY_E_SIZE(len) SHIFT_U32((len) & 0x3FF, 0) 684 #define PDB_RSA_KEY_N_SIZE(len) SHIFT_U32((len) & 0x3FF, 16) 685 686 /* Manufacturing Curve Select */ 687 #define PDB_SGT_MP_SIGN_MSG SHIFT_U32(1, 31) 688 #define PDB_SGT_MP_SIGN_C SHIFT_U32(1, 29) 689 #define PDB_SGT_MP_SIGN_D SHIFT_U32(1, 28) 690 #define PDB_MP_CSEL_P256 0x03 691 #define PDB_MP_CSEL_P384 0x04 692 #define PDB_MP_CSEL_P521 0x05 693 694 /* Public Key Generation */ 695 #define PDB_PKGEN_PD1 SHIFT_U32(1, 25) 696 /* Public Key Signature */ 697 #define PDB_PKSIGN_PD1 SHIFT_U32(1, 22) 698 /* Public Key Verify */ 699 #define PDB_PKVERIFY_PD1 SHIFT_U32(1, 22) 700 /* Shared Secret */ 701 #define PDB_SHARED_SECRET_PD1 SHIFT_U32(1, 25) 702 703 /* DSA Signatures */ 704 #define PDB_DSA_SIGN_N(len) SHIFT_U32((len) & (0x7F), 0) 705 #define PDB_DSA_SIGN_L(len) SHIFT_U32((len) & (0x3FF), 7) 706 707 /* SGT Flags Signature */ 708 #define PDB_SGT_PKSIGN_MSG SHIFT_U32(1, 27) 709 #define PDB_SGT_PKSIGN_SIGN_C SHIFT_U32(1, 26) 710 #define PDB_SGT_PKSIGN_SIGN_D SHIFT_U32(1, 25) 711 712 /* DSA Verify */ 713 #define PDB_DSA_VERIF_N(len) SHIFT_U32((len) & (0x7F), 0) 714 #define PDB_DSA_VERIF_L(len) SHIFT_U32((len) & (0x3FF), 7) 715 716 /* SGT Flags Verify */ 717 #define PDB_SGT_PKVERIF_MSG SHIFT_U32(1, 27) 718 #define PDB_SGT_PKVERIF_SIGN_C SHIFT_U32(1, 26) 719 #define PDB_SGT_PKVERIF_SIGN_D SHIFT_U32(1, 25) 720 721 /* SGT Flags Shared Secret */ 722 #define PDB_SGT_PKDH_SECRET SHIFT_U32(1, 27) 723 724 /* DL Keypair Generation */ 725 #define PDB_DL_KEY_L_SIZE(len) SHIFT_U32((len) & (0x3FF), 7) 726 #define PDB_DL_KEY_N_MASK 0x7F 727 #define PDB_DL_KEY_N_SIZE(len) SHIFT_U32((len) & (PDB_DL_KEY_N_MASK), 0) 728 729 /* ECC Domain Selection */ 730 #define PDB_ECC_ECDSEL(curve) SHIFT_U32((curve) & 0x3F, 7) 731 732 /* Black key padding */ 733 #define BLACK_KEY_NONCE_SIZE 6 734 #define BLACK_KEY_ICV_SIZE 6 735 736 /* 737 * ECC Predefined Domain 738 */ 739 enum caam_ecc_curve { 740 CAAM_ECC_P192 = (0x00), 741 CAAM_ECC_P224, 742 CAAM_ECC_P256, 743 CAAM_ECC_P384, 744 CAAM_ECC_P521, 745 CAAM_ECC_MAX, 746 CAAM_ECC_UNKNOWN = (0xFF), 747 }; 748 749 #endif /* __CAAM_DESC_DEFINES_H__ */ 750