xref: /optee_os/core/arch/riscv/plat-virt/main.c (revision 4edd96e6d7a7228e907cf498b23e5b5fbdaf39a0)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2022-2023 NXP
4  */
5 
6 #include <console.h>
7 #include <drivers/ns16550.h>
8 #include <drivers/plic.h>
9 #include <kernel/boot.h>
10 #include <kernel/tee_common_otp.h>
11 #include <platform_config.h>
12 
13 static struct plic_data plic_data __nex_bss;
14 static struct ns16550_data console_data __nex_bss;
15 
16 register_ddr(DRAM_BASE, DRAM_SIZE);
17 
18 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, UART0_BASE,
19 			CORE_MMU_PGDIR_SIZE);
20 
21 #ifdef CFG_RISCV_PLIC
22 void boot_primary_init_intc(void)
23 {
24 	plic_init(&plic_data, PLIC_BASE);
25 	interrupt_main_init(&plic_data.chip);
26 }
27 
28 void boot_secondary_init_intc(void)
29 {
30 	plic_hart_init(&plic_data);
31 }
32 #endif /* CFG_RISCV_PLIC */
33 
34 void console_init(void)
35 {
36 	ns16550_init(&console_data, UART0_BASE, IO_WIDTH_U8, 0);
37 	register_serial_console(&console_data.chip);
38 }
39 
40 void interrupt_main_handler(void)
41 {
42 	if (IS_ENABLED(CFG_RISCV_PLIC))
43 		plic_it_handle(&plic_data);
44 }
45