| #
43730326 |
| 28-Feb-2025 |
Huang Borong <huangborong@bosc.ac.cn> |
riscv: plat-virt: add APLIC and IMSIC support for QEMU virt platform
- Add APLIC and IMSIC configurations for the QEMU virt platform. - Override the interrupt controller initialization and interrupt
riscv: plat-virt: add APLIC and IMSIC support for QEMU virt platform
- Add APLIC and IMSIC configurations for the QEMU virt platform. - Override the interrupt controller initialization and interrupt handler functions when using APLIC or IMSIC.
Signed-off-by: Huang Borong <huangborong@bosc.ac.cn> Reviewed-by: Alvin Chang <alvinga@andestech.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
1729a810 |
| 21-Feb-2025 |
Alvin Chang <alvinga@andestech.com> |
riscv: plat-virt: Let console devices be build time configurable
Currently RISC-V virtual platform enforces 16550 UART to be console device. However, there are other console devices which can be cho
riscv: plat-virt: Let console devices be build time configurable
Currently RISC-V virtual platform enforces 16550 UART to be console device. However, there are other console devices which can be chose by developer. Thus, we allow the configurations for console device to be overridden at build time while keeping the default value enabled.
Besides, fix CFG_SBI_CONSOLE to be CFG_RISCV_SBI_CONSOLE.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| #
55ab8f06 |
| 27-Feb-2024 |
Alvin Chang <alvinga@andestech.com> |
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console
core: Refactor console_init() and introduce plat_console_init()
Since there are some cross-platform console drivers, we let console_init() be common code to have a chance to initialize those console drivers (e.g., semihosting console).
If the cross-platform console drivers are not configured to be compiled, plat_console_init() will be invoked to initialize platform-specific console driver.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f33bc3ef |
| 26-Sep-2023 |
Alvin Chang <alvinga@andestech.com> |
drivers: plic: Maintain controller data in driver source file
To align the design from other architecture, we move the interrupt controller data instance from platform source file to driver source f
drivers: plic: Maintain controller data in driver source file
To align the design from other architecture, we move the interrupt controller data instance from platform source file to driver source file. With this change, the PLIC initialization functions no more get the controller data as input argument. Platforms do not need to care about the interrupt controller data instance.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| #
a7c08b07 |
| 02-Aug-2023 |
Alvin Chang <alvinga@andestech.com> |
riscv: plat-virt: Rename to latest interrupt controller functions
Rename main_init_plic() to boot_primary_init_intc(). Rename main_secondary_init_plic() to boot_secondary_init_intc(). Also the inclu
riscv: plat-virt: Rename to latest interrupt controller functions
Rename main_init_plic() to boot_primary_init_intc(). Rename main_secondary_init_plic() to boot_secondary_init_intc(). Also the include path of RISC-V PLIC driver header is fixed.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
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| #
e1aad7e9 |
| 24-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612
core: riscv: fix interrupt_main_handler() reference
Fixes itr_core_handler() reference in RiscV architecture that was renamed interrupt_main_handler() in commit referred below.
Fixes: 358bf47c0612 ("core: interrupt: rename itr_core_handler()") Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
01980f3f |
| 16-May-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: interrupt: rename itr_init()
Renames itr_init() to interrupt_main_init() as a later change will modify interrupt chip API functions using interrupt_ as prefix.
Reviewed-by: Jens Wiklander <je
core: interrupt: rename itr_init()
Renames itr_init() to interrupt_main_init() as a later change will modify interrupt chip API functions using interrupt_ as prefix.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
e2f6d2fb |
| 30-Dec-2022 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: riscv: add plat-virt
Add Qemu Virt RISC-V platform. Reference: https://www.qemu.org/docs/master/system/riscv/virt.html
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: J
core: riscv: add plat-virt
Add Qemu Virt RISC-V platform. Reference: https://www.qemu.org/docs/master/system/riscv/virt.html
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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