1# SPDX-License-Identifier: BSD-2-Clause 2# 3# Copyright (c) 2023-2024, Advanced Micro Devices, Inc. All rights reserved. 4# 5# 6 7PLATFORM_FLAVOR ?= generic 8 9include core/arch/arm/cpu/cortex-armv8-0.mk 10 11CFG_MMAP_REGIONS ?= 24 12 13# Disable Non-Standard Crypto Algorithms 14$(call force,CFG_CRYPTO_SM2_PKE,n) 15$(call force,CFG_CRYPTO_SM2_DSA,n) 16$(call force,CFG_CRYPTO_SM2_KEP,n) 17$(call force,CFG_CRYPTO_SM3,n) 18$(call force,CFG_CRYPTO_SM4,n) 19 20# platform does not support paging; explicitly disable CFG_WITH_PAGER 21$(call force,CFG_WITH_PAGER,n) 22 23# Platform specific configurations 24$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 25$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 26$(call force,CFG_TEE_CORE_NB_CORE,8) 27$(call force,CFG_ARM_GICV3,y) 28$(call force,CFG_PL011,y) 29$(call force,CFG_GIC,y) 30$(call force,CFG_DT,y) 31 32CFG_CORE_RESERVED_SHM ?= n 33CFG_CORE_DYN_SHM ?= y 34CFG_WITH_STATS ?= y 35CFG_ARM64_core ?= y 36CFG_AUTO_MAX_PA_BITS ?= y 37 38# Enable ARM Crypto Extensions(CE) 39CFG_CRYPTO_WITH_CE ?= y 40 41# Define the number of cores per cluster used in calculating core position. 42# The cluster number is shifted by this value and added to the core ID, 43# so its value represents log2(cores/cluster). 44# For AMD Versal Gen 2 there are 4 clusters and 2 cores per cluster. 45$(call force,CFG_CORE_CLUSTER_SHIFT,1) 46 47# By default optee_os is located at the following location. 48# This range to contain optee_os, TEE RAM and TA RAM. 49# Default size is 128MB. 50CFG_TZDRAM_START ?= 0x1800000 51CFG_TZDRAM_SIZE ?= 0x8000000 52 53# Maximum size of the Device Tree Blob to accommodate 54# device tree with additional nodes. 55CFG_DTB_MAX_SIZE ?= 0x200000 56 57# Console selection 58# 0 : UART0[pl011, pl011_0] (default) 59# 1 : UART1[pl011_1] 60CFG_CONSOLE_UART ?= 0 61 62# PS GPIO Controller configuration. 63CFG_AMD_PS_GPIO ?= n 64 65ifeq ($(CFG_AMD_PS_GPIO),y) 66$(call force,CFG_MAP_EXT_DT_SECURE,y) 67$(call force,CFG_DRIVERS_GPIO,y) 68endif 69 70CFG_CORE_HEAP_SIZE ?= 262144 71