xref: /optee_os/core/arch/arm/plat-stm32mp2/conf.mk (revision af3fb62410645ac9636d27c3d1db72c0c9fca913)
1flavor_dts_file-257F_EV1 = stm32mp257f-ev1.dts
2
3flavorlist-MP25 = $(flavor_dts_file-257F_EV1)
4
5ifneq ($(PLATFORM_FLAVOR),)
6ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),)
7$(error Invalid platform flavor $(PLATFORM_FLAVOR))
8endif
9CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR))
10endif
11CFG_EMBED_DTB_SOURCE_FILE ?= stm32mp257f-ev1.dts
12
13ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP25)),)
14$(call force,CFG_STM32MP25,y)
15endif
16
17ifneq ($(CFG_STM32MP25),y)
18$(error STM32 Platform must be defined)
19endif
20
21include core/arch/arm/cpu/cortex-armv8-0.mk
22supported-ta-targets ?= ta_arm64
23
24$(call force,CFG_ARM64_core,y)
25$(call force,CFG_DRIVERS_CLK,y)
26$(call force,CFG_DRIVERS_CLK_DT,y)
27$(call force,CFG_DRIVERS_GPIO,y)
28$(call force,CFG_DRIVERS_PINCTRL,y)
29$(call force,CFG_DT,y)
30$(call force,CFG_GIC,y)
31$(call force,CFG_HALT_CORES_ON_PANIC_SGI,15)
32$(call force,CFG_INIT_CNTVOFF,y)
33$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
34$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
35$(call force,CFG_WITH_LPAE,y)
36
37CFG_TZDRAM_START ?= 0x82000000
38CFG_TZDRAM_SIZE  ?= 0x02000000
39
40# Support DDR ranges up to 8GBytes (address range: 0x80000000 + DDR size)
41CFG_CORE_LARGE_PHYS_ADDR ?= y
42CFG_CORE_ARM64_PA_BITS ?= 34
43
44CFG_CORE_HEAP_SIZE ?= 262144
45CFG_CORE_RESERVED_SHM ?= n
46CFG_DTB_MAX_SIZE ?= 262144
47CFG_HALT_CORES_ON_PANIC ?= y
48CFG_MMAP_REGIONS ?= 30
49CFG_NUM_THREADS ?= 5
50CFG_TEE_CORE_NB_CORE ?= 2
51
52CFG_STM32_FMC ?= y
53CFG_STM32_GPIO ?= y
54CFG_STM32_HPDMA ?= y
55CFG_STM32_HSEM ?= y
56CFG_STM32_IPCC ?= y
57CFG_STM32_RIF ?= y
58CFG_STM32_RIFSC ?= y
59CFG_STM32_RNG ?= y
60CFG_STM32_UART ?= y
61
62# Default enable some test facitilites
63CFG_ENABLE_EMBEDDED_TESTS ?= y
64CFG_WITH_STATS ?= y
65
66# Default disable ASLR
67CFG_CORE_ASLR ?= n
68
69# UART instance used for early console (0 disables early console)
70CFG_STM32_EARLY_CONSOLE_UART ?= 2
71
72# Default disable external DT support
73CFG_EXTERNAL_DT ?= n
74
75# Default enable HWRNG PTA support
76CFG_HWRNG_PTA ?= y
77ifeq ($(CFG_HWRNG_PTA),y)
78$(call force,CFG_STM32_RNG,y,Required by CFG_HWRNG_PTA)
79$(call force,CFG_WITH_SOFTWARE_PRNG,n,Required by CFG_HWRNG_PTA)
80CFG_HWRNG_QUALITY ?= 1024
81endif
82