1# 1GB and 512MB DDR targets do not locate secure DDR at the same place. 2flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts 3flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts 4flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts 5flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts 6 7flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2) 8 9flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1) 10 11flavorlist-cryp-1G = $(flavor_dts_file-157C_ED1) \ 12 $(flavor_dts_file-157C_EV1) 13 14flavorlist-no_cryp = $(flavorlist-no_cryp-512M) 15 16flavorlist-512M = $(flavorlist-cryp-512M) \ 17 $(flavorlist-no_cryp-512M) 18 19flavorlist-1G = $(flavorlist-cryp-1G) 20 21ifneq ($(PLATFORM_FLAVOR),) 22ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),) 23$(error Invalid platform flavor $(PLATFORM_FLAVOR)) 24endif 25CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR)) 26endif 27 28ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),) 29$(call force,CFG_STM32_CRYP,n) 30endif 31 32include core/arch/arm/cpu/cortex-a7.mk 33 34$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 35$(call force,CFG_GIC,y) 36$(call force,CFG_INIT_CNTVOFF,y) 37$(call force,CFG_PSCI_ARM32,y) 38$(call force,CFG_SCMI_MSG_DRIVERS,y) 39$(call force,CFG_SCMI_MSG_CLOCK,y) 40$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y) 41$(call force,CFG_SCMI_MSG_SMT,y) 42$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y) 43$(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y) 44$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 45$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 46$(call force,CFG_SM_PLATFORM_HANDLER,y) 47$(call force,CFG_WITH_SOFTWARE_PRNG,y) 48 49ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),) 50CFG_TZDRAM_START ?= 0xde000000 51CFG_SHMEM_START ?= 0xdfe00000 52CFG_DRAM_SIZE ?= 0x20000000 53endif 54 55CFG_TZSRAM_START ?= 0x2ffc0000 56CFG_TZSRAM_SIZE ?= 0x0003f000 57CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000 58CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000 59CFG_TZDRAM_START ?= 0xfe000000 60CFG_TZDRAM_SIZE ?= 0x01e00000 61CFG_SHMEM_START ?= 0xffe00000 62CFG_SHMEM_SIZE ?= 0x00200000 63CFG_DRAM_SIZE ?= 0x40000000 64 65CFG_TEE_CORE_NB_CORE ?= 2 66CFG_WITH_PAGER ?= y 67CFG_WITH_LPAE ?= y 68CFG_MMAP_REGIONS ?= 23 69 70ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),) 71# Some drivers mandate DT support 72$(call force,CFG_STM32_I2C,n) 73$(call force,CFG_STPMIC1,n) 74endif 75 76CFG_STM32_BSEC ?= y 77CFG_STM32_ETZPC ?= y 78CFG_STM32_GPIO ?= y 79CFG_STM32_I2C ?= y 80CFG_STM32_RNG ?= y 81CFG_STM32_UART ?= y 82CFG_STPMIC1 ?= y 83CFG_TZC400 ?= y 84 85ifeq ($(CFG_STPMIC1),y) 86$(call force,CFG_STM32_I2C,y) 87$(call force,CFG_STM32_GPIO,y) 88endif 89 90# Platform specific configuration 91CFG_STM32MP_PANIC_ON_TZC_PERM_VIOLATION ?= y 92 93# SiP/OEM service for non-secure world 94CFG_STM32_BSEC_SIP ?= y 95 96# Default enable some test facitilites 97CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y 98CFG_WITH_STATS ?= y 99 100# Default disable some support for pager memory size constraint 101CFG_TEE_CORE_DEBUG ?= n 102CFG_UNWIND ?= n 103CFG_LOCKDEP ?= n 104CFG_CORE_ASLR ?= n 105 106# Non-secure UART and GPIO/pinctrl for the output console 107CFG_WITH_NSEC_GPIOS ?= y 108CFG_WITH_NSEC_UARTS ?= y 109# UART instance used for early console (0 disables early console) 110CFG_STM32_EARLY_CONSOLE_UART ?= 4 111