1PLATFORM_FLAVOR ?= stm32mp157 2 3# 1GB and 512MB DDR target do not locate secure DDR at the same place. 4# 5flavorlist-1G = stm32mp157c-ev1.dts stm32mp157c-ed1.dts 6flavorlist-512M = stm32mp157c-dk2.dts 7 8include core/arch/arm/cpu/cortex-a7.mk 9 10$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 11$(call force,CFG_GENERIC_BOOT,y) 12$(call force,CFG_GIC,y) 13$(call force,CFG_INIT_CNTVOFF,y) 14$(call force,CFG_PM_STUBS,y) 15$(call force,CFG_PSCI_ARM32,y) 16$(call force,CFG_SCMI_MSG_DRIVERS,y) 17$(call force,CFG_SCMI_MSG_CLOCK,y) 18$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y) 19$(call force,CFG_SCMI_MSG_SMT,y) 20$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y) 21$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 22$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 23$(call force,CFG_SM_PLATFORM_HANDLER,y) 24$(call force,CFG_WITH_SOFTWARE_PRNG,y) 25 26ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),) 27CFG_TZDRAM_START ?= 0xde000000 28CFG_SHMEM_START ?= 0xdfe00000 29CFG_DRAM_SIZE ?= 0x20000000 30endif 31 32CFG_TZSRAM_START ?= 0x2ffc0000 33CFG_TZSRAM_SIZE ?= 0x0003f000 34CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000 35CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000 36CFG_TZDRAM_START ?= 0xfe000000 37CFG_TZDRAM_SIZE ?= 0x01e00000 38CFG_SHMEM_START ?= 0xffe00000 39CFG_SHMEM_SIZE ?= 0x00200000 40CFG_DRAM_SIZE ?= 0x40000000 41 42CFG_TEE_CORE_NB_CORE ?= 2 43CFG_WITH_PAGER ?= y 44CFG_WITH_LPAE ?= y 45CFG_WITH_STACK_CANARIES ?= y 46CFG_MMAP_REGIONS ?= 23 47 48ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),) 49# Some drivers mandate DT support 50$(call force,CFG_STM32_I2C,n) 51$(call force,CFG_STPMIC1,n) 52endif 53 54CFG_STM32_BSEC ?= y 55CFG_STM32_ETZPC ?= y 56CFG_STM32_GPIO ?= y 57CFG_STM32_I2C ?= y 58CFG_STM32_RNG ?= y 59CFG_STM32_RNG ?= y 60CFG_STM32_UART ?= y 61CFG_STPMIC1 ?= y 62 63ifeq ($(CFG_STPMIC1),y) 64$(call force,CFG_STM32_I2C,y) 65$(call force,CFG_STM32_GPIO,y) 66endif 67 68# Default enable some test facitilites 69CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y 70CFG_WITH_STATS ?= y 71 72# Default disable some support for pager memory size constraint 73CFG_TEE_CORE_DEBUG ?= n 74CFG_UNWIND ?= n 75CFG_LOCKDEP ?= n 76CFG_CORE_ASLR ?= n 77 78# Non-secure UART and GPIO/pinctrl for the output console 79CFG_WITH_NSEC_GPIOS ?= y 80CFG_WITH_NSEC_UARTS ?= y 81# UART instance used for early console (0 disables early console) 82CFG_STM32_EARLY_CONSOLE_UART ?= 4 83