1# 1GB and 512MB DDR targets do not locate secure DDR at the same place. 2flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts 3flavor_dts_file-157C_DHCOM_PDK2 = stm32mp157c-dhcom-pdk2.dts 4flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts 5flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts 6flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts 7 8flavor_dts_file-135F_DK = stm32mp135f-dk.dts 9 10flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2) \ 11 $(flavor_dts_file-135F_DK) 12 13flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1) 14 15flavorlist-cryp-1G = $(flavor_dts_file-157C_DHCOM_PDK2) \ 16 $(flavor_dts_file-157C_ED1) \ 17 $(flavor_dts_file-157C_EV1) 18 19flavorlist-no_cryp = $(flavorlist-no_cryp-512M) 20 21flavorlist-512M = $(flavorlist-cryp-512M) \ 22 $(flavorlist-no_cryp-512M) 23 24flavorlist-1G = $(flavorlist-cryp-1G) 25 26flavorlist-MP15 = $(flavor_dts_file-157A_DK1) \ 27 $(flavor_dts_file-157C_DHCOM_PDK2) \ 28 $(flavor_dts_file-157C_DK2) \ 29 $(flavor_dts_file-157C_ED1) \ 30 $(flavor_dts_file-157C_EV1) 31 32flavorlist-MP13 = $(flavor_dts_file-135F_DK) 33 34ifneq ($(PLATFORM_FLAVOR),) 35ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),) 36$(error Invalid platform flavor $(PLATFORM_FLAVOR)) 37endif 38CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR)) 39endif 40 41ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),) 42$(call force,CFG_STM32_CRYP,n) 43endif 44 45ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP13)),) 46$(call force,CFG_STM32MP13,y) 47endif 48 49ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP15)),) 50$(call force,CFG_STM32MP15,y) 51endif 52 53# CFG_STM32MP1x switches are exclusive. 54# - CFG_STM32MP15 is enabled for STM32MP15x-* targets (default) 55# - CFG_STM32MP13 is enabled for STM32MP13x-* targets 56ifeq ($(CFG_STM32MP13),y) 57$(call force,CFG_STM32MP15,n) 58else 59$(call force,CFG_STM32MP15,y) 60$(call force,CFG_STM32MP13,n) 61endif 62ifeq ($(call cfg-one-enabled,CFG_STM32MP15 CFG_STM32MP13),n) 63$(error One of CFG_STM32MP15 CFG_STM32MP13 must be enabled) 64endif 65ifeq ($(call cfg-all-enabled,CFG_STM32MP15 CFG_STM32MP13),y) 66$(error Only one of CFG_STM32MP15 CFG_STM32MP13 must be enabled) 67endif 68 69include core/arch/arm/cpu/cortex-a7.mk 70 71$(call force,CFG_DRIVERS_CLK,y) 72$(call force,CFG_GIC,y) 73$(call force,CFG_INIT_CNTVOFF,y) 74$(call force,CFG_PSCI_ARM32,y) 75$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 76$(call force,CFG_SM_PLATFORM_HANDLER,y) 77$(call force,CFG_STM32_SHARED_IO,y) 78 79ifeq ($(CFG_STM32MP13),y) 80$(call force,CFG_BOOT_SECONDARY_REQUEST,n) 81$(call force,CFG_CORE_RESERVED_SHM,n) 82$(call force,CFG_DRIVERS_CLK_FIXED,y) 83$(call force,CFG_SECONDARY_INIT_CNTFRQ,n) 84$(call force,CFG_STM32_GPIO,y) 85$(call force,CFG_STM32_RNG,n) 86$(call force,CFG_STM32MP_CLK_CORE,y) 87$(call force,CFG_STM32MP1_SHARED_RESOURCES,n) 88$(call force,CFG_STM32MP13_CLK,y) 89$(call force,CFG_TEE_CORE_NB_CORE,1) 90$(call force,CFG_WITH_NSEC_GPIOS,n) 91CFG_STM32MP_OPP_COUNT ?= 2 92CFG_WITH_PAGER ?= n 93endif # CFG_STM32MP13 94 95ifeq ($(CFG_STM32MP15),y) 96$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 97$(call force,CFG_DRIVERS_CLK_FIXED,n) 98$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 99$(call force,CFG_STM32MP1_SHARED_RESOURCES,y) 100$(call force,CFG_STM32MP15_CLK,y) 101CFG_CORE_RESERVED_SHM ?= y 102CFG_TEE_CORE_NB_CORE ?= 2 103CFG_WITH_PAGER ?= y 104endif # CFG_STM32MP15 105 106CFG_WITH_LPAE ?= y 107CFG_WITH_SOFTWARE_PRNG ?= y 108CFG_MMAP_REGIONS ?= 23 109CFG_DTB_MAX_SIZE ?= (256 * 1024) 110CFG_CORE_ASLR ?= n 111 112ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),) 113# Some drivers mandate DT support 114$(call force,CFG_DRIVERS_CLK_DT,n) 115$(call force,CFG_STM32_CRYP,n) 116$(call force,CFG_STM32_GPIO,n) 117$(call force,CFG_STM32_I2C,n) 118$(call force,CFG_STM32_IWDG,n) 119$(call force,CFG_STM32_TAMP,n) 120$(call force,CFG_STPMIC1,n) 121$(call force,CFG_STM32MP1_SCMI_SIP,n) 122$(call force,CFG_SCMI_PTA,n) 123else 124$(call force,CFG_DRIVERS_CLK_DT,y) 125endif 126 127ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),) 128CFG_TZDRAM_START ?= 0xde000000 129CFG_DRAM_SIZE ?= 0x20000000 130endif 131 132CFG_DRAM_BASE ?= 0xc0000000 133CFG_DRAM_SIZE ?= 0x40000000 134CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000 135CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000 136ifeq ($(CFG_STM32MP15),y) 137CFG_TZDRAM_START ?= 0xfe000000 138CFG_TZDRAM_SIZE ?= 0x01e00000 139CFG_TZSRAM_START ?= 0x2ffc0000 140CFG_TZSRAM_SIZE ?= 0x0003f000 141ifeq ($(CFG_CORE_RESERVED_SHM),y) 142CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 143CFG_SHMEM_SIZE ?= ($(CFG_DRAM_BASE) + $(CFG_DRAM_SIZE) - $(CFG_SHMEM_START)) 144endif 145else 146CFG_TZDRAM_SIZE ?= 0x02000000 147CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) + $(CFG_DRAM_SIZE) - $(CFG_TZDRAM_SIZE)) 148endif #CFG_STM32MP15 149 150CFG_STM32_BSEC ?= y 151CFG_STM32_CRYP ?= y 152CFG_STM32_ETZPC ?= y 153CFG_STM32_GPIO ?= y 154CFG_STM32_I2C ?= y 155CFG_STM32_IWDG ?= y 156CFG_STM32_RNG ?= y 157CFG_STM32_RSTCTRL ?= y 158CFG_STM32_TAMP ?= y 159CFG_STM32_UART ?= y 160CFG_STPMIC1 ?= y 161CFG_TZC400 ?= y 162 163ifeq ($(CFG_STPMIC1),y) 164$(call force,CFG_STM32_I2C,y) 165$(call force,CFG_STM32_GPIO,y) 166endif 167 168# if any crypto driver is enabled, enable the crypto-framework layer 169ifeq ($(call cfg-one-enabled, CFG_STM32_CRYP),y) 170$(call force,CFG_STM32_CRYPTO_DRIVER,y) 171endif 172 173CFG_DRIVERS_RSTCTRL ?= $(CFG_STM32_RSTCTRL) 174$(eval $(call cfg-depends-all,CFG_STM32_RSTCTRL,CFG_DRIVERS_RSTCTRL)) 175 176CFG_WDT ?= $(CFG_STM32_IWDG) 177 178# Platform specific configuration 179CFG_STM32MP_PANIC_ON_TZC_PERM_VIOLATION ?= y 180 181# SiP/OEM service for non-secure world 182CFG_STM32_BSEC_SIP ?= y 183CFG_STM32MP1_SCMI_SIP ?= n 184ifeq ($(CFG_STM32MP1_SCMI_SIP),y) 185$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_STM32MP1_SCMI_SIP) 186$(call force,CFG_SCMI_MSG_SMT,y,Mandated by CFG_STM32MP1_SCMI_SIP) 187$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y,Mandated by CFG_STM32MP1_SCMI_SIP) 188endif 189 190# Default enable SCMI PTA support 191CFG_SCMI_PTA ?= y 192ifeq ($(CFG_SCMI_PTA),y) 193$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_SCMI_PTA) 194$(call force,CFG_SCMI_MSG_SMT_THREAD_ENTRY,y,Mandated by CFG_SCMI_PTA) 195CFG_SCMI_MSG_SHM_MSG ?= y 196CFG_SCMI_MSG_SMT ?= y 197endif 198 199CFG_SCMI_MSG_DRIVERS ?= n 200ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 201$(call force,CFG_SCMI_MSG_CLOCK,y) 202$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y) 203CFG_SCMI_MSG_SHM_MSG ?= y 204CFG_SCMI_MSG_SMT ?= y 205CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= y 206$(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y) 207endif 208 209ifneq ($(CFG_WITH_SOFTWARE_PRNG),y) 210CFG_HWRNG_PTA ?= y 211endif 212ifeq ($(CFG_HWRNG_PTA),y) 213$(call force,CFG_STM32_RNG,y,Mandated by CFG_HWRNG_PTA) 214$(call force,CFG_WITH_SOFTWARE_PRNG,n,Mandated by CFG_HWRNG_PTA) 215$(call force,CFG_HWRNG_QUALITY,1024) 216endif 217 218# Provision enough threads to pass xtest 219ifneq (,$(filter y,$(CFG_SCMI_PTA) $(CFG_STM32MP1_SCMI_SIP))) 220ifeq ($(CFG_WITH_PAGER),y) 221CFG_NUM_THREADS ?= 3 222else 223CFG_NUM_THREADS ?= 10 224endif 225endif 226 227# Default enable some test facitilites 228CFG_ENABLE_EMBEDDED_TESTS ?= y 229CFG_WITH_STATS ?= y 230 231# Enable to allow debug 232CFG_STM32_BSEC_WRITE ?= $(CFG_TEE_CORE_DEBUG) 233 234# Default disable some support for pager memory size constraint 235ifeq ($(CFG_WITH_PAGER),y) 236CFG_TEE_CORE_DEBUG ?= n 237CFG_UNWIND ?= n 238CFG_LOCKDEP ?= n 239CFG_TA_BGET_TEST ?= n 240# Default disable early TA compression to support a smaller HEAP size 241CFG_EARLY_TA_COMPRESS ?= n 242CFG_CORE_HEAP_SIZE ?= 49152 243endif 244 245# Non-secure UART and GPIO/pinctrl for the output console 246CFG_WITH_NSEC_GPIOS ?= y 247CFG_WITH_NSEC_UARTS ?= y 248# UART instance used for early console (0 disables early console) 249CFG_STM32_EARLY_CONSOLE_UART ?= 4 250 251# Sanity on choice config switches 252ifeq ($(call cfg-all-enabled,CFG_STM32MP15 CFG_STM32MP13),y) 253$(error CFG_STM32MP13_CLK and CFG_STM32MP15_CLK are exclusive) 254endif 255