xref: /optee_os/core/arch/arm/plat-stm32mp1/conf.mk (revision 5b25c76ac40f830867e3d60800120ffd7874e8dc)
1PLATFORM_FLAVOR ?= stm32mp157
2
3# 1GB and 512MB DDR target do not locate secure DDR at the same place.
4#
5flavorlist-1G = stm32mp157c-ev1.dts stm32mp157c-ed1.dts
6flavorlist-512M = stm32mp157c-dk2.dts
7
8include core/arch/arm/cpu/cortex-a7.mk
9
10$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
11$(call force,CFG_GENERIC_BOOT,y)
12$(call force,CFG_GIC,y)
13$(call force,CFG_INIT_CNTVOFF,y)
14$(call force,CFG_PM_STUBS,y)
15$(call force,CFG_PSCI_ARM32,y)
16$(call force,CFG_SECONDARY_INIT_CNTFRQ,y)
17$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
18$(call force,CFG_WITH_SOFTWARE_PRNG,y)
19
20ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),)
21CFG_TZDRAM_START ?= 0xde000000
22CFG_SHMEM_START  ?= 0xdfe00000
23CFG_DRAM_SIZE    ?= 0x20000000
24endif
25
26CFG_TZSRAM_START ?= 0x2ffc0000
27CFG_TZSRAM_SIZE  ?= 0x00040000
28CFG_TZDRAM_START ?= 0xfe000000
29CFG_TZDRAM_SIZE  ?= 0x01e00000
30CFG_SHMEM_START  ?= 0xffe00000
31CFG_SHMEM_SIZE   ?= 0x00200000
32CFG_DRAM_SIZE    ?= 0x40000000
33
34CFG_TEE_CORE_NB_CORE ?= 2
35CFG_WITH_PAGER ?= y
36CFG_WITH_LPAE ?= y
37CFG_WITH_STACK_CANARIES ?= y
38CFG_MMAP_REGIONS ?= 23
39
40ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),)
41# Some drivers mandate DT support
42$(call force,CFG_STM32_I2C,n)
43endif
44
45CFG_STM32_BSEC ?= y
46CFG_STM32_ETZPC ?= y
47CFG_STM32_GPIO ?= y
48CFG_STM32_I2C ?= y
49CFG_STM32_RNG ?= y
50CFG_STM32_RNG ?= y
51CFG_STM32_UART ?= y
52
53# Default enable some test facitilites
54CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y
55CFG_WITH_STATS ?= y
56
57# Non-secure UART and GPIO/pinctrl for the output console
58CFG_WITH_NSEC_GPIOS ?= y
59CFG_WITH_NSEC_UARTS ?= y
60# UART instance used for early console (0 disables early console)
61CFG_STM32_EARLY_CONSOLE_UART ?= 4
62