xref: /optee_os/core/arch/arm/plat-rcar/main.c (revision bc879b1765afacd8a2b7673236037181011cabea)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2016, GlobalLogic
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice,
10  * this list of conditions and the following disclaimer.
11  *
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <console.h>
30 #include <kernel/generic_boot.h>
31 #include <kernel/panic.h>
32 #include <kernel/pm_stubs.h>
33 #include <mm/core_memprot.h>
34 #include <platform_config.h>
35 #include <stdint.h>
36 #include <tee/entry_std.h>
37 #include <tee/entry_fast.h>
38 #include <drivers/scif.h>
39 #include <drivers/gic.h>
40 
41 register_phys_mem(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, SCIF_REG_SIZE);
42 register_phys_mem(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
43 register_phys_mem(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
44 
45 register_dynamic_shm(NSEC_DDR_0_BASE, NSEC_DDR_0_SIZE);
46 register_dynamic_shm(NSEC_DDR_1_BASE, NSEC_DDR_1_SIZE);
47 #ifdef NSEC_DDR_2_BASE
48 register_dynamic_shm(NSEC_DDR_2_BASE, NSEC_DDR_2_SIZE);
49 #endif
50 #ifdef NSEC_DDR_3_BASE
51 register_dynamic_shm(NSEC_DDR_3_BASE, NSEC_DDR_3_SIZE);
52 #endif
53 
54 static void main_fiq(void);
55 
56 static const struct thread_handlers handlers = {
57 	.std_smc = tee_entry_std,
58 	.fast_smc = tee_entry_fast,
59 	.nintr = main_fiq,
60 	.cpu_on = cpu_on_handler,
61 	.cpu_off = pm_do_nothing,
62 	.cpu_suspend = pm_do_nothing,
63 	.cpu_resume = pm_do_nothing,
64 	.system_off = pm_do_nothing,
65 	.system_reset = pm_do_nothing,
66 };
67 
68 static struct scif_uart_data console_data;
69 
70 const struct thread_handlers *generic_boot_get_handlers(void)
71 {
72 	return &handlers;
73 }
74 
75 static void main_fiq(void)
76 {
77 	panic();
78 }
79 
80 void console_init(void)
81 {
82 	scif_uart_init(&console_data, CONSOLE_UART_BASE);
83 	register_serial_console(&console_data.chip);
84 }
85