xref: /optee_os/core/arch/arm/plat-rcar/main.c (revision a50cb361d9e5735f197ccc87beb0d24af8315369)
1 /*
2  * Copyright (c) 2016, GlobalLogic
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <console.h>
29 #include <kernel/generic_boot.h>
30 #include <kernel/panic.h>
31 #include <kernel/pm_stubs.h>
32 #include <mm/core_memprot.h>
33 #include <platform_config.h>
34 #include <stdint.h>
35 #include <tee/entry_std.h>
36 #include <tee/entry_fast.h>
37 #include <drivers/scif.h>
38 #include <drivers/gic.h>
39 
40 register_phys_mem(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, SCIF_REG_SIZE);
41 register_phys_mem(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
42 register_phys_mem(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
43 
44 static void main_fiq(void);
45 
46 static const struct thread_handlers handlers = {
47 	.std_smc = tee_entry_std,
48 	.fast_smc = tee_entry_fast,
49 	.fiq = main_fiq,
50 	.cpu_on = cpu_on_handler,
51 	.cpu_off = pm_do_nothing,
52 	.cpu_suspend = pm_do_nothing,
53 	.cpu_resume = pm_do_nothing,
54 	.system_off = pm_do_nothing,
55 	.system_reset = pm_do_nothing,
56 };
57 
58 const struct thread_handlers *generic_boot_get_handlers(void)
59 {
60 	return &handlers;
61 }
62 
63 static void main_fiq(void)
64 {
65 	panic();
66 }
67 
68 static vaddr_t console_base(void)
69 {
70 	static void *va;
71 
72 	if (cpu_mmu_enabled()) {
73 		if (!va)
74 			va = phys_to_virt(CONSOLE_UART_BASE, MEM_AREA_IO_SEC);
75 		return (vaddr_t)va;
76 	}
77 	return CONSOLE_UART_BASE;
78 }
79 
80 void console_init(void)
81 {
82 	scif_uart_init(console_base());
83 }
84 
85 void console_putc(int ch)
86 {
87 	if (ch == '\n')
88 		scif_uart_putc('\r', console_base());
89 	scif_uart_putc(ch, console_base());
90 }
91 
92 void console_flush(void)
93 {
94 	scif_uart_flush(console_base());
95 }
96