xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision f9cf3c5644358b1e1c3d10f74252a00bd7f5e81f) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ulccimx6ulsbcpro \
7
8mx6ull-flavorlist = \
9	mx6ullevk \
10
11mx6q-flavorlist = \
12	mx6qsabrelite \
13	mx6qsabresd \
14	mx6qhmbedge \
15
16mx6qp-flavorlist = \
17	mx6qpsabreauto \
18	mx6qpsabresd \
19
20mx6sx-flavorlist = \
21	mx6sxsabreauto \
22	mx6sxudooneofull \
23
24mx6d-flavorlist = \
25	mx6dhmbedge \
26
27mx6dl-flavorlist = \
28	mx6dlsabresd \
29	mx6dlhmbedge \
30
31mx6s-flavorlist = \
32	mx6shmbedge \
33
34mx7-flavorlist = \
35	mx7dsabresd \
36	mx7dpico_mbl \
37	mx7swarp7 \
38	mx7swarp7_mbl \
39	mx7dclsom \
40
41imx8mq-flavorlist = \
42	imx8mqevk
43
44imx8mm-flavorlist = \
45	imx8mmevk
46
47ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
48$(call force,CFG_MX6,y)
49$(call force,CFG_MX6UL,y)
50$(call force,CFG_TEE_CORE_NB_CORE,1)
51include core/arch/arm/cpu/cortex-a7.mk
52else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
53$(call force,CFG_MX6,y)
54$(call force,CFG_MX6ULL,y)
55$(call force,CFG_TEE_CORE_NB_CORE,1)
56$(call force,CFG_IMX_CAAM,n)
57include core/arch/arm/cpu/cortex-a7.mk
58else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
59$(call force,CFG_MX6,y)
60$(call force,CFG_MX6Q,y)
61$(call force,CFG_TEE_CORE_NB_CORE,4)
62else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
63$(call force,CFG_MX6,y)
64$(call force,CFG_MX6QP,y)
65$(call force,CFG_TEE_CORE_NB_CORE,4)
66else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
67$(call force,CFG_MX6,y)
68$(call force,CFG_MX6D,y)
69$(call force,CFG_TEE_CORE_NB_CORE,2)
70else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
71$(call force,CFG_MX6,y)
72$(call force,CFG_MX6DL,y)
73$(call force,CFG_TEE_CORE_NB_CORE,2)
74else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
75$(call force,CFG_MX6,y)
76$(call force,CFG_MX6S,y)
77$(call force,CFG_TEE_CORE_NB_CORE,1)
78else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
79$(call force,CFG_MX6,y)
80$(call force,CFG_MX6SX,y)
81$(call force,CFG_TEE_CORE_NB_CORE,1)
82else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7-flavorlist)))
83$(call force,CFG_MX7,y)
84CFG_TEE_CORE_NB_CORE ?= 2
85include core/arch/arm/cpu/cortex-a7.mk
86else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mq-flavorlist)))
87$(call force,CFG_IMX8MQ,y)
88$(call force,CFG_ARM64_core,y)
89CFG_IMX_UART ?= y
90CFG_DRAM_BASE ?= 0x40000000
91CFG_TEE_CORE_NB_CORE ?= 4
92else ifneq (,$(filter $(PLATFORM_FLAVOR),$(imx8mm-flavorlist)))
93$(call force,CFG_IMX8MM,y)
94$(call force,CFG_ARM64_core,y)
95CFG_IMX_UART ?= y
96CFG_DRAM_BASE ?= 0x40000000
97CFG_TEE_CORE_NB_CORE ?= 4
98else
99$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
100endif
101
102ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
103CFG_DDR_SIZE ?= 0x40000000
104CFG_NS_ENTRY_ADDR ?= 0x80800000
105$(call force,CFG_TEE_CORE_NB_CORE,2)
106endif
107
108ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
109CFG_DDR_SIZE ?= 0x40000000
110CFG_UART_BASE ?= UART1_BASE
111endif
112
113ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
114CFG_DDR_SIZE ?= 0x20000000
115CFG_NS_ENTRY_ADDR ?= 0x87800000
116CFG_DT_ADDR ?= 0x83100000
117CFG_UART_BASE ?= UART5_BASE
118CFG_BOOT_SECONDARY_REQUEST ?= n
119CFG_EXTERNAL_DTB_OVERLAY ?= y
120CFG_IMX_WDOG_EXT_RESET ?= y
121$(call force,CFG_TEE_CORE_NB_CORE,2)
122endif
123
124ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
125CFG_DDR_SIZE ?= 0x20000000
126CFG_NS_ENTRY_ADDR ?= 0x80800000
127CFG_BOOT_SECONDARY_REQUEST ?= n
128$(call force,CFG_TEE_CORE_NB_CORE,1)
129endif
130
131ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
132CFG_DDR_SIZE ?= 0x20000000
133CFG_NS_ENTRY_ADDR ?= 0x87800000
134CFG_DT_ADDR ?= 0x83100000
135CFG_BOOT_SECONDARY_REQUEST ?= n
136CFG_EXTERNAL_DTB_OVERLAY = y
137CFG_IMX_WDOG_EXT_RESET = y
138$(call force,CFG_TEE_CORE_NB_CORE,1)
139endif
140
141ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
142	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge))
143CFG_DDR_SIZE ?= 0x40000000
144CFG_NS_ENTRY_ADDR ?= 0x12000000
145endif
146
147ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto))
148CFG_DDR_SIZE ?= 0x80000000
149CFG_NS_ENTRY_ADDR ?= 0x12000000
150endif
151
152ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
153CFG_DDR_SIZE ?= 0x80000000
154CFG_UART_BASE ?= UART1_BASE
155endif
156
157ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
158CFG_DDR_SIZE ?= 0x40000000
159CFG_NS_ENTRY_ADDR ?= 0x12000000
160endif
161
162ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
163CFG_DDR_SIZE ?= 0x40000000
164CFG_NS_ENTRY_ADDR ?= 0x12000000
165CFG_UART_BASE ?= UART2_BASE
166endif
167
168ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
169CFG_DDR_SIZE ?= 0x80000000
170CFG_NS_ENTRY_ADDR ?= 0x80800000
171endif
172
173ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
174CFG_DDR_SIZE ?= 0x40000000
175CFG_UART_BASE ?= UART1_BASE
176endif
177
178ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
179CFG_DDR_SIZE ?= 0x20000000
180CFG_NS_ENTRY_ADDR ?= 0x80800000
181endif
182
183ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
184CFG_DDR_SIZE ?= 0x10000000
185CFG_NS_ENTRY_ADDR ?= 0x80800000
186CFG_UART_BASE ?= UART5_BASE
187endif
188
189ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mqevk))
190CFG_DDR_SIZE ?= 0xc0000000
191CFG_UART_BASE ?= UART1_BASE
192endif
193
194ifneq (,$(filter $(PLATFORM_FLAVOR),imx8mmevk))
195CFG_DDR_SIZE ?= 0x80000000
196CFG_UART_BASE ?= UART2_BASE
197endif
198
199# i.MX6 Solo/SoloX/DualLite/Dual/Quad specific config
200ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
201      $(CFG_MX6SX)), y)
202include core/arch/arm/cpu/cortex-a9.mk
203
204$(call force,CFG_PL310,y)
205
206CFG_PL310_LOCKED ?= y
207CFG_ENABLE_SCTLR_RR ?= y
208CFG_SCU ?= y
209endif
210
211ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
212CFG_DRAM_BASE ?= 0x10000000
213endif
214
215ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SX)))
216CFG_DRAM_BASE ?= 0x80000000
217endif
218
219ifeq ($(filter y, $(CFG_MX7)), y)
220CFG_INIT_CNTVOFF ?= y
221CFG_DRAM_BASE ?= 0x80000000
222endif
223
224ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
225$(call force,CFG_GENERIC_BOOT,y)
226$(call force,CFG_GIC,y)
227$(call force,CFG_IMX_UART,y)
228$(call force,CFG_PM_STUBS,y)
229$(call force,CFG_WITH_SOFTWARE_PRNG,y)
230
231CFG_BOOT_SYNC_CPU ?= n
232CFG_BOOT_SECONDARY_REQUEST ?= y
233CFG_DT ?= y
234CFG_PAGEABLE_ADDR ?= 0
235CFG_PSCI_ARM32 ?= y
236CFG_SECURE_TIME_SOURCE_REE ?= y
237CFG_CSU ?= y
238CFG_UART_BASE ?= UART1_BASE
239CFG_IMX_CAAM ?= y
240endif
241
242ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
243CFG_HWSUPP_MEM_PERM_WXN = n
244CFG_IMX_WDOG ?= y
245endif
246
247ifeq ($(CFG_ARM64_core),y)
248# arm-v8 platforms
249include core/arch/arm/cpu/cortex-armv8-0.mk
250$(call force,CFG_ARM_GICV3,y)
251$(call force,CFG_GENERIC_BOOT,y)
252$(call force,CFG_GIC,y)
253$(call force,CFG_WITH_LPAE,y)
254$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
255$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
256
257CFG_CRYPTO_WITH_CE ?= y
258CFG_PM_STUBS ?= y
259
260supported-ta-targets = ta_arm64
261endif
262
263CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
264CFG_TZDRAM_SIZE ?= 0x01e00000
265CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
266CFG_SHMEM_SIZE ?= 0x00200000
267
268CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
269CFG_WITH_STACK_CANARIES ?= y
270CFG_MMAP_REGIONS ?= 24
271